Inventor profile of:

David L. Roper

City:

Austin, Texas

Country:

United States

Published Applications:

37

Last publication date:

2024-07-25

Top Assignees for applications by David L. Roper

The entities that hold a legal rights for patent applications filed by inventor Roper David L.:

Recent patent applications by Roper David L.

David L. Roper from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-07-25
US20240251513A1
Electricity

Server Rack System Latch Lockout

#2 | 2009-06-25
US20090160042A1
Electricity

Managed Memory Component

#3 | 2009-05-14
US20090124045A1
Electricity

Low profile stacking system and method

#4 | 2009-03-19
US20090073661A1
Electricity

THIN CIRCUIT MODULE AND METHOD

#5 | 2009-02-03
US10435192
-

Modularized die stacking system and method

#6 | 2008-09-04
US20080211077A1
Electricity

Low profile chip scale stacking system and method

#7 | 2008-03-20
US20080067662A1
Electricity

Modularized Die Stacking System and Method

#8 | 2007-11-08
US20070258217A1
Electricity

Split core circuit module

#9 | 2007-07-19
US20070164416A1
Electricity

Managed memory component

#10 | 2007-07-12
US20070159545A1
Electricity

Managed memory component

#11 | 2007-07-12
US20070158821A1
Electricity

Managed memory component

#12 | 2007-07-12
US20070158800A1
Electricity

Managed memory component

#13 | 2007-05-24
US20070117262A1
Electricity

Low Profile Stacking System and Method

#14 | 2007-05-24
US20070114649A1
Electricity

Low Profile Stacking System and Method

#15 | 2006-08-22
US10873847
-

Low profile chip scale stacking system and method

#16 | 2006-06-22
US20060131716A1
Electricity

Stacking system and method

#17 | 2006-05-04
US20060092614A1
Electricity

Stacked module systems

#18 | 2006-05-04
US20060091521A1
Electricity

Stacking system and method

#19 | 2006-04-11
US10631886
-

Low profile chip scale stacking system and method

#20 | 2006-01-12
US20060008945A1
Electricity

Integrated circuit stacking system and method

#21 | 2005-12-22
US20050280135A1
Electricity

Stacking system and method

#22 | 2005-12-01
US20050263872A1
Electricity

Flex-based circuit module

#23 | 2005-10-18
US10814532
-

Integrated circuit stacking system and method

#24 | 2005-10-18
US10709732
-

Memory expansion and chip scale stacking system and method

#25 | 2005-09-06
US10136890
-

Integrated circuit stacking system and method

#26 | 2005-07-07
US20050146031A1
Electricity

Low profile stacking system and method

#27 | 2005-07-07
US20050146011A1
Electricity

Pitch change and chip scale stacking system and method

#28 | 2005-07-05
US10453398
-

Memory expansion and chip scale stacking system and method

#29 | 2005-03-31
US20050067683A1
Electricity

Memory expansion and chip scale stacking system and method

#30 | 2005-03-24
US20050062144A1
Electricity

Memory expansion and chip scale stacking system and method

#31 | 2005-03-17
US20050057911A1
Electricity

Memory expansion and integrated circuit stacking system and method

#32 | 2005-03-17
US20050056921A1
Electricity

Stacked module systems and methods

#33 | 2005-02-24
US20050041404A1
Electricity

Integrated circuit stacking system and method

#34 | 2005-02-24
US20050041403A1
Electricity

Integrated circuit stacking system

#35 | 2005-02-24
US20050041402A1
Electricity

Integrated circuit stacking system

#36 | 2005-01-27
US20050018412A1
Electricity

Pitch change and chip scale stacking system

#37 | 2005-01-13
US20050009234A1
Electricity

Stacked module systems and methods for CSP packages

InventorID:

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