Jin-Ping Han

Circuitry for one-transistor synapse cell and operation method of the same

One-transistor synapse cell with weight adjustment

One-transistor synapse cell with weight adjustment

Semiconductor device including optimized gate stack profile

Racetrack synapse for neuromorphic applications

Semiconductor devices and methods of manufacture thereof

Methods of fabricating semiconductor devices and structures thereof

Methods of fabricating semiconductor devices and structures thereof

Methods of fabricating semiconductor devices and structures thereof

Methods of fabricating semiconductor devices and structures thereof

Methods of forming p-channel field effect transistors having SiGe source/drain regions

Methods of manufacturing resistors and structures thereof

Methods of Forming Conductive Features and Structures Thereof

Balancing NFET and PFET performance using straining layers

Transistor Structure

Semiconductor Devices and Methods of Manufacture Thereof

Methods of manufacturing resistors and structures thereof

Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same

Threshold voltage improvement employing fluorine implantation and adjustment oxide layer

Semiconductor Devices and Methods of Manufacturing Thereof

Stress optimization in dual embedded epitaxially grown semiconductor processing

Methods of fabricating semiconductor devices and structures thereof

Resistors and Methods of Manufacture Thereof

Semiconductor devices and methods of manufacturing thereof

METAL GATE TRANSISTORS

Semiconductor devices and methods of manufacture thereof

Semiconductor fabrication process including an SiGe rework method

Method for forming isolation structures

Methods of forming conductive features and structures thereof

Transistor fabrication methods and structures thereof

Methods of manufacturing semiconductor devices and structures thereof

COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR DEVICE WITH EMBEDDED STRESSOR

Threshold voltage consistency and effective width in same-substrate device groups

INTEGRATED CIRCUIT SYSTEM EMPLOYING DIFFUSED SOURCE/DRAIN EXTENSIONS

Semiconductor devices and methods of manufacture thereof

Semiconductor devices and methods of manufacture thereof

Device performance improvement using flowfill as material for isolation structures

Channel strain engineering in field-effect-transistor

Semiconductor devices and methods of manufacturing thereof

Semiconductor devices having recesses filled with semiconductor materials

Method of making a strained semiconductor device

Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same

Semiconductor device and method of making same

Semiconductor device structures (gate stacks) with charge compositions

Strained semiconductor device and method of making same

Semiconductor devices and methods of manufacturing thereof

CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereof

Method for fabricating a semiconductor device with a high-K dielectric

Semiconductor devices and methods of manufacture thereof