Inventor profile of:

Elyar E. Gasanov

City:

Moscow

Country:

Russian Federation

Published Applications:

36

Last publication date:

2015-08-13

Top Assignees for applications by Elyar E. Gasanov

The entities that hold a legal rights for patent applications filed by inventor Gasanov Elyar E.:

Recent patent applications by Gasanov Elyar E.

Elyar E. Gasanov from Moscow, RU has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-08-13
US20150229333A1
Electricity

Systems and Methods for Rank Deficient Encoding

#2 | 2015-08-13
US20150229331A1
Electricity

Systems and methods for area efficient data encoding

#3 | 2014-08-07
US20140223267A1
Electricity

RADIX-4 VITERBI FORWARD ERROR CORRECTION DECODING

#4 | 2014-02-06
US20140040342A1
Physics

HIGH SPEED ADD-COMPARE-SELECT CIRCUIT

#5 | 2013-09-12
US20130235907A1
Electricity

Optimization of data processors with irregular patterns

#6 | 2013-01-17
US20130019139A1
Electricity

Variable parity encoder

#7 | 2012-11-08
US20120284731A1
Physics

Two-pass linear complexity task scheduler

#8 | 2012-11-08
US20120281790A1
Electricity

Parallel decoder for multiple wireless standards

#9 | 2012-11-01
US20120278648A1
Physics

Timer manager architecture based on binary heap

#10 | 2012-06-28
US20120166501A1
Physics

COMPUTATION OF JACOBIAN LOGARITHM OPERATION

#11 | 2012-06-07
US20120144274A1
Electricity

Radix-4 viterbi forward error correction decoding

#12 | 2012-05-31
US20120137190A1
Electricity

Reconfigurable encoding per multiple communications standards

#13 | 2012-05-31
US20120134325A1
Electricity

Branch metrics calculation for multiple communications standards

#14 | 2012-05-24
US20120128102A1
Electricity

L-value generation in a decoder

#15 | 2012-05-10
US20120117359A1
Physics

No-delay microsequencer

#16 | 2012-03-01
US20120054586A1
Electricity

Reconfigurable BCH decoder

#17 | 2011-09-29
US20110239079A1
Electricity

Programmable circuit for high speed computation of the interleaver tables for multiple wireless standards

#18 | 2010-11-25
US20100299580A1
Electricity

BCH or reed-solomon decoder with syndrome modification

#19 | 2010-11-04
US20100281344A1
Electricity

Soft reed-solomon decoder based on error-and-erasure reed-solomon decoder

#20 | 2010-06-17
US20100153478A1
Physics

Parallel true random number generator architecture

#21 | 2010-02-04
US20100031127A1
Electricity

Scheme for erasure locator polynomial calculation in error-and-erasure decoder

#22 | 2010-02-04
US20100031126A1
Electricity

System and method for using the universal multipole for the implementation of a configurable binary Bose-Chaudhuri-Hocquenghem (BCH) encoder with variable number of errors

#23 | 2009-06-18
US20090158118A1
Electricity

Configurable Reed-Solomon decoder based on modified Forney syndromes

#24 | 2008-06-26
US20080155381A1
Electricity

Low area architecture in BCH decoder

#25 | 2007-10-04
US20070234255A1
Physics

Ramptime propagation on designs with cycles

#26 | 2007-04-26
US20070094631A1
Physics

Method and apparatus for controlling congestion during integrated circuit design resynthesis

#27 | 2007-03-01
US20070050744A1
Physics

Method of selecting cells in logic restructuring

#28 | 2006-06-08
US20060123369A1
Physics

Ramptime propagation on designs with cycles

#29 | 2006-05-25
US20060112363A1
Physics

Multiple buffer insertion in global routing

#30 | 2006-05-25
US20060112361A1
Physics

Method of selecting cells in logic restructuring

#31 | 2006-03-02
US20060048087A1
Physics

Process and apparatus to assign coordinates to nodes of logical trees without increase of wire lengths

#32 | 2005-09-22
US20050210422A1
Physics

Method and apparatus for performing logical transformations for global routing

#33 | 2005-05-26
US20050114813A1
Physics

Process and apparatus for placement of megacells in ICs design

#34 | 2005-05-26
US20050114804A1
Physics

Method and apparatus for finding optimal unification substitution for formulas in technology library

#35 | 2005-03-15
US10299564
-

Method to find boolean function symmetries

#36 | 2005-01-18
US10027642
-

Multidirectional router

InventorID:

45087 ⎘