Inventor profile of:

Benjamin Thomas Sander

City:

Austin, Texas

Country:

United States

Published Applications:

16

Last publication date:

2024-06-27

Top Assignees for applications by Benjamin Thomas Sander

The entities that hold a legal rights for patent applications filed by inventor Sander Benjamin Thomas:

Recent patent applications by Sander Benjamin Thomas

Benjamin Thomas Sander from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-06-27
US20240211762A1
Physics

OPTIMIZING LOW PRECISION AND SPARSITY INFERENCE WITHOUT RETRAINING

#2 | 2022-03-24
US20220092410A1
Physics

ARCHITECTED LIBRARY INTERFACE FOR KERNEL FUSION

#3 | 2022-03-03
US20220067508A1
Physics

Methods for increasing cache hit rates for neural networks

#4 | 2016-12-22
US20160371116A1
Physics

Heterogeneous enqueuing and dequeuing mechanism for task scheduling

#5 | 2013-10-03
US20130263144A1
Physics

System call queue between visible and invisible computing devices

#6 | 2012-08-02
US20120194526A1
Physics

Task Scheduling

#7 | 2012-07-26
US20120192201A1
Physics

Dynamic work partitioning on heterogeneous processing devices

#8 | 2012-07-12
US20120180072A1
Physics

Optimizing communication of system call requests

#9 | 2012-07-12
US20120180056A1
Physics

Heterogeneous enqueuing and dequeuing mechanism for task scheduling

#10 | 2012-07-12
US20120179851A1
Physics

Computer system interrupt handling

#11 | 2007-05-22
US10135631
-

System and method for modifying a load operation to include a register-to-register move operation in order to forward speculative load results to a dependent operation

#12 | 2006-08-08
US10347822
-

Data speculation based on stack-relative addressing patterns

#13 | 2006-04-04
US10348144
-

Data speculation based on addressing patterns identifying dual-purpose register

#14 | 2005-12-27
US10230925
-

System and method for storing performance-enhancing data in memory space freed by data compression

#15 | 2005-12-13
US10176771
-

Dynamic idle counter threshold value for use in memory paging policy

#16 | 2005-01-18
US10135497
-

System and method of using speculative operand sources in order to speculatively bypass load-store operations

InventorID:

471963 ⎘