Dresden
Germany
35
2019-08-29
The entities that hold a legal rights for patent applications filed by inventor Jakubowski Frank:
Frank Jakubowski from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
MEMS capacitive pressure sensors in fully depleted semiconductor on insulator (FDSOI)
#2 | 2018-08-23Semiconductor device including buried capacitive structures and a method of forming the same
#3 | 2018-06-21SEMICONDUCTOR STRUCTURE INCLUDING ONE OR MORE NONVOLATILE MEMORY CELLS AND METHOD FOR THE FORMATION THEREOF
#4 | 2018-03-27Semiconductor device including buried capacitive structures and a method of forming the same
#5 | 2017-11-02Method of forming a semiconductor device structure and semiconductor device structure
#6 | 2017-08-31Method of forming a semiconductor device structure and semiconductor device structure
#7 | 2016-03-29Integrated circuits with separate workfunction material layers and methods for fabricating the same
#8 | 2015-08-13REPLACEMENT GATE COMPATIBLE eDRAM TRANSISTOR WITH RECESSED CHANNEL
#9 | 2015-05-28Contact structure for a semiconductor device and methods of making same
#10 | 2015-02-05Reduced spacer thickness in semiconductor device fabrication
#11 | 2014-11-13Contact landing pads for a semiconductor device and methods of making same
#12 | 2014-08-28Wafer edge protection
#13 | 2014-07-24Semiconductor device comprising self-aligned contact elements and a replacement gate electrode structure
#14 | 2014-06-12Contact landing pads for a semiconductor device and methods of making same
#15 | 2014-06-05Contact structure for a semiconductor device and methods of making same
#16 | 2014-02-20Methods of forming isolation structures for semiconductor devices by performing a dry chemical removal process
#17 | 2013-12-10Methods of forming isolation structures for semiconductor devices by performing a deposition-etch-deposition sequence
#18 | 2013-10-24Methods of forming bulk FinFET devices so as to reduce punch through leakage currents
#19 | 2013-10-17Methods of recessing an active region and STI structures in a common etch process
#20 | 2013-08-22Methods for fabricating semiconductor devices with isolation regions having uniform stepheights
#21 | 2013-02-28Replacement gate compatible eDRAM transistor with recessed channel
#22 | 2013-01-24High performance HKMG stack for gate first integration
#23 | 2012-12-13Method of removing gate cap materials while protecting active area
#24 | 2012-11-08Semiconductor device with DRAM bit lines made from same material as gate electrodes in non-memory regions of the device, and methods of making same
#25 | 2012-08-30SOI semiconductor device comprising a substrate diode with reduced metal silicide leakage
#26 | 2012-08-23Semiconductor device comprising self-aligned contact elements and a replacement gate electrode structure
#27 | 2012-08-23Semiconductor device comprising self-aligned contact elements
#28 | 2012-07-26STI silicon nitride cap for flat FEOL topology
#29 | 2008-05-29Fabrication method for an integrated circuit structure
#30 | 2008-01-31Method of forming a doped portion of a semiconductor and method of forming a transistor
#31 | 2007-12-20Integrated Circuit Including a Memory Cell Array
#32 | 2006-12-21Memory cell array and method of forming the same
#33 | 2006-10-12Method of manufacturing a semiconductor device
#34 | 2005-12-15Multi-layer gate stack structure comprising a metal layer for a FET device, and method for fabricating the same
#35 | 2005-11-22Method for fabricating a semiconductor structure
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