Sunnyvale, California
United States
26
2016-06-23
The entities that hold a legal rights for patent applications filed by inventor Joshi Amol:
Amol Joshi from Sunnyvale, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Semiconductor Device Metal-Insulator-Semiconductor Contacts with Interface Layers and Methods for Forming the Same
#2 | 2016-03-31Tantalum carbide metal gate stack for mid-gap work function applications
#3 | 2015-12-31Metal-insulator-semiconductor (MIS) contact with controlled defect density
#4 | 2015-10-29Gate structures for transistor devices for CMOS applications and products
#5 | 2015-07-02High Productivity Combinatorial Testing of Multiple Work Function Materials on the Same Semiconductor Substrate
#6 | 2015-05-21Two Step Deposition of High-k Gate Dielectric Materials
#7 | 2015-04-30Reduction of native oxides by annealing in reducing gas or plasma
#8 | 2015-04-02METHODS FOR DEPOSITING AN ALUMINUM OXIDE LAYER OVER GERMANIUM SUSBTRATES IN THE FABRICATION OF INTEGRATED CIRCUITS
#9 | 2015-04-02METHODS FOR REMOVING A NATIVE OXIDE LAYER FROM GERMANIUM SUSBTRATES IN THE FABRICATION OF INTEGRATED CIRCUITS
#10 | 2015-04-02METHODS FOR REMOVING A NATIVE OXIDE LAYER FROM GERMANIUM SUSBTRATES IN THE FABRICATION OF INTEGRATED CIRCUITSI
#11 | 2015-03-05UV treatment for ALD film densification
#12 | 2015-03-05Methods of forming gate structures for transistor devices for CMOS applications
#13 | 2014-10-23System and method for manufacturing self-aligned STI with single poly
#14 | 2014-06-26Method to control depth profiles of dopants using a remote plasma source
#15 | 2014-06-12PVD-ALD-CVD hybrid HPC for work function material screening
#16 | 2014-04-10Sacrificial Low Work Function Cap Layer
#17 | 2014-04-01Method for forming MOS capacitor
#18 | 2014-02-27Circular transmission line methods compatible with combinatorial processing of semiconductors
#19 | 2014-02-04Self-aligned STI with single poly for manufacturing a flash memory device
#20 | 2014-01-09DISTRIBUTED SUBSTRATE TOP CONTACT FOR MOSCAP MEASUREMENTS
#21 | 2013-11-28High productivity combinatorial oxide terracing and PVD/ALD metal deposition combined with lithography for gate work function extraction
#22 | 2011-07-21Dual charge storage node memory device and methods for fabricating such device
#23 | 2011-03-29Dual charge storage node memory device and methods for fabricating such device
#24 | 2008-12-25Memory device and methods for its fabrication
#25 | 2008-10-07Memory device and methods for its fabrication
#26 | 2008-04-03Flash memory cell structure for increased program speed and erase speed
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