Inventor profile of:

Boon Teik Chan

City:

Leuven

Country:

Belgium

Published Applications:

24

Last publication date:

2020-03-12

Top Assignees for applications by Boon Teik Chan

The entities that hold a legal rights for patent applications filed by inventor Chan Boon Teik:

Recent patent applications by Chan Boon Teik

Boon Teik Chan from Leuven, BE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-03-12
US20200083090A1
Electricity

Method for producing a gate cut structure on an array of semiconductor fins

#2 | 2019-11-21
US20190355619A1
Electricity

Area-selective deposition of a tantalum silicide TaSimask material

#3 | 2019-09-05
US20190271660A1
Physics

NANOPORE FORMED THROUGH FIN BY SELF-ALIGNMENT

#4 | 2019-06-27
US20190198643A1
Electricity

VERTICAL CHANNEL DEVICE AND METHOD OF FORMING SAME

#5 | 2019-03-14
US20190079384A1
Physics

Reticles for lithography

#6 | 2019-02-21
US20190057859A1
Electricity

Methods and Systems for Forming a Mask Layer

#7 | 2018-08-23
US20180240699A1
Electricity

Method for blocking a trench portion

#8 | 2018-06-28
US20180182868A1
Electricity

Method for forming horizontal nanowires and devices manufactured thereof

#9 | 2018-06-14
US20180166534A1
Electricity

Method of forming internal spacer for nanowires

#10 | 2018-02-15
US20180043283A1
Performing operations; transporting

Method of forming micro-pipes on a substrate and a structure formed thereof

#11 | 2017-08-24
US20170242335A1
Physics

Metal of ceramic material hardened pattern

#12 | 2017-06-22
US20170179281A1
Electricity

Self-aligned nanostructures for semiconductor devices

#13 | 2017-06-15
US20170170313A1
Electricity

Method of Producing a Pre-Patterned Structure for Growing Vertical Nanostructures

#14 | 2017-06-15
US20170170017A1
Electricity

Method for patterning a substrate involving directed self-assembly

#15 | 2017-06-15
US20170170007A1
Electricity

Method for pattern formation on a substrate, associated semiconductor devices, and uses of the method

#16 | 2017-05-18
US20170141199A1
Electricity

Method for forming a field effect transistor device having an electrical contact

#17 | 2017-04-13
US20170103889A1
Electricity

Method for producing a pillar structure in a semiconductor layer

#18 | 2016-11-03
US20160322461A1
Electricity

Method for producing fin structures of a semiconductor device in a substrate

#19 | 2016-09-01
US20160254161A1
Electricity

Method for patterning an underlying layer

#20 | 2016-06-02
US20160155664A1
Electricity

Metallization method for semiconductor structures

#21 | 2016-04-28
US20160118295A1
Electricity

Method for forming contact vias

#22 | 2015-11-19
US20150333122A1
Electricity

Vertical nanowire semiconductor structures

#23 | 2015-08-27
US20150243509A1
Electricity

Method for producing fin structures of a semiconductor device in a substrate

#24 | 2014-04-03
US20140091435A1
Electricity

Method for block-copolymer lithography

InventorID:

709343 ⎘