Kirkland, Washington
United States
36
2016-06-16
The entities that hold a legal rights for patent applications filed by inventor ECKERT Yasuko:
Yasuko ECKERT from Kirkland, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Traffic rate control for inter-class data migration in a multiclass memory system
#2 | 2016-06-16Batching modified blocks to the same dram page
#3 | 2016-03-24SCHEDULING APPLICATIONS IN PROCESSING DEVICES BASED ON PREDICTED THERMAL IMPACT
#4 | 2016-03-17POWER AND PERFORMANCE MANAGEMENT OF ASYNCHRONOUS TIMING DOMAINS IN A PROCESSING DEVICE
#5 | 2016-03-03Selecting a resource from a set of resources for performing an operation
#6 | 2016-02-18Virtual memory mapping for improved DRAM page locality
#7 | 2016-02-11Cache Bypassing Policy Based on Prefetch Streams
#8 | 2016-02-04DYNAMIC CACHE PREFETCHING BASED ON POWER GATING AND PREFETCHING POLICIES
#9 | 2015-12-24Decoupled selective implementation of entry and exit prediction for power gating processor components
#10 | 2015-07-02CONFIGURING PROCESSOR POLICIES BASED ON PREDICTED DURATIONS OF ACTIVE PERFORMANCE STATES
#11 | 2015-07-02Power gating based on cache dirtiness
#12 | 2015-04-30Dynamic and adaptive sleep state management
#13 | 2015-03-05Specialized memory disambiguation mechanisms for different memory read access types
#14 | 2015-03-05Early write-back of modified data in a cache memory
#15 | 2015-03-05Method and apparatus for memory management
#16 | 2015-02-05Management of caches
#17 | 2015-01-15Query operations for stacked-die memory device
#18 | 2014-10-02Selective cache fills in response to write misses
#19 | 2014-08-07Selecting a resource from a set of resources for performing an operation
#20 | 2014-06-26Idle phase exit prediction
#21 | 2014-06-26Idle Phase Prediction For Integrated Circuits
#22 | 2014-06-26Mechanisms to bound the presence of cache blocks with specific properties in caches
#23 | 2014-06-26Method and system for shutting down active core based caches
#24 | 2014-06-26Mechanisms to bound the presence of cache blocks with specific properties in caches
#25 | 2014-06-26Processing device with independently activatable working memory bank and methods
#26 | 2014-06-12Configuring a cache management mechanism based on future accesses in a cache
#27 | 2014-06-12SPILL DATA MANAGEMENT
#28 | 2014-06-05Tracking Non-Native Content in Caches
#29 | 2014-05-29Using a linear prediction to configure an idle state of an entity in a computing device
#30 | 2014-05-22Methods and apparatus for data cache way prediction based on classification as stack data
#31 | 2014-05-22METHODS AND APPARATUS FOR FILTERING STACK DATA WITHIN A CACHE MEMORY HIERARCHY
#32 | 2014-05-22Stack cache management and coherence techniques
#33 | 2014-05-22Methods and apparatus for soft-partitioning of a data cache for stack data
#34 | 2014-05-22Using predictions for store-to-load forwarding
#35 | 2014-05-15TRACKING MEMORY BANK UTILITY AND COST FOR INTELLIGENT POWER UP DECISIONS
#36 | 2014-05-15TRACKING MEMORY BANK UTILITY AND COST FOR INTELLIGENT SHUTDOWN DECISIONS
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