Biassono
Italy
200
2026-05-21
The entities that hold a legal rights for patent applications filed by inventor Bedeschi Ferdinando:
Ferdinando Bedeschi from Biassono, IT has applied for patents for these inventions. The list has both pending applications and granted patents:
DETECTING ERRORS IN A DATA BLOCK USING MULTIPLE CODEWORDS
#2 | 2026-04-23MEMORY DEVICE DEVICE WITH A THREE-DIMENSIONAL VERTICAL STRUCTURE AND METHOD FOR DRIVING WORD LINES OF THE MEMORY DEVICE
#3 | 2026-04-23MEMORY DEVICE WITH A THREE-DIMENSIONAL VERTICAL STRUCTURE, AND METHOD FOR DRIVING WORD LINES OF THE MEMORY DEVICE
#4 | 2026-03-05TAIL CURRENT BIAS FOR SENSE OPERATIONS IN A MEMORY DEVICE
#5 | 2025-09-04SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
#6 | 2025-06-05READ OPERATIONS BASED ON A DYNAMIC REFERENCE
#7 | 2025-03-13SIGNAL DROP COMPENSATED MEMORY
#8 | 2025-01-09DECODER ARCHITECTURE FOR MEMORY DEVICE
#9 | 2024-10-17TRANSISTOR CONFIGURATIONS FOR VERTICAL MEMORY ARRAYS
#10 | 2024-09-26Shared decoder architecture for three-dimensional memory arrays
#11 | 2024-08-15Parallel access in a memory array
#12 | 2024-07-18MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES
#13 | 2024-06-27THRESHOLD COMPENSATED DETECTOR FOR MEMORY SENSE
#14 | 2024-06-27WORD LINE CHARGE INTEGRATION
#15 | 2024-06-20CURRENT REFERENCES FOR MEMORY CELLS
#16 | 2024-06-13METHOD AND SYSTEM FOR ACCESSING MEMORY CELLS
#17 | 2024-05-30COUNTER-BASED SENSE AMPLIFIER METHOD FOR MEMORY CELLS
#18 | 2024-04-25COUNTER-BASED METHODS AND SYSTEMS FOR ACCESSING MEMORY CELLS
#19 | 2024-02-29Cascoded sense amplifiers for self-selecting memory
#20 | 2024-02-29Forward looking algorithm for vertical integrated cross-point array memory
#21 | 2024-02-01Performing sense operations in memory
#22 | 2024-02-01Memory cell read operation techniques
#23 | 2024-01-11Memory device with improved driver operation and methods to operate the memory device
#24 | 2024-01-11TOGGLING KNOWN PATTERNS FOR READING MEMORY CELLS IN A MEMORY DEVICE
#25 | 2023-12-28Refresh determination using memory cell patterns
#26 | 2023-12-07MEMORY ARRAY SEASONING
#27 | 2023-12-07Transistor configurations for vertical memory arrays
#28 | 2023-10-19Current references for memory cells
#29 | 2023-09-28Multiple transistor architecture for three-dimensional memory arrays
#30 | 2023-09-28Shared decoder architecture for three-dimensional memory arrays
#31 | 2023-09-07Counter-based read in memory device
#32 | 2023-09-07Parallel access in a memory array
#33 | 2023-08-03Program current controller and sense circuit for cross-point memory devices
#34 | 2023-06-29Single plate configuration and memory array operation
#35 | 2023-05-11Counter-based sense amplifier method for memory cells
#36 | 2023-04-13Memory cell sensing using an averaged reference voltage
#37 | 2023-04-13Counter-based methods and systems for accessing memory cells
#38 | 2023-04-06Architecture for multideck memory arrays
#39 | 2023-04-06Systems and methods for adaptive self-referenced reads of memory devices
#40 | 2023-03-16Read algorithm for memory device
#41 | 2023-03-02Systems and methods for pre-read scan of memory devices
#42 | 2023-02-09Signal drop compensated memory
#43 | 2023-01-05Systems and methods for adaptive self-referenced reads of memory devices
#44 | 2022-12-15Signal drop compensated memory
#45 | 2022-12-15Decoder architecture for memory device
#46 | 2022-12-08Voltage equalization for pillars of a memory array
#47 | 2022-11-03Method and system for accessing memory cells
#48 | 2022-11-03On-the-fly programming and verifying method for memory cells based on counters and ECC feedback
#49 | 2022-10-27Memory device with single transistor drivers and methods to operate the memory device
#50 | 2022-10-133D quilt memory array for FeRAM and DRAM
#51 | 2022-10-06Methods and systems for improving access to memory cells
#52 | 2022-09-22System and method for reading memory cells
#53 | 2022-07-21Counter-based read in memory device
#54 | 2022-07-14Techniques for precharging a memory cell
#55 | 2022-06-23Reference voltage management
#56 | 2022-06-09Voltage equalization for pillars of a memory array
#57 | 2022-06-02Decoder architecture for memory device
#58 | 2022-04-21Methods and systems for accessing memory cells
#59 | 2022-03-31Techniques for read operations using switched reference voltages
#60 | 2022-03-31Differential sensing for a memory device
#61 | 2022-03-24MEMORY APPARATUS AND METHOD FOR OPERATING THE SAME
#62 | 2022-03-03Methods and systems for improving read and write of memory cells
#63 | 2022-01-20Method for setting a reference voltage for read operations
#64 | 2022-01-20Source follower-based sensing scheme
#65 | 2022-01-20Arbitrated sense amplifier
#66 | 2022-01-20Read operations based on a dynamic reference
#67 | 2021-12-30Memory array with multiplexed digit lines
#68 | 2021-12-23Read algorithm for memory device
#69 | 2021-10-19Differential sensing for a memory device
#70 | 2021-10-14Sense amplifier with split capacitors
#71 | 2021-09-09Memory cell imprint avoidance
#72 | 2021-09-09On-the-fly programming and verifying method for memory cells based on counters and ECC feedback
#73 | 2021-07-29Sensing techniques for a memory cell
#74 | 2021-07-27Arbitrated sense amplifier
#75 | 2021-07-22Counter-based read in memory device
#76 | 2021-07-15Methods and systems for accessing memory cells
#77 | 2021-07-15System and method for reading memory cells
#78 | 2021-06-17Charge separation for memory sensing
#79 | 2021-06-03Techniques for read operations
#80 | 2021-04-29Memory cells comprising a programmable field effect transistor having a reversibly programmable gate insulator
#81 | 2021-04-29Full bias sensing in a memory array
#82 | 2021-04-01Self-boost, source following, and sense-and-hold for accessing memory cells
#83 | 2021-03-04Word line timing management
#84 | 2021-01-21Sensing techniques for a memory cell
#85 | 2021-01-14Single plate configuration and memory array operation
#86 | 2020-12-10Multiple plate line architecture for multideck memory array
#87 | 2020-11-26Full bias sensing in a memory array
#88 | 2020-10-15Memory array with multiplexed digit lines
#89 | 2020-10-15Reference voltage management
#90 | 2020-10-08Techniques for read operations
#91 | 2020-07-23Techniques for read operations
#92 | 2020-07-02Source follower-based sensing scheme
#93 | 2020-06-23Reference voltage management
#94 | 2020-03-26Self-boost, source following, and sense-and-hold for accessing memory cells
#95 | 2020-03-19Memory cell imprint avoidance
#96 | 2020-03-19Variable filter capacitance
#97 | 2020-03-05Source follower-based sensing scheme
#98 | 2020-02-13Sense amplifier with split capacitors
#99 | 2020-01-02Charge separation for memory sensing
#100 | 2020-01-02Techniques for precharging a memory cell
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