Ottawa
Canada
44
2023-08-10
The entities that hold a legal rights for patent applications filed by inventor OH HakJune:
HakJune OH from Ottawa, CA has applied for patents for these inventions. The list has both pending applications and granted patents:
Non-volatile memory device with concurrent bank operations
#2 | 2021-10-21Non-volatile memory device with concurrent bank operations
#3 | 2020-11-19Non-volatile memory device with concurrent bank operations
#4 | 2019-07-11Non-volatile memory device
#5 | 2018-09-13Non-volatile memory device
#6 | 2018-05-17Memory with output control
#7 | 2017-12-21Flash memory device
#8 | 2017-03-16Flash memory system
#9 | 2016-11-03Dynamic random access memory with fully independent partial array refresh function
#10 | 2016-07-21Flash memory system
#11 | 2014-10-30SYSTEM HAVING ONE OR MORE MEMORY DEVICES
#12 | 2014-08-21Dynamic random access memory with fully independent partial array refresh function
#13 | 2014-07-17Pre-charge voltage generation and power saving modes
#14 | 2014-05-15Memory with output control
#15 | 2014-05-01FLASH MEMORY CONTROLLER HAVING MULTI MODE PIN-OUT
#16 | 2014-03-20Flash memory controller having dual mode pin-out
#17 | 2014-01-30Memory system having a plurality of serially connected devices
#18 | 2013-09-05Memory with output control
#19 | 2013-07-18Data storage and stackable chip configurations
#20 | 2013-05-16PACKAGE HAVING STACKED MEMORY DIES WITH SERIALLY CONNECTED BUFFER DIES
#21 | 2013-03-21APPARATUS AND METHOD FOR ESTABLISHING DEVICE IDENTIFIERS FOR SERIALLY INTERCONNECTED DEVICES
#22 | 2013-03-21Dynamic random access memory with fully independent partial array refresh function
#23 | 2013-02-14Apparatus and method for producing IDs for interconnected devices of mixed type
#24 | 2012-12-20Pre-charge voltage generation and power saving modes
#25 | 2012-08-23Memory with output control
#26 | 2012-05-31Bridge device architecture for connecting discrete memory devices to a system
#27 | 2012-01-26Apparatus and method of page program operation for memory devices with mirror back-up of data
#28 | 2011-10-27System of interconnected nonvolatile memories having automatic status packet
#29 | 2011-10-20STATUS INDICATION IN A SYSTEM HAVING A PLURALITY OF MEMORY DEVICES
#30 | 2011-08-11Bridge device architecture for connecting discrete memory devices to a system
#31 | 2011-07-28Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
#32 | 2011-07-14Dynamic random access memory with fully independent partial array refresh function
#33 | 2011-06-23System and method of operating memory devices of mixed type
#34 | 2011-06-02Apparatus and method of page program operation for memory devices with mirror back-up of data
#35 | 2011-05-26Pre-charge voltage generation and power saving modes
#36 | 2011-05-05Dynamic random access memory device and method for self-refreshing memory cells
#37 | 2011-01-20Apparatus and method for producing identifiers regardless of mixed device type in a serial interconnection
#38 | 2011-01-06Memory with output control
#39 | 2010-12-30Apparatus and method for capturing serial input data
#40 | 2010-10-28Apparatus and method of page program operation for memory devices with mirror back-up of data
#41 | 2010-06-24Apparatus and method for self-refreshing dynamic random access memory cells
#42 | 2010-05-06Data mirroring in serial-connected memory system
#43 | 2009-09-03Pre-charge voltage generation and power saving modes
#44 | 2009-06-25Data storage and stackable configurations
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