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Assignee profile:

Alpha & Omega Semiconductor, Ltd.

City:

Sunnyvale, California

Country:

United States

Published Applications:

15

Last publication date:

2009-10-22

Patent Grants:

15

Last grant date:

2011-04-26

Top Inventors for applications by Alpha & Omega Semiconductor, Ltd.

These are the the leading inventors for applications assigned to Alpha & Omega Semiconductor, Ltd.:

Recent patent applications by Alpha & Omega Semiconductor, Ltd.

Alpha & Omega Semiconductor, Ltd. based in Sunnyvale, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2009-10-22 ✅ Patent 7,933,102 granted on 2011-04-26
US20090262476A1
Electricity

Circuit configurations to reduce snapback of a transient voltage suppressor

 #2 | 2009-07-16 ✅ Patent 8,053,298 granted on 2011-11-08
US20090181503A1
Electricity

Planar split-gate high-performance MOSFET structure and manufacturing method

 #3 | 2009-03-19 ✅ Patent 7,745,878 granted on 2010-06-29
US20090072301A1
Electricity

Shielded gate trench (SGT) MOSFET cells implemented with a schottky source contact

 #4 | 2007-12-06 ✅ Patent 7,855,422 granted on 2010-12-21
US20070281418A1
Electricity

Formation of high sheet resistance resistors and high capacitance capacitors by a single polysilicon process

 #5 | 2007-12-06 ✅ Patent 7,538,997 granted on 2009-05-26
US20070279824A1
Electricity

Circuit configurations to reduce snapback of a transient voltage suppressor

 #6 | 2007-12-06 ✅ Patent 7,504,676 granted on 2009-03-17
US20070278571A1
Electricity

Planar split-gate high-performance MOSFET structure and manufacturing method

 #7 | 2007-09-27 ✅ Patent 7,495,877 granted on 2009-02-24
US20070223166A1
Electricity

Circuit configuration and method to reduce ringing in the semiconductor power switching circuits

 #8 | 2007-08-16 ✅ Patent 8,022,482 granted on 2011-09-20
US20070187751A1
Electricity

Device configuration of asymmetrical DMOSFET with schottky barrier source

 #9 | 2007-08-09 ✅ Patent 7,355,433 granted on 2008-04-08
US20070182435A1
Physics

Configurations and method for carrying out wafer level unclamped inductive switching (UIS) tests

 #10 | 2007-04-19 ✅ Patent 7,829,989 granted on 2010-11-09
US20070085187A1
Electricity

Vertical packaged IC device modules with interconnected 3D laminates directly contacts wafer backside

 #11 | 2007-04-12 ✅ Patent 7,838,977 granted on 2010-11-23
US20070080443A1
Electricity

Packages for electronic devices implemented with laminated board with a top and a bottom patterned metal layers

 #12 | 2007-02-27 ✅ Patent 7,183,616 granted on 2007-02-27
US10208275
-

High speed switching MOSFETS using multi-parallel die packages with/without special leadframes

 #13 | 2006-11-09 ✅ Patent 7,659,570 granted on 2010-02-09
US20060249785A1
Electricity

Power MOSFET device structure for high frequency applications

 #14 | 2006-10-05 ✅ Patent 7,786,531 granted on 2010-08-31
US20060220107A1
Electricity

MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification

 #15 | 2006-09-21 ✅ Patent 7,221,195 granted on 2007-05-22
US20060208788A1
Electricity

MOSFET for synchronous rectification
AssigneeID:

396232 ⎘