Patents-Review.com
ClassID:

189507 ⎘

G06F7/49973 - CPC Classification

Classification description:

Methods or arrangements for processing data by operating upon the order or content of the data handled; Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices; Denomination or exception handling, e.g. rounding or overflow; Significance control; Rounding Rounding towards negative infinity, e.g. truncation of two's complement numbers

Recent Application in this class:
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ASYMMETRICAL QUANTIZATION OF GROUPS OF DATA

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NORMALIZER FOR OPERATING ON FLOATING-POINT DATA

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20240357627
2024-10-24

CONTROL SIGNALING DESIGN FOR IMPROVED RESOURCE UTILIZATION

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20230342112
2023-10-26

Decimal floating-point instruction in a round-for-reround mode

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20230206045
2023-06-29

DEEP LEARNING ACCELERATION WITH MIXED PRECISION

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20230156761
2023-05-18

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2022-07-14

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 #9
20220167375
2022-05-26

Control signaling design for improved resource utilization

 #10
20210295134
2021-09-23

Artificial neural network activation function

 #11
20210029726
2021-01-28

Control signaling design for improved resource utilization

 #12
20210004206
2021-01-07

Prepare for shorter precision (round for reround) mode in a decimal floating-point instruction

 #13
20190377550
2019-12-12

Round for reround mode in a decimal floating point instruction

 #14
20190079730
2019-03-14

Round for reround mode in a decimal floating point instruction

 #15
20180373500
2018-12-27

Compiler controls for program language constructs

 #16
20180373499
2018-12-27

Compiler controls for program language constructs

 #17
20180121165
2018-05-03

Round for reround mode in a decimal floating point instruction

 #18
20170199724
2017-07-13

Round for reround mode in a decimal floating point instruction

 #19
20160306608
2016-10-20

Accumulation of floating-point values

 #20
20140181169
2014-06-26

Method, apparatus, system for single-path floating-point rounding flow that supports generation of normals/denormals and associated status flags

 #21
20090024684
2009-01-22

Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units

 #22
20080215659
2008-09-04

Round for reround mode in a decimal floating point instruction

 #23
20060101107
2006-05-11

Apparatus for controlling rounding modes in single instruction multiple data (SIMD) floating-point units

 #24
20060064454
2006-03-23

Processing unit having decimal floating-point divider using Newton-Raphson iteration