207199 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AB compounds with or without impurities, e.g. doping materials; Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body Alloying of electrode materials
Sub-classes:METHOD FOR MANUFACTURING SUPERJUNCTION TRENCH GATE MOSFET
#2PATTERNING PLATINUM BY ALLOYING AND ETCHING PLATINUM ALLOY
#3SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
#4FIELD EFFECT TRANSISTOR WITH REDUCED SOURCE/DRAIN RESISTANCE
#5Patterning platinum by alloying and etching platinum alloy
#6Wafer-level package structure
#7Wafer-level packaging method and package structure thereof
#8Patterning platinum by alloying and etching platinum alloy
#9Contact formation through low-temperature epitaxial deposition in semiconductor devices
#10Contact formation through low-tempearature epitaxial deposition in semiconductor devices
#11Memory devices including gettering agents in memory charge storage structures
#12MASKLESS METHOD TO REDUCE SOURCE-DRAIN CONTACT RESISTANCE IN CMOS DEVICES
#13Maskless method to reduce source-drain contact resistance in CMOS devices
#14Method of manufacturing a semiconductor device including a ternary alloy layer formed by a microwafe anneal process
#15Apparatus including gettering agents in memory charge storage structures
#16III-V, SiGe, or Ge base lateral bipolar transistor and CMOS hybrid technology
#17Method for forming an electrical contact
#18Gettering agents in memory charge storage structures
#19SiC semiconductor device and method for manufacturing the same
#20III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method
#21III-V, SiGe, or Ge base lateral bipolar transistor and CMOS hybrid technology
#22Techniques to form uniform and stable silicide
#23Semiconductor device and manufacturing method thereof
#24Method for functionalizing a solid substrate, other than a substrate made of gold, via specific chemical compounds
#25Gettering agents in memory charge storage structures
#26Techniques to form uniform and stable silicide
#27Gettering agents in memory charge storage structures
#28SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME