207466 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components; Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
Controlling gate profile by inter-layer dielectric (ILD) nanolaminates
#302Semiconductor device comprising a deep trench isolation structure and a trap rich isolation structure in a substrate and a method of making the same
#303Dam laminate isolation substrate
#304Selective etches for reducing cone formation in shallow trench isolations
#305Semiconductor device and method of fabricating the same
#306Isolation structure and method for manufacturing the same
#307Image sensor including dual isolation and method of making the same
#308Isolation structure having different distances to adjacent FinFET devices
#309Semiconductor device
#310Method for forming semiconductor structure with high aspect ratio
#311Blocking structures on isolation structures
#312Etch stop layer between substrate and isolation structure
#313Array boundfary structure to reduce dishing
#314Method and apparatus of forming high voltage varactor and vertical transistor on a substrate
#315Method and apparatus of forming high voltage varactor and vertical transistor on a substrate
#316Bipolar junction transistor and method for fabricating the same
#317Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing
#318Semiconductor device
#319Semiconductor device having isolation structures with different thicknesses
#320Semiconductor devices and methods of fabricating the same
#321Method of manufacturing integrated circuit device
#322Semiconductor structure cutting process and structures formed thereby
#323FinFET device structure and method for enlarging gap-fill window
#324Hybrid scheme for improved performance for P-type and N-type FinFETs
#325Bulk layer transfer processing with backside silicidation
#326Semiconductor structure and fabrication method thereof
#327Dummy fin structures and methods of forming same
#328CMOS semiconductor device having fins and method of fabricating the same
#329Method of manufacturing semiconductor device including non-volatile memories and logic devices
#330Sinker to buried layer connection region for narrow deep trenches
#331Semiconductor structure and manufacturing method thereof
#332Semiconductor apparatus and manufacturing method for same
#333Method for improving channel hole uniformity of a three-dimensional memory device
#334Method for forming fin field effect transistor (FINFET) device structure
#335Semiconductor structures and fabrication methods thereof
#336Semiconductor memory device and method of manufacturing the same
#337Semiconductor constructions comprising dielectric material, and methods of forming dielectric fill within openings extending into semiconductor constructions
#338MOS transistors in parallel
#339MOS transistors in parallel
#340Method of fabricating a FinFET device
#341Linearity and lateral isolation in a BiCMOS process through counter-doping of epitaxial silicon region
#342Semiconductor structure with a bump having a width larger than a width of fin shaped structures and manufacturing method thereof
#343Technique for defining active regions of semiconductor devices with reduced lithography effort
#344Integrated circuit and method of manufacturing integrated circuit
#345Power metal-oxide-semiconductor field-effect transistor
#346Deep trench protection
#347Semiconductor device having etching control layer in substrate and method of fabricating the same
#348Integrated computing structures formed on silicon
#349Semiconductor device
#350Semiconductor wafer
#351Substrate isolation for low-loss radio frequency (RF) circuits
#352Method for forming an alignment mark
#353Method of forming oxide layer
#354Methods of forming recesses in substrates by etching dummy Fins
#355Shallow trench isolation formation without planarization
#356Semiconductor device having fins
#357Semiconductor structure and fabrication method thereof
#358Method of fabricating floating gates
#359Structure and method for FinFET device with asymmetric contact
#360Self-heating test structure
#361Cyclic flowable deposition and high-density plasma treatment processes for high quality gap fill solutions
#362Semiconductor fabrication methods thereof
#363Substrate isolation for low-loss radio frequency (RF) circuits
#364Structure and method for FinFET device with asymmetric contact
#365Methods of forming a semiconductor device comprising first and second nitride layers
#366Forming conductive plugs for memory device
#367Semiconductor device
#368Fin type field effect transistors with different pitches and substantially uniform fin reveal
#369Power trench capacitor compatible with deep trench isolation process
#370HYBRID COMPUTING MODULE
#371Uniform shallow trench isolation
#372Uniform shallow trench isolation
#373Semiconductor device with field effect transistor
#374Techniques for forming isolation structures in a substrate
#375Gate electrodes with notches and methods for forming the same
#376Fin-type semiconductor device
#377Methods of fabricating semiconductor devices including fin-shaped active regions
#378Semiconductor device having a trench type device isolation film and method for fabricating the same
#379Semiconductor device and manufacturing method thereof
#380Semiconductor device with reduced trench loading effect
#381Method of manufacturing semiconductor device including non-volatile memories and logic devices
#382Semiconductor device having isolation structures with different thickness and method of forming the same
#383Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing
#384SEMICONDUCTOR STRUCTURES AND METHOD FOR FABRICATING THE SAME
#385Laterally diffused metal oxide semiconductor field-effect transistor and manufacturing method therefor
#386Method of patterning target layer
#387Method for local isolation between transistors produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit
#388Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
#389Shallow trench isolation recess process flow for vertical field effect transistor fabrication
#390Hybridization fin reveal for uniform fin reveal depth across different fin pitches
#391Hybridization fin reveal for uniform fin reveal depth across different fin pitches
#392Method of manufacturing isolation structure for semiconductor device
#393Hybridization fin reveal for uniform fin reveal depth across different fin pitches
#394Method of fabricating a semiconductor wafer that includes producing a planarised surface having both a mesa surface and an insulating layer surface
#395Trench isolation structures and methods for forming the same
#396Semiconductor device, related manufacturing method, and related electronic device
#397Dual deep trenches for high voltage isolation
#398Method for forming shallow trenches of the dual active regions
#399Semiconductor devices having 3D channels, and methods of fabricating semiconductor devices having 3D channels
#400FinFET device
#401Technologies for selectively etching oxide and nitride materials and products formed using the same
#402Method of manufacturing a semiconductor structure having a buried raised portion
#403Deep trench isolations and methods of forming the same
#404Solid-state imaging device and electronic apparatus
#405Oxidative volumetric expansion of metals and metal containing compounds
#406Self-aligned dual trench device
#407Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
#408Methods of fabricating semiconductor devices including fin-shaped active regions
#409Fin field effect transistor and manufacturing method thereof
#410Methods for SiOfilling of fine recessed features and selective SiOdeposition on catalytic surfaces
#411Devices and methods for dynamically tunable biasing to backplates and wells
#412LDMOS device
#413Semiconductor device and method for fabricating the same
#414Fin type field effect transistors with different pitches and substantially uniform fin reveal
#415LDMOS transistor
#416SEMICONDUCTOR DEVICE
#417Mechanical stress-decoupling in semiconductor device
#418METHOD OF FORMING SHALLOW TRENCH ISOLATION (STI) STRUCTURES
#419III-N devices in Si trenches
#420Method for manufacturing isolation structure
#421Optical semiconductor device and method for making the device
#422Trench separation diffusion for high voltage device
#423Method of fabricating an integrated circuit with non-printable dummy features
#424Method and apparatus for semiconductor planarization
#425Semiconductor device and method for fabricating the same
#426Uniform dielectric recess depth during fin reveal
#427FinFET device
#428Deep trench isolations and methods of forming the same
#429Double-side process silicon MOS and passive devices for RF front-end modules
#430Hybrid computing module
#431Hybrid computing module
#432Hybrid computing module
#433Polishing compositions and methods of manufacturing semiconductor devices using the same
#434Self-aligned dual trench device
#435Semiconductor devices including device isolation structures and methods of manufacturing the same
#436Through-body via liner deposition
#437Methods for fabricating integrated circuits using flowable chemical vapor deposition techniques with low-temperature thermal annealing
#438Methods of forming an isolation structure and methods of manufacturing a semiconductor device including the same
#439Insulated gate type semiconductor device
#440Undercut insulating regions for silicon-on-insulator device
#441Semiconductor device and method for fabricating the same
#442Semiconductor device
#443High performance isolated vertical bipolar junction transistor and method for forming in a CMOS integrated circuit
#444SEMICONDUCTOR STRUCTURE WITH JUNCTION LEAKAGE REDUCTION
#445Semiconductor device and method for fabricating the same
#446Semiconductor device and method of fabricating the same
#447Integrated circuit (IC) devices including stress inducing layers
#448Directly forming SiGe fins on oxide
#449Integrated circuit device and method of manufacturing the same
#450Semiconductor structure and process thereof
#451LDMOS device and fabrication method thereof
#452Integrated circuits using silicon on insulator substrates and methods of manufacturing the same
#453SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#454SELF ALIGNED RAISED FIN TIP END STI TO IMPROVE THE FIN END EPI QUALITY
#455Method for fabricating shallow trench isolation and semiconductor structure using the same
#456Isolation trench fill using oxide liner and nitride etch back technique with dual trench depth capability
#457Method to improve floating gate uniformity for non-volatile memory devices
#458Semiconductor device, related manufacturing method, and related electronic device
#459Semiconductor structure and manufacturing method thereof
#460Shallow trench isolation structure with raised portion between active areas and manufacturing method thereof
#461Method for FinFET integrated with capacitor
#462Semiconductor structures with isolated ohmic trenches and stand-alone isolation trenches and related method
#463Methods of fabricating semiconductor devices including fin-shaped active regions
#464Shallow trench isolations and method of manufacturing the same
#465Structure to prevent deep trench moat charging and moat isolation fails
#466DEVICE SUBSTRATES, INTEGRATED CIRCUITS AND METHODS FOR FABRICATING DEVICE SUBSTRATES AND INTEGRATED CIRCUITS
#467Semiconductor devices and methods of manufacturing the same
#468Fin deformation modulation
#469Isolation scheme for high voltage device
#470Gate electrodes with notches and methods for forming the same
#471Lateral double diffused metal oxide semiconductor device and manufacturing method thereof
#472Method of forming a semiconductor device
#473FinFETs with different fin height and EPI height setting
#474Polishing liquid for CMP, and polishing method
#475Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
#476Semiconductor devices including a gate core and a fin active core and methods of fabricating the same
#477Integrated circuits with laterally diffused metal oxide semiconductor structures and methods for fabricating the same
#478Solid-state imaging device and electronic apparatus
#479Shallow trench isolation structures in semiconductor device and method for manufacturing the same
#480Silicon-on-insulator integrated circuit devices with body contact structures and methods for fabricating the same
#481Image sensor including dual isolation and method of making the same
#482Semiconductor device and method of manufacturing the same
#483Method of forming a semiconductor device comprising first and second nitride layers
#484Shallow trench isolation structures in semiconductor device and method for manufacturing the same
#485Semiconductor device
#486Low leakage dual STI integrated circuit including FDSOI transistors
#487Dummy gate structure for semiconductor devices
#488Integrated circuit of driving device with different operating voltages
#489Method of forming shallow trench isolation structure
#490Self-aligned dual-height isolation for bulk FinFET
#491Method of fabricating an integrated circuit with non-printable dummy features
#492Shallow trench isolation regions made from crystalline oxides
#493Method of forming shallow trench isolation and semiconductor device
#494METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#495Shallow trench isolation integration methods and devices formed thereby
#496Mechanical stress-decoupling in semiconductor device
#497Planarization process
#498Semiconductor structure and manufacturing method thereof
#499Semiconductor device and method of fabricating the same
#500Semiconductor Device Having Shallow Trench Isolation and Method of Forming the Same
#501Insulating trench forming method
#502Process of forming an electronic device having a termination region including an insulating region
#503Semiconductor device and a method of manufacturing the same and designing the same
#504Varied STI liners for isolation structures in image sensing devices
#505Semiconductor integrated circuit device and process for manufacturing the same
#506Semiconductor structure with a doped region between two deep trench isolation structures
#507Semiconductor device and method for producing the same
#508FABRICATION OF SEMICONDUCTOR STRUCTURES USING OXIDIZED POLYCRYSTALLINE SILICON AS CONFORMAL STOP LAYERS
#509Semiconductor device having buried channel array
#510Planarization process
#511Semiconductor substrate for photonic and electronic structures and method of manufacture
#512Semiconductor memory device and method of manufacturing the same
#513METHOD FOR MANUFACTURING SHALLOW TRENCH ISOLATION
#514III-N devices in Si trenches
#515METHOD OF MODIFYING POLYSILICON LAYER THROUGH NITROGEN INCORPORATION FOR ISOLATION STRUCTURE
#516Isolation trench fill using oxide liner and nitride etch back technique with dual trench depth capability
#517Dual trench structure
#518Method for fabricating semiconductor device including isolation layer
#519Semiconductor device and method of manufacturing the same
#520Methods of fabricating isolation regions of semiconductor devices and structures thereof
#521Self-aligned dual-height isolation for bulk FinFET
#522Replacement gate structures and methods of manufacturing
#523Lateral double diffused metal oxide semiconductor device and manufacturing method thereof
#524Photomask and method for forming dual STI structure by using the same
#525Packaged semiconductor device, a semiconductor device and a method of manufacturing a packaged semiconductor device
#526Nanoscale silicon Schottky diode array for low power phase change memory application
#527Mechanism of forming a trench structure
#528Semiconductor device and method of manufacturing the same
#529Semiconductor devices and fabrication methods thereof
#530Semiconductor devices having carbon-contained porous insulation over gate stack structures
#531FinFet device with channel epitaxial region
#532Semiconductor structures with shallow trench isolations
#533Isolation scheme for bipolar transistors in BiCMOS technology
#534Scaling of bipolar transistors
#535Fin deformation modulation
#536Insulation of micro structures
#537Method for FinFET integrated with capacitor
#538Component, for example NMOS transistor, with active region with relaxed compression stresses, and fabrication method
#539METHOD OF FORMING ISOLATING STRUCTURE AND THROUGH SILICON VIA
#540Semiconductor device and method for fabricating the same
#541METHOD FOR FORMING DUAL STI STRUCTURE
#542Semiconductor substrate for photonic and electronic structures and method of manufacture
#543Nonvolatile memory device and method for fabricating the same
#544Nonvolatile memory device and method for fabricating the same
#545Nonvolatile memory device and method for fabricating the same
#546Patterns of a semiconductor device and method of manufacturing the same
#547Semiconductor device with isolation layer, electronic device having the same, and method for fabricating the same
#548Semiconductor device having fin structure and method of manufacturing the same
#549Semiconductor device and manufacturing method thereof
#550Varied STI liners for isolation structures in image sensing devices
#551Semiconductor device and method for forming the same
#552Semiconductor device and method for forming the same
#553Methods of fabricating nonvolatile memory devices including voids between active regions and related devices
#554Plasma etching apparatus
#555Shallow trench isolation integration methods and devices formed thereby
#556Methods of fabricating semiconductor devices including fin-shaped active regions
#557Method of forming patterns for semiconductor device
#558High performance isolated vertical bipolar junction transistor and method for forming in a CMOS integrated circuit
#559Method of forming substrate contact for semiconductor on insulator (SOI) substrate
#560Semiconductor device and method for forming the same
#561Double trench well formation in SRAM cells
#562Isolation scheme for bipolar transistors in BiCMOS technology
#563Semiconductor device having buried channel array
#564Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
#565Reverse tone STI formation and epitaxial growth of semiconductor between STI regions
#566Method of manufacturing a semiconductor device including dummy regions and dummy wirings
#567Integrated diode array and corresponding manufacturing method
#568Manufacturing method for a shallow trench isolation
#569Methods of forming transistors and methods of manufacturing semiconductor devices including the transistors
#570Non-volatile memory having discrete isolation structure and SONOS memory cell, method of operating the same, and method of manufacturing the same
#571Vertical gated access transistor
#572Semiconductor devices including a gate structure between active regions, and methods of forming semiconductor devices including a gate structure between active regions
#573Method of manufacturing solid-state image sensor
#574Semiconductor device with buried bitline and method for fabricating the same
#575Semiconductor device and method of manufacturing the same
#576Semiconductor device and method of manufacturing the same
#577Semiconductor memory device and method of manufacturing the same
#578Semiconductor integrated circuit device and process for manufacturing the same
#579Dishing-free gap-filling with multiple CMPs
#580Method of multiple patterning to form semiconductor devices
#581Hybrid computing module
#582Forming inter-device STI regions and intra-device STI regions using different dielectric materials
#583Undercut insulating regions for silicon-on-insulator device
#584High breakdown voltage LDMOS device
#585Semiconductor device and method for fabricating the same
#586Semiconductor device and method of manufacturing the same
#587Semiconductor structure and fabrication method
#588Method of making a FinFET device
#589Process for fabricating an integrated circuit having trench isolations with different depths
#590Methods of reducing substrate dislocation during gapfill processing
#591Methods for fabricating FinFET integrated circuits on bulk semiconductor substrates
#592Method for simultaneously forming features of different depths in a semiconductor substrate
#593SOI device with DTI and STI
#594Vertical polysilicon-germanium heterojunction bipolar transistor
#595Dual profile shallow trench isolation apparatus and system
#596Gate electrodes with notches and methods for forming the same
#597Apparatus and method for integration of through substrate vias
#598Replacement gate structures and methods of manufacturing
#599Structure and method for FinFET integrated with capacitor
#600Structure and method for placement, sizing and shaping of dummy structures