207470 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components; Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
EMBEDDED MULTI-TIME PROGRAMMABLE (MTP) FLOATING GATE MEMORY IN A SEMICONDUCTOR-ON-INSULATOR (SOI) COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) PROCESS
#2METHOD AND APPARATUS FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) INTEGRATED THERMOPILE DESIGN
#3PDSOI TRANSISTOR AND METHOD FOR FABRICATING SAME
#4PDSOI TRANSISTOR AND METHOD FOR FABRICATING SAME
#5SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
#6STRUCTURES INCLUDING AN ISOTOPICALLY-DEPLETED SEMICONDUCTOR LAYER
#7INTEGRATED CIRCUIT CHIP COMPRISING A RADIOFREQUENCY COMPONENT
#8Method of Fabricating SOI Device with Carbon in Body Regions
#9SOI Device with Carbon in Body Regions
#10SILICON-ON-INSULATOR (SOI) CARRIER CHIP AND METHODS OF MANUFACTURE THEREOF
#11Method for Fabricating SOI with Carbon and Body Dopants
#12SEMICONDUCTOR DEVICE WITH MULTIPLE DEVICE REGIONS AND METHOD OF FABRICATION THEREFOR
#13CUT-FIN ISOLATION REGIONS AND METHOD FORMING SAME
#14GROUP III-NITRIDE SEMICONDUCTOR STRUCTURE ON SILICON-ON-INSULATOR AND METHOD OF GROWING THEREOF
#15SOI SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
#16STRUCTURE OF HIGH-RESISTIVITY SILICON-ON-INSULATOR EMBEDDED WITH CHARGE CAPTURE LAYER AND MANUFACTURE THEREOF
#17DEVICE ISOLATION STRUCTURE AND MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE
#18SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
#19TRANSISTOR BASED ON COMPACT DRAIN AND HETERO-MATERIAL STRUCTURE
#20HEAT SINK FOR SOI
#21SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR DEVICES
#22ISOLATOR
#23METHOD OF MANUFACTURING SOI WAFER
#24SOI Structures with Carbon in Body Regions for Improved RF-SOI Switches
#25SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF
#26Integrated Structure of MOS Transistors Having Different Working Voltages and Method for Manufacturing Same
#27FINFET ISOLATION STRUCTURE
#28METHODS FOR SIMULTANEOUS GENERATION OF A TRAP-RICH LAYER AND A BOX LAYER
#29SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
#30Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#31METHOD FOR MANUFACTURING SOI WAFER
#32PROCESS OF SURFACE TREATMENT OF SOI WAFER
#33Body-Source-Tied Transistor
#34FDSOI device structure and preparation method thereof
#35Backside electrical contacts to buried power rails
#36SEMICONDUCTOR ON INSULATOR STRUCTURE COMPRISING A BURIED HIGH RESISTIVITY LAYER
#37Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#38Epitaxial Growth Method for FDSOI Hybrid Region
#39Method for manufacturing body-source-tied SOI transistor
#40PROCESS FOR HYDROPHILICALLY BONDING SUBSTRATES
#41Method for manufacturing FDSOI
#42Semiconductor devices and methods of manufacturing thereof
#43Manufacturing method of radiofrequency device including mold compound layer
#44Isolation method to enable continuous channel layer
#45FDSOI device structure and preparation method thereof
#46Isolator
#47Semiconductor structure with an air gap
#48Cut-fin isolation regions and method forming same
#49SONOS Memory and Method for Making the Same
#50Body-source-tied semiconductor-on-insulator (SOI) transistor
#51METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
#52Isolator
#53CREATING AN IMPLANTED LAYER IN A SILICON-ON-INSULATOR (SOI) WAFER THROUGH CRYSTAL ORIENTATION CHANNELING
#54Method of manufacturing semiconductor device
#55Semiconductor structure with an air gap
#56Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#57D-type flip-flop circuit
#58Multilayer stack of semiconductor-on-insulator type, associated production process, and radio frequency module comprising it
#59Nanosheet (NS) and fin field-effect transistor (FinFET) hybrid integration
#60Method of manufacturing semiconductor device having buried gate electrodes
#61Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#62Wafer-scale fabrication of optical apparatus
#63FinFET isolation structure
#64Preventing dielectric void over trench isolation region
#65Removable structure and removal method using the structure
#66Lateral double-diffused metal oxide semiconductor component and manufacturing method therefor
#67Semiconductor-on-insulator (SOI) device with reduced parasitic capacitance
#68Leakage control for gate-all-around field-effect transistor devices
#69Semiconductor wafer having integrated circuits with bottom local interconnects
#70Method for manufacturing semiconductor structure
#71SEMICONDUCTOR PACKAGE WITH SILICON CRYSTAL STRUCTURE
#72Method of manufacturing semiconductor device having buried gate electrodes
#73Integrated circuit (IC) device
#74Substrates with self-aligned buried dielectric and polycrystalline layers
#75Fin structure and method for manufacturing the same
#76Self-aligned gate cut in direct stacked vertical transport field effect transistor (VTFET)
#77Dummy gate isolation and method of production thereof
#78Semiconductor on insulator structure comprising a buried high resistivity layer
#79FinFET isolation structure
#80Semiconductor manufacturing process
#81Method for manufacturing SOI wafer
#82Radiofrequency device and manufacturing method thereof
#83Cut-fin isolation regions and method forming same
#84Etching using chamber with top plate formed of non-oxygen containing material
#85Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#86Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#87Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate
#88Quantum device comprising FET transistors and qubits co-integrated on the same substrate
#89Electronic device and method of manufacturing the same
#90Transistor and its manufacturing process
#91Method of manufacturing semiconductor apparatus
#92Fully depleted SOI device for reducing parasitic back gate capacitance
#93Semiconductor device, CMOS circuit, and electronic apparatus with stress in channel region
#94Semiconductor on insulator structure comprising a buried high resistivity layer
#95Method for producing bonded SOI wafer
#96Semiconductor device and fabricating method of the same
#97Method for Thinning Substrates
#98SEMICONDUCTOR ON INSULATOR SUBSTRATE
#99Methods for processing a 3D semiconductor device
#100BONDED WAFER PRODUCTION METHOD AND BONDED WAFER
#101Fully depleted SOI device for reducing parasitic back gate capacitance
#102Semiconductor chip, semiconductor wafer and method for manufacturing semiconductor wafer
#103Etching using chamber with top plate formed of non-oxygen containing material
#104Method for fabricating FinFET isolation structure
#105Semiconductor substrate structures, semiconductor devices and methods for forming the same
#106Method of fabrication of a semiconductor element comprising a highly resistive substrate
#107Fully depleted SOI device for reducing parasitic back gate capacitance
#108On-chip DC-DC power converters with fully integrated GaN power switches, silicon CMOS transistors and magnetic inductors
#109PREPARATION OF SILICON-GERMANIUM-ON-INSULATOR STRUCTURES
#110Semiconductor film with adhesion layer and method for forming the same
#111METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#112Method of manufacturing silicon on insulator substrate
#113Nanowire semiconductor device including lateral-etch barrier region
#114Method for manufacturing semiconductor structure
#115Local SOI fins with multiple heights
#116Channel silicon germanium formation method
#117Method for thinning substrates
#118FinFET isolation structure and method for fabricating the same
#119Semiconductor structure and method for manufacturing the same
#120Method of forming a semiconductor device with STI structures on an SOI substrate
#121Nanowire semiconductor device including lateral-etch barrier region
#122Nanowire semiconductor device including lateral-etch barrier region
#123Vertically integrated memory cell
#124Aspect ratio for semiconductor on insulator
#125Local SOI fins with multiple heights
#126Insulated gate bipolar transistor structure having low substrate leakage
#127Method of manufacturing semiconductor device and semiconductor device
#128DEVICE CONNECTION THROUGH A BURIED OXIDE LAYER IN A SILICON ON INSULATOR WAFER
#129Semiconductor film with adhesion layer and method for forming the same
#130FINFET SEMICONDUCTOR DEVICE HAVING LOCAL BURIED OXIDE
#131Saucer-shaped isolation structures for semiconductor devices
#132Isolation structures for semiconductor devices including trenches containing conductive material
#133Trap rich layer formation techniques for semiconductor devices
#134Device with isolation buffer
#1351T SRAM/DRAM
#136Defective P-N junction for backgated fully depleted silicon on insulator mosfet
#137Semiconductor film with adhesion layer and method for forming the same
#138Forming isolated fins from a substrate
#139FinFET with dielectric isolation by silicon-on-nothing and method of fabrication
#140Semiconductor device having diffusion barrier to reduce back channel leakage
#141Process for faciltiating fin isolation schemes
#142Isolation structures for semiconductor devices
#143Method for improving anti-radiation performance of SOI structure
#144Method for manufacturing composite wafers
#145Methods of forming a Field Effect Transistor, including forming a region providing enhanced oxidation
#146Semiconductor device having diffusion barrier to reduce back channel leakage
#147Insulated gate bipolar transistor structure having low substrate leakage
#148Semiconductor-on-insulator (SOI) substrates with ultra-thin SOI layers and buried oxides
#149FinFET device fabrication using thermal implantation
#150Insulated gate bipolar transistor structure having low substrate leakage
#151On-chip radiation dosimeter
#152Optoelectronic integrated circuit substrate and method of fabricating the same
#153METHOD OF PRODUCING SOI WAFER
#154Buried metal-semiconductor alloy layers and structures and methods for fabrication thereof
#155Etching method and etching apparatus of semiconductor wafer
#156Method for manufacturing semiconductor device having SOI substrate
#157WAFER PROCESSING METHOD
#158Process for treating a semiconductor-on-insulator structure
#159Method for forming semiconductor substrate isolation
#160Epitaxial wafer and production method thereof
#161Method for manufacturing nitride semiconductor crystal layer
#162SOI wafer, method for producing same, and method for manufacturing semiconductor device
#163Method of producing a layer of cavities
#164Method for manufacturing components
#165Si and SiGeC on a buried oxide layer on a substrate
#166Processes for forming isolation structures for integrated circuit devices
#167Semiconductor devices and methods of forming the same
#168Contoured insulator layer of silicon-on-insulator wafers and process of manufacture
#169Semiconductor having optimized insulation structure and process for producing the semiconductor
#170EPITAXIAL WAFER AND METHOD OF PRODUCING THE SAME
#171METHOD OF PRODUCING BONDED SUBSTRATE
#172Semiconductor device and method of manufacturing the same
#173Method for manufacturing SIMOX wafer and SIMOX wafer
#174Method for manufacturing SOI substrate
#175Method for producing a bonded wafer
#176Method of manufacturing a SOI structure having a SiGe layer interposed between the silicon and the insulator
#177Method for manufacturing SIMOX wafer
#178Method of producing bonded silicon wafer
#179METHOD FOR MAKING A THERMALLY-STABLE SILICIDE
#180SOI substrates and SOI devices, and methods for forming the same
#181Nonvolatile semiconductor memory device and manufacturing method thereof
#182Method for reducing crystal defect of SIMOX wafer and SIMOX wafer
#183High mobility tri-gate devices and methods of fabrication
#184METHOD FOR PRODUCING HIGH-RESISTANCE SIMOX WAFER
#185Three-dimensional silicon on oxide device isolation
#186Epitaxial wafer and production method thereof
#187Etching method and etching apparatus of semiconductor wafer
#188Semiconductor substrate, semiconductor device, and method for manufacturing the semiconductor device
#189Method for producing bonded wafer
#190METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
#191Isolation structures for integrated circuits
#192Method of manufacturing SOI substrate
#193Method for producing bonded wafer
#194Method for producing semiconductor substrate and semiconductor substrate
#195Method of manufacturing a semiconductor device and such a semiconductor device
#196METHOD FOR MANUFACTURING SIMOX WAFER AND SIMOX WAFER
#197Method of fabricating patterned SOI devices and the resulting device structures
#198Strained semiconductor-on-insulator (sSOI) by a simox method
#199METHOD FOR MANUFACTURING SIMOX WAFER AND SIMOX WAFER MANUFACTURED THEREBY
#200Semiconductor device having SOI substrate and method for manufacturing the same
#201Semiconductor-on-insulator substrate with a diffusion barrier
#202Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer
#203Fabrication of SOI with gettering layer
#204Method for producing strained Si-SOI substrate and strained Si-SOI substrate produced by the same
#205SIMOX WAFER MANUFACTURING METHOD AND SIMOX WAFER
#206Vertical quadruple conduction channel insulated gate transistor
#207Buried metal-semiconductor alloy layers and structures and methods for fabrication thereof
#208Method of forming alternating regions of Si and SiGe or SiGeC on a buried oxide layer on a substrate
#209Isolation structures for integrated circuits
#210Isolation structures for integrated circuits
#211Isolation structures for integrated circuits
#212Semiconductor substrate and method for production thereof
#213Method for manufacturing SOI substrate
#214Hybrid substrates and methods for forming such hybrid substrates
#215Method for Manufacturing Simox Substrate and Simox Substrate Obtained by this Method
#216Method of manufacturing bonded wafer
#217Method for manufacturing SOI substrate
#218Isolated junction field-effect transistor
#219Isolation structures for integrated circuit devices
#220Isolated bipolar transistor
#221Method for manufacturing SOI wafer
#222Processes for forming isolation structures for integrated circuit devices
#223Isolated CMOS transistors
#224Patterned silicon-on-insulator layers and methods for forming the same
#225Production method of semiconductor device and semiconductor device
#226SEMICONDUCTOR DEVICES WITH BURIED ISOLATION REGIONS
#227Method of fabricating a semiconductor device
#228Method of fabricating a semiconductor device
#229Manufacturing method for SIMOX substrate
#230Method of fabricating a semiconductor device
#231Method of fabricating a semiconductor device
#232Method of fabricating a semiconductor device
#233Method of forming isolation structure in semiconductor substrate
#234Isolation structures for integrated circuits and modular methods of forming the same
#235Method for Manufacturing Simox Substrate and Simox Substrate Obtained by the Method
#236Modular methods of forming isolation structures for integrated circuits
#237STRUCTURE AND METHOD FOR MIXED-SUBSTRATE SIMOX TECHNOLOGY
#238SEMICONDUCTOR WAFER AND MANUFACTURING METHOD THEREOF
#239SEMICONDUCTOR WAFER AND MANUFACTURING METHOD THEREOF
#240Silicon-on-insulator semiconductor wafer
#241Hybrid substrate technology for high-mobility planar and multiple-gate MOSFETS
#242Isolation structures for integrated circuits and modular methods of forming the same
#243Methods of fabricating semiconductor devices having isolation regions formed from annealed oxygen ion implanted regions
#244Method of producing SIMOX wafer
#245Method for manufacturing simox wafer
#246SOI substrate, silicon substrate therefor and it's manufacturing method
#247Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors
#248Method of producing SIMOX wafer
#249Method of producing SIMOX wafer
#250Method of producing simox wafer
#251Method for making a thermally stable silicide
#252SOI substrates and SOI devices, and methods for forming the same
#253Method for producing silicon wafer and silicon wafer
#254Method for manufacturing SIMOX wafer
#255Method for manufacturing semiconductor substrate
#256Semiconductor having optimized insulation structure and process for producing the semiconductor
#257Method of fabricating a semiconductor device
#258Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
#259Method for manufacturing SIMOX wafer
#260Buried silicon dioxide / silicon nitride bi-layer insulators and methods of fabricating the same
#261Strained semiconductor-on-insulator (sSOI) by a simox method
#262Method for producing SOI substrate and SOI substrate
#263Method for manufacturing an SOI substrate
#264Device having active regions of different depths
#265SOI substrate with selective oxide layer thickness control
#266Process for manufacturing silicon-on-insulator substrate
#267Process for producing high-resistance silicon wafers and process for producing epitaxial wafers and SOI wafers
#268Horizontal memory devices with vertical gates
#269Insulation layer for silicon-on-insulator wafer
#270Method for manufacturing SIMOX wafer and SIMOX wafer
#271Chemical-mechanical polishing (CMP) slurry containing clay and CeO2 abrasive particles and method of planarizing surfaces
#272Patterned silicon-on-insulator layers and methods for forming the same
#273Method for manufacturing SIMOX wafer and SIMOX wafer
#274Nano wires and method of manufacturing the same
#275Method for manufacturing SIMOX wafer
#276Methods of fabricating silicon nitride regions in silicon carbide and resulting structures
#277Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom
#278Semiconductor devices with buried isolation regions
#279Method for manufacturing substrate
#280Selective deposition
#281Structure and method for mixed-substrate SIMOX technology
#282Method for manufacturing semiconductor substrate and semiconductor substrate
#283Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a buried insulating layer
#284Manufacturing method of silicon on insulator wafer
#285Raised STI process for multiple gate ox and sidewall protection on strained Si/SGOI sructure with elevated source/drain
#286Manufacturing method of silicon on insulator wafer
#287Ultrathin buried insulators in Si or Si-containing material
#288Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer
#289Isotopically pure silicon-on-insulator wafers and methods of making same
#290Soi wafer and a method for producing the same
#291Method for manufacturing a hybrid semiconductor wafer having a buried oxide film
#292SOI structure having a SiGe layer interposed between the silicon and the insulator
#293Method of producing SOI wafer and SOI wafer
#294Dual SIMOX hybrid orientation technology (HOT) substrates
#295Semiconductor device and its manufacturing method
#296Semiconductor wafer and manufacturing method thereof
#297High mobility tri-gate devices and methods of fabrication
#298Method of fabricating shallow trench isolation by ultra-thin simox processing
#299Hybrid substrate technology for high-mobility planar and multiple-gate MOSFETs
#300Raised STI process for multiple gate ox and sidewall protection on strained Si/SGOI structure with elevated source/drain