207475 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components; Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
SEMICONDUCTOR DEVICE
#2Transient Stabilized SOI FETs
#3METHODS OF FORMING A SEMICONDUCTOR DEVICE INCLUDING ACTIVE PATTERNS ON A BONDING LAYER AND SEMICONDUCTOR DEVICES FORMED BY THE SAME
#4SELECTIVE POLYSILICON GROWTH FOR DEEP TRENCH POLYSILICON ISOLATION STRUCTURE
#53DIC STRUCTURE FOR HIGH VOLTAGE DEVICE ON A SOI SUBSTRATE
#6SEMICONDUCTOR ON INSULATOR HAVING A SEMICONDUCTOR LAYER WITH DIFFERENT THICKNESSES
#7Transient stabilized SOI FETs
#8METHOD FOR MANUFACTURING SOURCE/DRAIN EPITAXIAL LAYER OF FDSOI MOSFET
#9METHODS AND DEVICES RELATED TO RADIO FREQUENCY DEVICES
#10SEMICONDUCTOR-ON-INSULATOR FIELD-EFFECT TRANSISTORS INCLUDING STRESS-INDUCING COMPONENTS
#11MANUFACTURING METHOD OF GATE STRUCTURE
#12Method for forming a semiconductor-on-insulator (SOI) substrate
#13Forming an oxide volume within a fin
#14SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#15MOS TRANSISTOR ON SOI STRUCTURE
#16Memory devices including strings of memory cells, and related electronic systems
#17SEMICONDUCTOR DEVICE
#18Semiconductor device including element isolation film and method for fabricating the same
#19SUBSTRATE AND METHOD FOR MONOLITHIC INTEGRATION OF ELECTRONIC AND OPTOELECTRONIC DEVICES
#20Semiconductor on insulator having a semiconductor layer with different thicknesses
#213DIC structure for high voltage device on a SOI substrate
#22Method for forming a semiconductor-on-insulator (SOI) substrate
#23Selective polysilicon growth for deep trench polysilicon isolation structure
#24Multiple thickness semiconductor-on-insulator field effect transistors and methods of forming the same
#25Structures for radiofrequency applications and related methods
#26Transistor with embedded isolation layer in bulk substrate
#27Transient stabilized SOI FETs
#28Methods of forming a semiconductor device including active patterns on a bonding layer and semiconductor devices formed by the same
#29High-transparency semiconductor-metal interfaces
#30Methods and devices related to radio frequency devices
#31Method of fabricating semiconductor device
#32Treating a silicon on insulator wafer in preparation for manufacturing an atomistic electronic device interfaced with a CMOS electronic device
#33Microelectronic devices including conductive structures, and related methods
#34Transistor with embedded isolation layer in bulk substrate
#35THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
#36Screening method and apparatus for detecting deep trench isolation and SOI defects
#37Multiple thickness semiconductor-on-insulator field effect transistors and methods of forming the same
#38Integrated structure and manufacturing method thereof
#39Heterolithic microwave integrated circuits including gallium-nitride devices on intrinsic semiconductor
#40Semiconductor memory device having spacer capping pattern disposed between burried dielectic pattern and an air gap and method of fabricating same
#41Semiconductor structure and method for forming the same
#42Heterolithic integrated circuits including integrated devices formed on semiconductor materials of different elemental composition
#43Methods of semiconductor device processing
#44Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive
#45Treating a silicon on insulator wafer in preparation for manufacturing an atomistic electronic device interfaced with a CMOS electronic device
#46Structures for radiofrequency applications and related methods
#47Airgap vertical transistor without structural collapse
#48Integrated power amplifier
#49Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
#50Etch stop member in buried insulator of SOI substrate to reduce contact edge punch through
#51Methods and devices related to radio frequency devices
#52Forming an oxide volume within a fin
#53Semiconductor device having conducting member for electrically coupling gate structure to underlying substrate of SOI structure
#54Airgap vertical transistor without structural collapse
#55Methods of forming a semiconductor device including active patterns on a bonding layer and semiconductor devices formed by the same
#56Transient stabilized SOI FETs
#57Semiconductor wafer having integrated circuits with bottom local interconnects
#58Mode converter and method of fabricating thereof
#59Semiconductor Device Including Protection Structure and Manufacturing Method Therefor
#60Semiconductor device having a radio frequency circuit and a method for manufacturing the semiconductor device
#61Capacitance balance in dual sided contact switch
#62SOI substrate compatible with the RFSOI and FDSOI technologies
#63Method for forming a semiconductor-on-insulator (SOI) substrate
#64Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
#65Semiconductor structure and method for forming the same
#66Method for manufacturing semiconductor device
#67Silicon controlled rectifier (SCR) based ESD protection device
#68Method of manufacture of a FinFET device
#69Semiconductor device and method for fabricating the same
#70Heterolithic microwave integrated circuits including gallium-nitride devices on highly doped regions of intrinsic silicon
#71Radio frequency switches with air gap structures
#72Method of forming FinFET channel and structures thereof
#73Circuit and an electronic device including a transistor and a component and a process of forming the same
#74Performing concurrent diffusion break, gate and source/drain contact cut etch processes
#75Semiconductor device with common active area and method for manufacturing the same
#76Integrated circuit with improved resistive region
#77Semiconductor device and method of fabricating the same
#78DEVICE STRUCTURES FORMED WITH A SILICON-ON-INSULATOR SUBSTRATE THAT INCLUDES A TRAP-RICH LAYER
#79Integrated structure and manufacturing method thereof
#80Mode converter and method of fabricating thereof
#81Heterolithic microwave integrated circuits including gallium-nitride devices formed on highly doped semiconductor
#82Heterolithic microwave integrated circuits including gallium-nitride devices on intrinsic semiconductor
#83Structure for radiofrequency applications
#84MOSFETs with channels on nothing and methods for forming the same
#85Laterally diffused metal oxide semiconductor (LDMOS) transistor on a semiconductor on insulator (SOI) layer with a backside device
#86Semiconductor device and method for manufacturing the same
#87THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
#88SOI substrate compatible with the RFSOI and FDSOI technologies
#89Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
#90Transient stabilized SOI FETs
#91Terahertz detector comprised of p-n junction diode
#92Techniques for creating a local interconnect using a SOI wafer
#93Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer
#94Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
#95Terahertz detector comprised of P-N junction diode
#96Integrated circuit capable of operating at very high voltage and method of fabricating same
#97Integrated circuit with improved resistive region
#98Semiconductor devices with low junction capacitances and methods of fabrication thereof
#99Semiconductor devices and methods for forming semiconductor devices
#100Semiconductor device, vehicle-mounted semiconductor device, and vehicle-mounted control device
#101Semiconductor device
#102Semiconductor chip, semiconductor wafer and method for manufacturing semiconductor wafer
#103Cascoded high voltage junction field effect transistor
#104Method of manufacture of a FinFET device
#105Bipolar junction transistor (BJT) base conductor pullback
#106Method for preparing trench isolation structure
#107Thermally enhanced semiconductor package having field effect transistors with back-gate feature
#108Method for the formation of transistors PDSO1 and FDSO1 on a same substrate
#109MOSFETs with channels on nothing and methods for forming the same
#110Method of forming FinFET channel and structures thereof
#111FDSOI-capacitor
#112Compliant bipolar micro device transfer head with silicon electrodes
#113Silicon controlled rectifier (SCR) based ESD protection device
#114Method of localized modification of the stresses in a substrate of the SOI type, in particular FD SOI type, and corresponding device
#115Semiconductor device and method of fabricating the same
#116Radio frequency isolation for SOI transistors
#117Substrates with buried isolation layers and methods of formation thereof
#118Methods of forming strained-semiconductor-on-insulator device structures
#119SUBSTRATE-TRANSFERRED, DEEP TRENCH ISOLATION SILICON-ON-INSULATOR (SOI) SEMICONDUCTOR DEVICES FORMED FROM BULK SEMICONDUCTOR WAFERS
#120Method of fabricating a transistor channel structure with uniaxial strain
#121Semiconductor devices having air spacers and methods of manufacturing the same
#122Raised e-fuse
#123PHOTONIC DEVICES WITH THROUGH DIELECTRIC VIA INTERPOSER
#124Semiconductor devices
#125FETS and methods of forming FETS
#126Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device
#127PROCESS FOR PRODUCING MOS TRANSISTORS HAVING A LARGER CHANNEL WIDTH FROM AN SOI AND IN PARTICULAR FDSOI SUBSTRATE, AND CORRESPONDING INTEGRATED CIRCUIT
#128Semiconductor device and manufacturing method thereof
#129Compliant bipolar micro device transfer head with silicon electrodes
#130Method of manufacturing P-channel FET device with SiGe channel
#131Electrostatic discharge protection circuits and structures and methods of manufacture
#132Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer
#133Method of forming FinFET channel
#134Bipolar junction transistor (BJT) base conductor pullback
#135Methods of forming fin isolation regions under tensile-strained fins on FinFET semiconductor devices
#136FDSOI—capacitor
#137Semiconductor isolation structure with air gaps in deep trenches
#138High resistance layer for III-V channel deposited on group IV substrates for MOS transistors
#139Electronic device, physical quantity sensor, pressure sensor, altimeter, electronic apparatus, and moving object
#140MOSFETs with channels on nothing and methods for forming the same
#141High breakdown voltage LDMOS device
#142PARTIAL FIN ON OXIDE FOR IMPROVED ELECTRICAL ISOLATION OF RAISED ACTIVE REGIONS
#143Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method
#144Techniques for creating a local interconnect using a SOI wafer
#145Semiconductor device and method of manufacturing the same
#146Semiconductor device with isolating layer on side and bottom surfaces
#147Cascoded high voltage junction field effect transistor
#148Method of manufacturing a high breakdown voltage III-nitride device
#149Semiconductor-on-insulator device and method of fabricating the same
#150Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates
#151Methods for forming semiconductor device structures
#152Integrated circuit and manufacturing method thereof
#153Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer
#154Semiconductor device and method for forming the same
#155Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device
#156METHODS FOR FABRICATING MULTIPLE-GATE INTEGRATED CIRCUITS
#157Integrated circuit using deep trench through silicon (DTS)
#158MOSFETs with channels on nothing and methods for forming the same
#159Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer
#160SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
#161Single-chip multi-domain galvanic isolation device and method
#162Semiconductor device and method of manufacturing the same
#163Gate length independent silicon-on-nothing (SON) scheme for bulk FinFETs
#164Semiconductor device
#165Semiconductor structure having column III-V isolation regions
#166Techniques for providing a semiconductor memory device
#167Methods of forming strained-semiconductor-on-insulator device structures
#168Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates
#169Electronic device including shallow trench isolation (STI) regions with bottom nitride liner and upper oxide liner and related methods
#170Methods for forming semiconductor device structures
#171High breakdown voltage III-nitride device
#172High breakdown voltage LDMOS device
#173Dual shallow trench isolation liner for preventing electrical shorts
#174Semiconductor isolation structure with air gaps in deep trenches
#175SOI substrate with acceptor-doped layer
#176Method for producing an electronic device by assembling semi-conducting blocks and corresponding device
#177MOSFETs with channels on nothing and methods for forming the same
#178Extremely thin semiconductor-on-insulator (ETSOI) layer
#179Structure of very high insertion loss of the substrate noise decoupling
#180Pressure sensor and method for manufacturing pressure sensor
#181Semiconductor devices with low junction capacitances
#182Method of forming isolation structures for SOI devices with ultrathin SOI and ultrathin box
#183Method for manufacturing semiconductor device having SOI substrate
#184Semiconductor switching circuit employing quantum dot structures
#185Structure and method of forming enhanced array device isolation for implanted plate EDRAM
#186High voltage diode with reduced substrate injection
#187SEMICONDUCTOR DEVICE
#188SOI radio frequency switch with enhanced electrical isolation
#189FORMING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER
#190Semiconductor component with isolation trench intersections
#191Structure and method of forming enhanced array device isolation for implanted plate eDRAM
#192Deep trench electrostatic discharge (ESD) protect diode for silicon-on-insulator (SOI) devices
#193Semiconductor device having low resistivity region under isolation layer
#194MOS DEVICE FOR ELIMINATING FLOATING BODY EFFECTS AND SELF-HEATING EFFECTS
#195Semiconductor integrated circuit with high withstand voltage element forming trench isolation on substrate
#196Methods for forming semiconductor device structures
#197Semiconductor device and method of manufacturing semiconductor device
#198Method for manufacturing components
#199Si and SiGeC on a buried oxide layer on a substrate
#200Chip-stacked semiconductor device and manufacturing method thereof
#201Chip-stacked semiconductor and manufacturing method thereof
#202SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#203Memory cell with a channel buried beneath a dielectric layer
#204Manufacturing approach for collector and a buried layer of bipolar transistor
#205Hybrid substrate with improved isolation and simplified method for producing a hybrid substrate
#206Production of isolation trenches with different sidewall dopings
#207III-nitride monolithic IC
#208Semiconductor devices and methods of forming the same
#209Semiconductor apparatus
#210Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured
#211Structure of very high insertion loss of the substrate noise decoupling
#212Isolation structures for SOI devices with ultrathin SOI and ultrathin box
#213Semiconductor device
#214Forming an extremely thin semiconductor-on-insulator (ETSOI) layer
#215Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same
#216LOCAL BURIED LAYER FORMING METHOD AND SEMICONDUCTOR DEVICE HAVING SUCH A LAYER
#217MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
#218III-V semiconductor device structures
#219Semiconductor device having SOI substrate
#220SEMICONDUCTOR DEVICE HAVING LOCALIZED INSULATED BLOCK IN BULK SUBSTRATE AND RELATED METHOD
#221Structure and method of forming enhanced array device isolation for implanted plate EDRAM
#222Process of forming an electronic device including insulating layers having different strains
#223Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device
#224SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same
#225Semiconductor memory device
#226SOI radio frequency switch with enhanced electrical isolation
#227Semiconductor switching circuit employing quantum dot structures
#228Methods of fabrication of semiconductor devices with low capacitance
#229Semiconductor devices and methods of manufacture thereof
#230Pedestal guard ring having continuous M1 metal barrier connected to crack stop
#231INSULATED WELL WITH A LOW STRAY CAPACITANCE FOR ELECTRONIC COMPONENTS
#232SEMICONDUCTOR DEVICE
#233Method of manufacturing semiconductor storage device
#234Method for producing stacked and self-aligned components on a substrate
#235Semiconductor device having buried insulation films and method of manufacturing the same
#236SOI device with contact trenches formed during epitaxial growing
#237Deep trench electrostatic discharge (ESD) protect diode for silicon-on-insulator (SOI) devices
#238Integrated circuit structure having bottle-shaped isolation
#239Method for fabricating semiconductor device having radiation hardened insulators
#240High voltage diode with reduced substrate injection
#241Area efficient 3D integration of low noise JFET and MOS in linear bipolar CMOS process
#242Border region defect reduction in hybrid orientation technology (HOT) direct silicon bonded (DSB) substrates
#243STI Structure At SOI/Bulk Transition For HOT Device
#244Isolation technique allowing both very high and low voltage circuits to be fabricated on the same chip
#245Semiconductor device and fabrication method thereof
#246Strained-silicon-on-insulator single-and double-gate MOSFET and method for forming the same
#247MOSFET and manufacturing method thereof
#248SEMICONDUCTOR CHIP AND METHOD FOR MANUFACTURING THE SAME AND SEMICONDUCTOR DEVICE
#249Semiconductor device and method for manufacturing the same
#250Method of fabricating a non-floating body device with enhanced performance
#251Structure for a latchup robust array I/O using through wafer via
#252Semiconductor on insulator (SOI) switching circuit
#253Semiconductor structure
#254Grounding front-end-of-line structures on a SOI substrate
#255Semiconductor on insulator (SOI) structure with more predictable junction capacitance and method for fabrication
#256Semiconductor device and method of manufacturing semiconductor device
#257Structure of very high insertion loss of the substrate noise decoupling
#258Semiconductor device and method for fabricating the same
#259Semiconductor device having SOI substrate and method for manufacturing the same
#260Semiconductor device and method for manufacture
#261Semiconductor device and method for fabricating the same
#262Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same
#263ISOLATION TRENCH STRUCTURE FOR HIGH ELECTRIC STRENGTH
#264Method of manufacturing a semiconductor device and semiconductor device obtained by means of said method
#265Semiconductor device and method of fabricating the same
#266Semiconductor device having multiple element formation regions and manufacturing method thereof
#267Method of manufacturing semiconductor storage device
#268Semiconductor devices and methods of manufacture thereof
#269Method of forming alternating regions of Si and SiGe or SiGeC on a buried oxide layer on a substrate
#270Method of forming a field effect transistor
#271Flexible and elastic dielectric integrated circuit
#272METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#273Semiconductor device and method of manufacturing the same
#274Design structure incorporating a hybrid substrate
#275Post-logic isolation of silicon regions for an integrated sensor
#276Structure of high-frequency components with low stray capacitances
#277Chip-stacked semiconductor device and manufacturing method thereof
#278SOI transistor having drain and source regions of reduced length and a stressed dielectric material adjacent thereto
#279Radio frequency semiconductor device
#280Radio frequency isolation for SOI transistors
#281Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method
#282SEMICONDUCTOR DEVICE INCLUDING A RECESSED-CHANNEL-ARRAY MISFET
#283Isolation and termination structures for semiconductor die
#284Electronic device including insulating layers having different strains
#285Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device
#286Methods for forming III-V semiconductor device structures
#287Electronic device including a conductive structure extending through a buried insulating layer
#288Field effect transistor comprising a stressed channel region and method of forming the same
#289Strained Si/SiGe/SOI islands and processes of making same
#290SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#291Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured
#292Twisted dual-substrate orientation (DSO) substrates
#293SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#294Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer
#295SOI device with reduced junction capacitance
#296STRUCTURES AND METHODS FOR MANUFACTURING HIGH DENSITY NARROW WIDTH MOSFETS
#297SOI device with contact trenches formed during epitaxial growing
#298Backside contacts for MOS devices
#299Method of manufacturing a semiconductor integrated circuit and semiconductor integrated circuit
#300Semiconductor device and method for manufacturing the semiconductor device