SOI device with contact trenches formed during epitaxial growing

Semiconductor device including a capacitance

Backside contacts for MOS devices

Protect diodes for hybrid-orientation substrate structures

Device having dual etch stop liner and protective layer

Method of fabricating heterojunction photodiodes with CMOS

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Nonvolatile semiconductor memory device

MULTIPLE DIELECTRIC FINFET STRUCTURE AND METHOD

Semiconductor memory device and method of manufacturing the same

Method for producing SiGebased zones with different contents in Ge on a same substrate by condensation of germanium

Bipolar transistor, BiCMOS device, and method for fabricating thereof

Three dimensional integrated circuit and method of design

Memory array having a programmable word length, and method of operating same

Semiconductor device and IC label, IC tag, and IC card having the same

Apparatus and method for controlled particle beam manufacturing

Semiconductor memory device and method of manufacturing the same

Curled semiconductor transistor

Method for producing SiGebased zones with different contents in Ge on a same substrate by condensation of germanium

Semiconductor device and manufacturing method of the same

Apparatus and method for controlled particle beam manufacturing

Apparatus and method for controlled particle beam manufacturing

Apparatus and method for controlled particle beam manufacturing

Dual surface SOI by lateral epitaxial overgrowth

Trench liner for DSO integration

Engineering strain in thick strained-SOI substrates

Semiconductor device and manufacturing method thereof

Semiconductor device

Semiconductor integrated circuit devices having high-Q wafer back-side capacitors

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

STRUCTURE AND METHOD FOR IMPLEMENTING OXIDE LEAKAGE BASED VOLTAGE DIVIDER NETWORK FOR INTEGRATED CIRCUIT DEVICES

Asymmetric channel doping for improved memory operation for floating body cell (FBC) memory

Nonvolatile semiconductor memory device

Integrated Circuit with a Transistor Structure Element

Apparatus and method for controlled particle beam manufacturing

Apparatus and method for controlled particle beam manufacturing

Apparatus and method for controlled particle beam manufacturing

Semiconductor device and method of manufacturing same

Reliable Contacts

Electronic devices including a semiconductor layer

Strained HOT (hybrid orientation technology) MOSFETs

Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices

Dual wired integrated circuit chips

Silicon-on-insulator structures

Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors

Semiconductor memory device

Semiconductor device having a frontside contact and vertical trench isolation and method of fabricating same

Transistors having v-shape source/drain metal contacts

Selective uniaxial stress relaxation by layout optimization in strained silicon on insulator integrated circuit

Semiconductor device and method of manufacturing the same

SOI SUBSTRATE AND SEMICONDUCTOR INTEGRATED CIRUIT DEVICE

Semiconductor device and method for manufacturing semiconductor device

Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels

Electrostatic discharge protection device and method of fabricating same

Method of forming transistor structure having stressed regions of opposite types

Methods and apparatus for implementing bit-by-bit erase of a flash memory device

Semiconductor device

Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistors

Integrated circuit chip with FETs having mixed body thickness and method of manufacture thereof

Semiconductor memory device including an SOI substrate

SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES AND SEMICONDUCTOR DEVICES USING VOID SPACES

Body-tied MOSFET device with strained active area

Wireless chip

Semiconductor Device and Method for Manufacturing the Same

Semiconductor integrated circuit, manufacturing method thereof, and semiconductor device using semiconductor integrated circuit

Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions

Method of manufacturing a semiconductor integrated circuit and semiconductor integrated circuit

Structure and method for implementing oxide leakage based voltage divider network for integrated circuit devices

Semiconductor device with Cu metal-base and manufacturing method thereof

Hybrid orientation SOI substrates, and method for forming the same

Semiconductor device including a current mirror circuit

Semiconductor element, semiconductor device and methods for manufacturing thereof

SOI transistor having a reduced body potential and a method of forming the same

SOI transistor having an embedded strain layer and a reduced floating body effect and a method for forming the same

Semiconductor device and method for manufacturing the same

Patterning sub-lithographic features with variable widths

Method for fabricating a semiconductor component including a high capacitance per unit area capacitor

Process of forming an electronic device including a layer formed using an inductively coupled plasma

Method of forming silicon-on-insulator wafer having reentrant shape dielectric trenches

CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING

Electronic device including a semiconductor layer and a sidewall spacer and a process of forming the same

Dynamic memory cell structures

Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions

Method of making a multi-gate device

Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer

Semiconductor device formed on a SOI substrate

Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor

Semiconductor device having a schottky source/drain transistor

Semiconductor memory and read method of the same

Field-effect-transistor multiplexing/demultiplexing architectures

High density memory array having increased channel widths

Nonvolatile semiconductor memory device

Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates

Method of making a multiple crystal orientation semiconductor device

Process of forming an electronic device including a seed layer and a semiconductor layer selectively formed over the seed layer

Semiconductor device structure

Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof

Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same

Silicon device on Si:C SOI and SiGe and method of manufacture

Method for fabricating a semiconductor device

Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers

Shallow trench isolation fill by liquid phase deposition of SiO

Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same

Semiconductor device

SEMICONDUCTOR DEVICE

Structure and method of integrating compound and elemental semiconductors for high-performance CMOS

Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions

Protection against charging damage in hybrid orientation transistors

Silicon device on Si:C-OI and SGOI and method of manufacture

Semiconductor storage device having an SOI structure

Semiconductor device with increased channel area and fabrication method thereof

Nonvolatile semiconductor storage device with floating gate electrode and control gate electrode

Nonvolatile semiconductor memory device

Method and manufacturing low leakage MOSFETs and FinFETs

Nonvolatile semiconductor memory device and manufacturing method thereof

Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride

Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors

HYBRID INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

Castellated gate MOSFET device capable of fully-depleted operation

Semiconductor device with increased channel area and decreased leakage current

Grounding front-end-of-line structures on a SOI substrate

Nonvolatile semiconductor memory device

Process of forming an electronic device including a semiconductor island over an insulating layer

Selective silicon deposition for planarized dual surface orientation integration

Silicon deposition over dual surface orientation substrates to promote uniform polishing

Fully-depleted castellated gate MOSFET device and method of manufacture thereof

Integration of strained Ge into advanced CMOS technology

Interlayer dielectric under stress for an integrated circuit

Method of manufacturing semiconductor device

Semiconductor constructions, and methods of forming semiconductor constructions

Methods of forming single crystalline layers and methods of manufacturing semiconductor devices having such layers

SOI substrates and SOI devices, and methods for forming the same

Integrated Circuit Chip With Electrostatic Discharge Protection Device

Integrated passive device substrates

Stacked non-volatile memory with silicon carbide-based amorphous silicon thin film transistors

Semiconductor device and method for manufacturing the same

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Integrated circuit with bulk and SOI devices connected with an epitaxial region

Multiple-gate device with floating back gate

Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage

Dynamic random access memory

SEMICONDUCTOR MEMORY DEVICE

Process for forming an electronic device including semiconductor layers having different stresses

Method for manufacturing CMOS circuits

Lateral bipolar transistor

Programmable anti-fuse structures, methods for fabricating programmable anti-fuse structures, and methods of programming anti-fuse structures

CMOS device on hybrid orientation substrate comprising equal mobility for perpendicular devices of each type

Method for separately optimizing spacer width for two transistor groups using a recess spacer etch (RSE) integration

FinFET body contact structure

Method for separately optimizing spacer width for two or more transistor classes using a recess spacer integration

Dual stressed SOI substrates

Method of fabricating a body capacitor for SOI memory

Multi-orientation semiconductor-on-insulator (SOI) substrate, and method of fabricating same

Embedded substrate interconnect for underside contact to source and drain regions

Method for manufacturing semiconductor device

Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain

Phosphorous doping methods of manufacturing field effect transistors having multiple stacked channels

Poly filled substrate contact on SOI structure

Thin film transistor circuit and display utilizing the same

Semiconductor device having a first circuit block isolating a plurality of circuit blocks

Eeprom memory cell for high temperatures

CMOS structure and method including multiple crystallographic planes

Method to selectively form regions having differing properties and structure

ENHANCED SILICON-ON-INSULATOR (SOI) TRANSISTORS AND METHODS OF MAKING ENHANCED SOI TRANSISTORS

Strained silicon-on-insulator transistors with mesa isolation

Ultra-thin logic and backgated ultra-thin SRAM

Integrated circuit device and electronic instrument

NAND-type semiconductor storage device and method for manufacturing same

Semiconductor memory device and manufacturing method thereof

Method for double-sided processing of thin film transistors

Opto-thermal mask including aligned thermal dissipative layer, reflective layer and transparent capping layer

Manufacturing method of memory element, laser irradiation apparatus, and laser irradiation method

Method and process intermediate for electrostatic discharge protection in flat panel imaging detectors

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method for the same

Semiconductor memory device and method for fabricating the same

Semiconductor device and method for fabricating the same

Method for fabricating semiconductor device

Method of manufacturing semiconductor substrate, method of manufacturing semiconductor device, and semiconductor device

Electrostatic discharge protection device and method of fabricating same

Semiconductor device and method of manufacturing the semiconductor device

STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS

NROM flash memory devices on ultrathin silicon

Nonvolatile ferroelectric memory device

Nonvolatile ferroelectric memory device

Nanoparticles and method for making the same

Buried silicon dioxide / silicon nitride bi-layer insulators and methods of fabricating the same

Method for fabricating semiconductor vertical NROM memory cells

Memory device and fabrication method thereof

Device fabrication by anisotropic wet etch

Strained Si on multiple materials for bulk or SOI substrates

Inductors fabricated from spiral nanocoils and fabricated using noncoil spiral pitch control techniques

Semiconductor device and method of fabricating the same

Structure and method for MOSFET gate electrode landing pad

Semiconductor device and manufacturing method thereof

Semiconductor device and method for manufacturing the same

Semiconductor memory device and method of operating same

Methods of manufacturing a three-dimensional semiconductor device and semiconductor devices fabricated thereby

Methods of applying substrate bias to SOI CMOS circuits

Semiconductor device having SOI substrate

Thin silicon single diffusion field effect transistor for enhanced drive performance with stress film liners

Semiconductor device with cells each having a trench capacitor and a switching transistor thereon

Semiconductor device having SOI structure

D/A conversion circuit and semiconductor device

Technique for forming an isolation trench as a stress source for strain engineering

Method for cutting liquid crystal display panel and method for fabricating liquid crystal display panel using the same

Fully depleted silicon on insulator semiconductor devices

Semiconductor device and manufacturing method of semiconductor device

Manufacturing method of semiconductor device

Mixed orientation semiconductor device and method

SEMICONDUCTOR DEVICE AND METHOD FOR REGIONAL STRESS CONTROL

Integrated semiconductor device and method of manufacturing thereof

Independently controlled, double gate nanowire memory cell with self-aligned contacts

Metal gate CMOS with at least a single gate metal and dual gate dielectrics

Semiconductor device

Silicon-on-insulator chip having multiple crystal orientations

Semiconductor device and manufacturing method thereof

Epitaxial imprinting

Laser processing apparatus and laser processing process

Radiation hardened isolation structures and fabrication methods

Integrated circuits and methods of forming a field effect transistor

Semiconductor device and method of manufacturing the same

Semiconductor device

Plasma etching method

Back-gated semiconductor device with a storage layer and methods for forming thereof

Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same

Method and structure to create multiple device widths in FinFET technology in both bulk and SOI

Methods and structures for planar and multiple-gate transistors formed on SOI

Stacked non-volatile memory device and methods for fabricating the same

Diode-based memory including floating-plate capacitor and its applications

Diode-based capacitor memory and its applications

Phase change memory including diode access device

A content addressable memory including capacitor memory cell

Integrated circuit on corrugated substrate

Semiconductor device having stressors and method for forming

Semiconductor device and method of manufacturing the same

Semiconductor device and method of fabricating the same background

Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate

Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density

Method and structure for buried circuits and devices

SRAM cell with improved layout designs

Semiconductor device and manufacturing method thereof

Semiconductor substrate, semiconductor device and process for producing semiconductor substrate

Dual-gate device and method

FIN FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING FIN FIELD EFFECT TRANSISTOR

Methods for fabricating nanocoils

METHODS TO FORM HETEROGENEOUS SILICIDES/GERMANIDES IN CMOS TECHNOLOGY

TECHNIQUE FOR REDUCING CRYSTAL DEFECTS IN STRAINED TRANSISTORS BY TILTED PREAMORPHIZATION

Stress engineering using dual pad nitride with selective SOI device architecture

Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk semiconductor regions

Semiconductor memory device and method for operating the same

CMOS compatible shallow-trench efuse structure and method

Semiconductor device and manufacturing method thereof

Coiled circuit device with active circuitry and methods for making the same

Fabrication of semiconductor devices

CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and method of forming same

Non-volatile semiconductor memory element and method of manufacturing the same, and semiconductor integrated circuit device including the non-volatile semiconductor memory element

Fin field effect transistors including epitaxial fins

Vertical replacement-gate silicon-on-insulator transistor

High mobility plane FinFETs with equal drive strength

Semiconductor device

FET Channel Having a Strained Lattice Structure Along Multiple Surfaces

Method for processing laser-irradiated thin films having variable thickness

Process for production of SOI substrate and process for production of semiconductor device

Semiconductor device including insulated gate type transistor and insulated gate type variable capacitance, and method of manufacturing the same

Electronic devices including a semiconductor layer and a process for forming the same

Semiconductor device and method of manufacturing the same

Rotated field effect transistors and method of manufacture

Method and Structure of Multi-Surface Transistor Device

Method for producing distinct first and second active semi-conducting zones and use thereof for fabricating C-MOS structures

BIPOLAR TRANSISTOR AND BACK-GATED TRANSISTOR STRUCTURE AND METHOD

Dual SOI structure

CMOS transistors using gate electrodes to increase channel mobilities by inducing localized channel stress

Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

Device having active regions of different depths

Structure and method of fabricating FINFET with buried channel

Compact integrated capacitor

Technique for providing multiple stress sources in NMOS and PMOS transistors

Technique for strain engineering in Si-based Transistors by using embedded semiconductor layers including atoms with high covalent radius

Embedded strain layer in thin SOI transistors and a method of forming the same

Semiconductor device and manufacturing method thereof

Methods and apparatuses for fluidic self assembly

Semiconductor device and method of manufacturing the same

Semiconductor substrate with multiple crystallographic orientations

Process for forming an electronic device including transistor structures with sidewall spacers

Method of fabricating a semiconductor device having self-aligned floating gate and related device

Method of producing the same

Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate

Semiconductor MIS transistor formed on SOI semiconductor substrate

Semiconductor device and manufacturing method of the same

Method for making a semiconductor structure using silicon germanium

Optical ready substrates

Technique for creating different mechanical strain by a contact etch stop layer stack with an intermediate etch stop layer

Fabrication of small scale matched bi-polar TVS devices having reduced parasitic losses

Three-dimensional integrated circuit structure

Nonvolatile semiconductor memory device

SONOS type two-bit FinFET flash memory cell