Semiconductor memory device and method for manufacturing the same

Semiconductor device and semiconductor device manufacturing method

Methods for fabrication of a stressed MOS device

Semiconductor device and semiconductor device production system

Method of fabricating CMOS devices having a single work function gate electrode by band gap engineering and article made thereby

Stress engineering using dual pad nitride with selective SOI device architecture

Ultra high density flash memory

Recursive spacer defined patterning

Multiple crystal orientations on the same substrate

Method for forming non-volatile memory devices

Trench metal-insulator-metal (MIM) capacitors and method of fabricating same

Semiconductor device and method of manufacturing the same, and semiconductor substrate and method of manufacturing the same

Methods for integrating lattice-mismatched semiconductor structure on insulators

Lattice-mismatched semiconductor structures on insulators

Semiconductor memory device including an SOI substrate

Hybrid Schottky source-drain CMOS for high mobility and low barrier

Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate

Method of fabricating a semiconductor device having a single gate electrode corresponding to a pair of fin-type channel regions

Modified hybrid orientation technology

Process for producing semiconductor integrated circuit device

Method of manufacturing a stacked semiconductor device

Fully-depleted (FD) (SOI) MOSFET access transistor and method of fabrication

Programmable random logic arrays using PN isolation

Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor

Technique for forming recessed strained drain/source regions in NMOS and PMOS transistors

Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures

Apparatus and method for controlled particle beam manufacturing

Deposition of silicon germanium on silicon-on-insulator structures and bulk substrates

Integrating three-dimensional high capacitance density structures

Manufacturing method of semiconductor device

Growing [110] silicon on [001] oriented substrate with rare-earth oxide buffer film

Semiconductor device and method of fabricating same

Method of manufacturing semiconductor device having impurity region under isolation region

Semiconductor wafer and method of fabricating the same

Semiconductor device having a trench isolation and method of fabricating the same

Semiconductor device and manufacturing method thereof

Reducing the dielectric constant of a portion of a gate dielectric

Low-cost high-performance planar back-gate CMOS

Shield plate electrode for semiconductor device

SOI device with reduced drain induced barrier lowering

Method of fabricating semiconductor side wall fin

Dielectric isolated body biasing of silicon on insulator

Method for manufacturing a semiconductor substrate and method for manufacturing a semiconductor device

Semiconductor device

Structure and method of applying localized stresses to the channels of PFET and NFET transistors for improved performance

Method of forming double gate transistors having varying gate dielectric thicknesses

Reverse construction memory cell

Stacked semiconductor device and related method

Buried stress isolation for high-performance CMOS technology

High performance capacitors in planar back gates CMOS

Piezoelectric stress liner for bulk and SOI

Semiconductor device with trench structure

Power gating schemes in SOI circuits in hybrid SOI-epitaxial CMOS structures

Semiconductor device and semiconductor device manufacturing method

Non-volatile memory cells and methods for fabricating non-volatile memory cells

Stacked transistors and process

Semiconductor device and manufacturing method thereof

Mixed orientation and mixed material semiconductor-on-insulator wafer

Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same

Semiconductor device with multi-trench separation region and method for producing the same

Epitaxial imprinting

Semiconductor device and method for manufacturing semiconductor device

Semiconductor-on-insulator (SOI) strained active areas

Semiconductor devices utilizing double gated fully depleted silicon on insulator MOS transistors

Vertical MOSFET SRAM cell

Semiconductor device with effective heat-radiation

Field effect transistor and manufacturing method thereof

Memory cell comprising a thin film three-terminal switching device having a metal source and /or drain region

SOI bipolar transistors with reduced self heating

Integrated circuit on corrugated substrate

Methods for patterning a semiconductor film

Element fabrication substrate

High performance transistors with hybrid crystal orientations

Semiconductor device and method for fabricating a semiconductor device

Dense pitch bulk FinFET process by selective EPI and etch

CMOS on SOI substrates with hybrid crystal orientations

STORAGE DEVICES FORMED ON PARTIALLY ISOLATED SEMICONDUCTOR SUBSTRATE ISLANDS

Semiconductor device having an active area partially isolated by a lateral cavity

Semiconductor device and manufacturing method of the same

Semiconductor device including a capacitance

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Crystal imprinting methods for fabricating substrates with thin active silicon layers

Method for forming an electronic device

Thin layer structure and method of forming the same

Floating body memory cell system and method of manufacture

Area diode formation in SOI application

Process for holding strain in an island etched in a strained thin layer and structure obtained by implementation of this process

Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same

Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates

Method for integrating silicon CMOS and AlGaN/GaN wideband amplifiers on engineered substrates

Back-side trapped non-volatile memory device

Capacitorless DRAM on bulk silicon

Method of growing a germanium epitaxial film on insulator for use in fabrication of CMOS integrated circuit

Apparatus and methods for multi-gate silicon-on-insulator transistors

Capacitorless DRAM on bulk silicon

Integrated circuit and method for manufacturing an integrated circuit

Semiconductor device with electrostrictive layer in semiconductor layer and method of manufacturing the same

Semiconductor memory device, semiconductor device, and method for production thereof

Three-dimensional integrated circuit structure and method of making same

Strained silicon CMOS on hybrid crystal orientations

System and method based on field-effect transistors for addressing nanometer-scale devices

Protect diodes for hybrid-orientation substrate structures

Semiconductor device comprising an integrated circuit

Semiconductor device and method of manufacturing same

Semiconductor device using partial SOI substrate and manufacturing method thereof

Manufacturing method of semiconductor device including peeling step

High performance strained CMOS devices

Semiconductor device and method of manufacturing the same

Strained Si/SiGe/SOI islands and processes of making same

Semiconductor device including insulated gate type transistor and insulated gate type capacitance, and method of manufacturing the same

Semiconductor device including single crystal silicon layer

Semiconductor device and method of manufacturing the same

Semiconductors bonded on glass substrates

Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness

Method of manufacturing semiconductor device

Electronic device including a trench field isolation region and a process for forming the same

Semiconductor wafer, semiconductor device and manufacturing method of semiconductor device

Method for fabricating SOI device

Ultra high density flash memory

Gettering of silicon on insulator using relaxed silicon germanium epitaxial proximity layers

Semiconductor device and method of manufacturing the same

Low crosstalk substrate for mixed-signal integrated circuits

Semiconductor device having an SOI structure and method for manufacturing the same

Ultra high density flash memory

Semiconductor device with decoupling capacitor and method of fabricating the same

Method of forming an integrated SOI fingered decoupling capacitor

Method of forming a pseudo SOI substrate and semiconductor devices

Integrated capacitor assembly

Method of fabricating single transistor floating-body DRAM devices having vertical channel transistor structures

Method of manufacturing semiconductor device having trench isolation

TFT mask ROM and method for making same

Integrated circuit and method of manufacture

Stable PD-SOI devices and methods

Method for forming a high-performance one-transistor memory cell

Methods for fabricating reduced floating body effect static random access memory cells

High-performance one-transistor memory cell

Fin semiconductor device and method for fabricating the same

Semiconductor device having a gate dielectric of different blocking characteristics

Semiconductor device having epitaxial layer

Semiconductor device for limiting leakage current

Electronically scannable multiplexing device

Memory and logic devices using electronically scannable multiplexing devices

Memory cell with negative differential resistance

Semiconductor device having a plurality of different layers and method therefor

Semiconductor device and method for regional stress control

Method of manufacturing a field effect transistor comprising an insulating film including metal oxide having crystallinity and different in a lattice distance from semiconductor substrate

Structure for planar SOI substrate with multiple orientations

EEPROM and method of manufacturing the same

Semiconductor device substrate including a single-crystalline layer and method of manufacturing semiconductor device substrate

SOI bottom pre-doping merged e-SiGe for poly height reduction

Methods of implementing and enhanced silicon-on-insulator (SOI) box structures

Three-dimensional memory devices and methods of manufacturing and operating the same

Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance

Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors

SOI SRAM products with reduced floating body effect

Multiple dielectric FinFET structure and method

Method of making a dual strained channel semiconductor device

Memory cell with trenched gated thyristor

High performance PFET header in hybrid orientation technology for leakage reduction in digital CMOS VLSI designs

Inverted multilayer semiconductor device assembly

Interlayer dielectric under stress for an integrated circuit

Self-aligned contacts for transistors

Method for manufacturing a semiconductor device

Method of manufacturing semiconductor device

Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same

SRAM cells having inverters and access transistors therein with vertical fin-shaped active regions

Fin-type channel transistor and method of manufacturing the same

Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device

Building fully-depleted and bulk transistors on same chip

Building fully-depleted and partially-depleted transistors on same chip

FinFET semiconductor device

Semiconductor-on-insulator (SOI) strained active areas

Method for forming an SOI structure with improved carrier mobility and ESD protection

Methods of fabricating double-sided hemispherical silicon grain electrodes and capacitor modules

MOS transistor with laser-patterned metal gate, and method for making the same

MIS-type semiconductor device

Three-dimensional memory devices

Semiconductor memory device and method of driving a semiconductor memory device

Lateral programmable polysilicon structure incorporating polysilicon blocking diode

Electrical fuse for silicon-on-insulator devices

Semiconductor device and method for manufacturing the same

Integrated circuits and methods of forming a field effect transistor

Bottom-gate SONOS-type cell having a silicide gate

Layout structure for memory arrays with SOI devices

Semiconductor device, semiconductor element and method for producing same

Semiconductor device and method of making semiconductor devices

Method of manufacturing semiconductor device

Wireless chip and electronic appliance having the same

SOI semiconductor device and method of manufacturing thereof

Simplified buried plate structure and process for semiconductor-on-insulator chip

Semiconductor integrated circuit and semiconductor integrated circuit manufacturing method

Methods of fabricating double-sided hemispherical silicon grain electrodes and capacitor modules

Method for manufacturing semiconductor elemental device forming an amorphous high dielectric film and an amorphous silicon film

Semiconductor integrated circuit and semiconductor device

Power semiconductor and method of fabrication

Semiconductor component and method of manufacture

SOI semiconductor device including a guard ring region

Methods for forming structures including strained-semiconductor-on-insulator devices

Methods for forming double gate strained-semiconductor-on-insulator device structures

Double gate strained-semiconductor-on-insulator device structures

Methods for forming strained-semiconductor-on-insulator bipolar device structures

Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices

Semiconductor device with cavity and method of manufacture thereof

Process for manufacturing a SOI wafer with improved gettering capability

Silicide gate transistors and method of manufacture

SEMICONDUCTOR DEVICE WITH MULTIPLE SEMICONDUCTOR LAYERS

Semiconductor device and method for manufacturing the same

Laser process

CMOS device featuring high breakdown voltage without failure in enhancing integration thereof, and method for manufacturing such CMOS device

Semiconductor device with a gate electrode having a laminate structure

Field effect transistors with vertically oriented gate electrodes and methods for fabricating the same

Body capacitor for SOI memory description

SON MOSFET using a beam structure and method for fabricating thereof

Method of forming a semiconductor device and an optical device and structure thereof

2-transistor floating-body dram

Strained-semiconductor-on-insulator bipolar device structures

Semiconductor device and method of manufacturing the same

Method of forming an implantable electronic device chip level hermetic and biocompatible electronics package using SOI wafers

Stressed semiconductor using carbon and method for producing the same

Transistor having enlarged contact surface area and manufacturing method therefor

Hybrid type semiconductor integrated circuit and method of manufacturing the same

Semiconductor device, driver circuit and manufacturing method of semiconductor device

Thin film transistor substrate and manufacturing method thereof

Vertical body-contacted SOI transistor

A CMOS STRUCTURE FOR BODY TIES IN ULTRA-THIN SOI (UTSOI) SUBSTRATES

SRAM devices, and electronic systems comprising SRAM devices

Semiconductor device

Structure and method of integrating compound and elemental semiconductors for high-performance CMOS

Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels

Fin field effect transistor and method for manufacturing fin field effect transistor

Semiconductor device

Accumulation mode multiple gate transistor

Semiconductor device, method of manufacture thereof and semiconductor integrated circuit

Fully depleted silicon-on-insulator CMOS logic

Semiconductor device and method of manufacturing the same

Semiconductor device

Semiconductor method and device with mixed orientation substrate

One-transistor random access memory technology integrated with silicon-on-insulator process

Method for manufacturing a semiconductor elemental device

Insulation film semiconductor device and method

Method of fabricating a capacitor by using a metallic deposit in an interconnection dielectric layer of an integrated circuit

Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer

Semiconductor device with a cavity therein and a method of manufacturing the same

SRAM memories and microprocessors having logic portions implemented in high-performance silicon substrates and SRAM array portions having field effect transistors with linked bodies and method for making same

Semiconductor device having trench isolation for differential stress and method therefor

Nonvolatile memory device

Semiconductor memory device and its manufacturing method

Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels

Methods of forming semiconductor constructions and integrated circuits

SOI structure comprising substrate contacts on both sides of the box, and method for the production of such a structure

High mobility plane FinFET with equal drive strength

Transistor structure having stressed regions of opposite types underlying channel and source/drain regions

Semiconductor device having controllable transistor threshold voltage

SOI SRAM device structure with increased W and full depletion

Fabrication method for silicon-on defect layer in field-effect and bipolar transistor devices

Method for creating a Ge-rich semiconductor material for high-performance CMOS circuits

Memory device and method for manufacturing the same

Semiconductor device and method for manufacturing the same

Semiconductor memory device having full depletion type logic transistors and partial depletion type memory transistors

Forming of trenches or wells having different destinations in a semiconductor substrate

Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction

Methods of forming semiconductor constructions

Semiconductor memory device and method of fabricating the same

Float gate memory device

Nonvolatile ferroelectric memory device

Methods of forming semiconductor constructions

Method of manufacturing a stacked transistor having a polycrystalline Si film

Fabrication of strained heterojunction structures

Double gate field effect transistor and method of manufacturing the same

MOS transistor on an SOI substrate with a body contact and a gate insulating film with variable thickness

Apparatus and method for voltage contrast analysis of a wafer using a tilted pre-charging beam

Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a buried insulating layer

CMOS transistor structure including film having reduced stress by exposure to atomic oxygen

CMOS thin film transistor comprising common gate, logic device comprising the CMOS thin film transistor, and method of manufacturing the CMOS thin film transistor

Method of making empty space in silicon

Switchable circuit assemblies and semiconductor constructions

Methods of forming integrated circuits structures including epitaxial silicon layers in active regions

Memory devices, electronic systems, and methods of forming memory devices

Method for forming dual etch stop liner and protective layer in a semiconductor device

MIS semiconductor device and method of fabricating the same

Method of fabricating a combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI) devices

Integrated antifuse structure for FINFET and CMOS devices

Methods of forming SRAM constructions

Double silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) structures

Methods of forming transistor constructions

Dual stressed SOI substrates

Capacitor that includes high permittivity capacitor dielectric

Semiconductor device including independent active layers and method for fabricating the same

CMOS inverter constructions

Semiconductor device and method of making semiconductor device comprising multiple stacked hybrid orientation layers

Semiconductor device and manufacturing method thereof

Semiconductor device and method of manufacturing the same

Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same

Semiconductor memory device including an SOI substrate

Method and apparatus for forming buried oxygen precipitate layers in multi-layer wafers

Method of fabricating semiconductor device using low dielectric constant material film

Dual-gate device and method

Semiconductor device with ESD protection function and ESD protection circuit

Electronic device and method of manufacturing the same

Methods of forming hybrid fin field-effect transistor structures