207547 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
Semiconductor device and method including a conductive member within a trench
#602DEVICE STRUCTURES FORMED WITH A SILICON-ON-INSULATOR SUBSTRATE THAT INCLUDES A TRAP-RICH LAYER
#603Method and apparatus for using back gate biasing for power amplifiers for millimeter wave devices
#604Integrated circuits (ICs) on a glass substrate
#605Assemblies containing PMOS decks vertically-integrated with NMOS decks, and methods of forming integrated assemblies
#606SOI substrate
#607Cascode heterojunction bipolar transistor
#608Thin-film negative differential resistance and neuronal circuit
#609Semiconductor device
#610Back biasing of FD-SOI circuit blocks
#611Semiconductor device including buried insulation layer and manufacturing method thereof
#612High switching frequency, low loss and small form factor fully integrated power stage
#613Fabrication of transistors having stressed channels
#614High aspect ratio channel semiconductor device and method of manufacturing same
#615Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structure
#616Substrate having two semiconductor materials on insulator
#617Method and system for monolithic integration of photonics and electronics in CMOS processes
#618Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETs
#6193D semiconductor device
#620Sealed cavity structures with a planar surface
#621Logic gate designs for 3D monolithic direct stacked VTFET
#622Isolation enhancement with on-die slot-line on power/ground grid structure
#623Optoelectronics and CMOS integration on GOI substrate
#624Semiconductor device
#625Transistor structure in low noise amplifier
#626THREE-DIMENSIONAL STACKED VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR LOGIC GATE WITH BURIED POWER BUS
#627Manufacturing method of semiconductor device
#628Organic light emitting diode (OLED) display panel having protrusions on substrate with plurality of planarization layers and method for manufacturing same
#629Optoelectronics and CMOS integration on GOI substrate
#630Method of manufacturing MOS transistor spacers
#631Semiconductor structures with deep trench capacitor and methods of manufacture
#632Third type of metal gate stack for CMOS devices
#633Method of manufacturing semiconductor device
#634Methods of forming integrated assemblies
#635Semiconductor device having buried gate structure and method of fabricating the same
#636Power semiconductor device having an SOI island
#637Semiconductor memory device comprising memory cell over driver
#638Radio-frequency isolation cavities and cavity formation
#639Topside radio-frequency isolation cavity configuration
#640Capacitive tuning using backside gate
#641Bonding pad architecture using capacitive deep trench isolation (CDTI) structures for electrical connection
#642Pillar-shaped semiconductor device and method for producing the same
#643Three-dimensional monolithic vertical field effect transistor logic gates
#644Three-dimensional stacked vertical transport field effect transistor logic gate with buried power bus
#645SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES
#646High voltage switching device
#647Method of forming an integrated circuit (IC) with shallow trench isolation (STI) regions and the resulting IC structure
#648Methods for integrated devices on an engineered substrate
#649Transistor having asymmetric threshold voltage, buck converter and method of forming semiconductor device
#650Method of manufacturing semiconductor device
#651METHODS TO PRODUCE A 3D SEMICONDUCTOR MEMORY DEVICE AND SYSTEM
#652Method and structure providing optical isolation of a waveguide on a silicon-on-insulator substrate
#653Integrated circuit connection arrangement for minimizing crosstalk
#6543D circuit transistors with flipped gate
#655Embedded memory using SOI structures and methods
#656Complementary transistor and semiconductor device
#657Fully-printed stretchable thin-film transistors and integrated logic circuits
#658Process to form SOI substrate
#659Structure for radiofrequency applications
#660METHOD FOR PRODUCING A 3D MEMORY DEVICE
#661Deep trench isolation structure in semiconductor device
#662Semiconductor device
#6633D SEMICONDUCTOR DEVICE AND SYSTEM
#664SOI substrate, semiconductor device and method for manufacturing the same
#665Vertically stacked NFETS and PFETS with gate-all-around structure
#666Vertically stacked dual channel nanosheet devices
#667Vertically stacked nFET and pFET with dual work function
#668Integrated Process Flow For Semiconductor Devices
#669Integration of single crystalline transistors in back end of line (BEOL)
#670Silicide block isolation for reducing off-capacitance of a radio frequency (RF) switch
#671Radio-frequency isolation using porous silicon
#672Manufacturing method of semiconductor device
#673Polycrystalline ceramic substrate
#674Transistor layout for improved harmonic performance
#675Transistor element with reduced lateral electrical field
#676High performance SiGe heterojunction bipolar transistors built on thin-film silicon-on-insulator substrates for radio frequency applications
#677High performance SiGe heterojunction bipolar transistors built on thin film silicon-on-insulator substrates for radio frequency applications
#6783D SEMICONDUCTOR DEVICE AND SYSTEM
#679Semiconductor devices, and a method for forming a semiconductor device
#680Low parasitic capacitance low noise amplifier
#681Semiconductor device and method of manufacturing same
#682Semiconductor diodes employing back-side semiconductor or metal
#683Flipped vertical field-effect-transistor
#684Semi-sequential 3D integration
#685BONDING PAD ARCHITECTURE USING CAPACITIVE DEEP TRENCH ISOLATION (CDTI) STRUCTURES FOR ELECTRICAL CONNECTION
#686Methods of making printable device wafers with sacrificial layers
#687Stacked SOI semiconductor devices with back bias mechanism
#688Control method for differentiated etching depth
#689Switch with local silicon on insulator (SOI) and deep trench isolation
#690Electronic devices and systems, and methods for making and using the same
#691Method and system for a photonic interposer
#692Printed reconfigurable electronic circuit
#693Orthogonal transistor layouts
#6943D SEMICONDUCTOR DEVICE AND SYSTEM
#695Method for determining a suitable implanting energy in a donor substrate and process for fabricating a structure of semiconductor-on-insulator type
#696Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing
#697Methods of forming semiconductor structures comprising thin film transistors including oxide semiconductors
#698Semiconductor structure and fabrication method thereof
#6993D SEMICONDUCTOR DEVICE AND SYSTEM
#700High dose implantation for ultrathin semiconductor-on-insulator substrates
#701Gallium nitride voltage regulator
#702Co-integration of bulk and SOI transistors
#7033D SEMICONDUCTOR DEVICE AND SYSTEM
#704SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
#705Semiconductor device and manufacturing method of the same
#706Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines
#707Control of length in gate region during processing of VFET structures
#708Cascode heterojunction bipolar transistors
#709Semiconductor device
#710Thin-film negative differential resistance and neuronal circuit
#711Thin-film negative differential resistance and neuronal circuit
#712High-voltage transistor device with thick gate insulation layers
#713Method of simultaneous fabrication of SOI transistors and of transistors on bulk substrate
#714Optimized double-gate transistors and fabricating process
#715A 3D SEMICONDUCTOR DEVICE AND SYSTEM
#716Technique for patterning active regions of transistor elements in a late manufacturing stage
#717Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#718Anti-fuse with reduced programming voltage
#719Isolated wells for resistor devices
#720Isolated wells for resistor devices
#721Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#722Semiconductor device
#7233D SEMICONDUCTOR DEVICE AND SYSTEM
#724Production of semiconductor regions in an electronic chip
#7253D semiconductor device and structure
#726Semiconductor device and fabricating method of the same
#727Array substrate, display panel and display device
#728Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
#729Method for fabricating array substrate, array substrate and display device
#7303D integration method using SOI substrates and structures produced thereby
#731LATERALLY DIFFUSED FIELD EFFECT TRANSISTOR IN SOI CONFIGURATION
#732Transistor element including a buried insulating layer having enhanced functionality
#733Array substrate for display device and manufacturing method thereof
#734Circuits having a switch with back-gate bias
#735SOI substrate compatible with the RFSOI and FDSOI technologies
#736Production of semiconductor regions in an electronic chip
#737Method for manufacturing a semiconductor structure with temporary direct bonding using a porous layer
#738SINGLE MASK LEVEL FORMING BOTH TOP-SIDE-CONTACT AND ISOLATION TRENCHES
#739IC WITH TRENCHES FILLED WITH ESSENTIALLY CRACK-FREE DIELECTRIC
#740Semiconductor integrated circuit device comprising MISFETs in SOI and bulk substrate regions
#741Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
#742Systems and methods for fabricating FinFETs with different threshold voltages
#7433D SEMICONDUCTOR DEVICE AND SYSTEM
#7443D SEMICONDUCTOR DEVICE AND SYSTEM
#745Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same
#7463D SEMICONDUCTOR DEVICE AND SYSTEM
#7473D SEMICONDUCTOR DEVICE AND SYSTEM
#748Method of manufacturing semiconductor device
#749Three-dimensional stacked junctionless channels for dense SRAM
#750Semiconductor device
#7513D integration method using SOI substrates and structures produced thereby
#752Integrated circuit emulating neural system with neuron circuit and synapse device array and fabrication method thereof
#753Biosensor devices, systems and methods for detecting or analyzing a sample
#754Integrated circuit chip with strained NMOS and PMOS transistors
#755SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#756RFIC device and method of fabricating same
#757RFIC device and method of fabricating same
#758Techniques for creating a local interconnect using a SOI wafer
#759High power RF switches using multiple optimized transistors and methods for fabricating same
#760Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer
#761METHOD FOR LATE DIFFERENTIAL SOI THINNING FOR IMPROVED FDSOI PERFORMANCE AND HCI OPTIMIZATION
#762Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
#763Switches with multiple field-effect transistors having proximity electrodes
#7643D integration method using SOI substrates and structures produced thereby
#765Process for etching a SiN-based layer
#766Method of fabricating a biological field-effect transistor (BioFET) with increased sensing area
#767Multilevel template assisted wafer bonding
#768Array substrate and display panel, and fabrication methods thereof
#769BIOLOGICAL SENSING SYSTEM HAVING MICRO-ELECTRODE ARRAY
#770Backside substrate openings in transistor devices
#771Method and structure for forming vertical transistors with shared gates and separate gates
#7723D semiconductor device and system
#773Manufacturing method of semiconductor device
#774Fabricating contacts of a CMOS structure
#775Semiconductor device
#776Semiconductor device
#777Semiconductor structures with deep trench capacitor and methods of manufacture
#778Integrated circuit capable of operating at very high voltage and method of fabricating same
#779Processing Techniques for Silicon-Based Transient Devices
#780Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same
#781Fingerprint recognition device, method for fabricating the same and display device
#782Porous semiconductor handle substrate
#783Capacitor, method for manufacturing same, and wireless communication device using same
#784Semiconductor device and method for manufacturing semiconductor device with low-permittivity layers
#785Semiconductor structure with integrated passive structures
#786Silicon photonics integration method and structure
#787SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
#788Field-effect transistors with a T-shaped gate electrode
#789Thin Polysilicon For Lower Off-Capacitance Of A Radio Frequency (RF) Silicon-On-Insulator (SOI) Switch Field Effect Transistor (FET)
#790MTP memory for SOI process
#791Device comprising multiple gate structures and method of simultaneously manufacturing different transistors
#792FinFET with stacked faceted S/D epitaxy for improved contact resistance
#793FDSOI with on-chip physically unclonable function
#794Method of manufacturing semiconductor device and semiconductor device
#795Low-loss silicon on insulator based dielectric microstrip line
#796Integrated circuit connection arrangement for minimizing crosstalk
#797Connection arrangements for integrated lateral diffusion field effect transistors
#798Liquid crystal display device and electronic device
#799Fully-depleted silicon-on-insulator transistors
#800Semiconductor device including buried capacitive structures and a method of forming the same
#801Leadframe and integrated circuit connection arrangement
#802Method for transferring at least one thin film
#803Cascode amplifier optimization
#804Semiconductor device and method of manufacturing same
#805Semiconductor structure and method for manufacturing the same
#806Techniques for revealing a backside of an integrated circuit device, and associated configurations
#807Local trap-rich isolation
#808Semiconductor devices with low junction capacitances and methods of fabrication thereof
#809Semiconductor device with low band-to-band tunneling
#810Method of manufacturing semiconductor device
#811TFT backplane manufacturing method and TFT backplane
#812Semiconductor structures with deep trench capacitor and methods of manufacture
#813HYBRID COMPUTING MODULE
#814Method of manufacturing a MISFET on an SOI substrate
#815Semiconductor device and method of fabricating the same
#816Flipped vertical field-effect-transistor
#8173D semiconductor device, fabrication method and system
#818Integrated strained stacked nanosheet FET
#819Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)
#820Array substrate, manufacturing method thereof, and display apparatus
#821Methods and structures for reducing back gate effect in a semiconductor device
#822Prevention of charging damage in full-depletion devices
#823Array substrate and manufacturing method thereof
#824Stress memorization technique for strain coupling enhancement in bulk FINFET device
#825Display substrate and method of fabricating display substrate
#826Semiconductor memory device and structure
#827Backside processed semiconductor device
#828Semiconductor device structure useful for bulk transistor and method of manufacturing same
#829Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions
#830CMOS compatible BioFET
#831Semiconductor device and semiconductor device production system
#832Semiconductor device and method of manufacturing thereof
#833Pixel structure and manufacturing method for the same
#834Structure and method for fully depleted silicon on insulator structure for threshold voltage modification
#835Semiconductor device and method of manufacturing semiconductor device
#836Process for the manufacture of a semiconductor element comprising a layer for trapping charges
#837Preparation method for platform-shaped active region based P-I-N diode string in reconfigurable loop antenna
#838Gate structure with dual width electrode layer
#839Array substrate, display device and manufacturing method for array substrate
#840Wafers and device structures with body contacts
#841Semiconductor device including a vacuum gap and method for manufacturing the same
#842Preparation method for heterogeneous SiGe based plasma P-I-N diode string for sleeve antenna
#843Manufacturing method for AlAs—Ge—AlAs structure based plasma p-i-n diode in multilayered holographic antenna
#844Method of forming MOS and bipolar transistors
#845Self-aligned vertical transistor with local interconnect
#846Integrated circuit chip with molding compound handler substrate and method
#847Semiconductor device having merged epitaxial features with Arc-like bottom surface and method of making the same
#848Isolation structure for micro-transfer-printable devices
#849Hybrid III-V technology to support multiple supply voltages and off state currents on same chip
#850Minimization of plasma doping induced fin height loss
#851Body tie optimization for stacked transistor amplifier
#852Semiconductor device with transistor in semiconductor substrate and insulated contact plug extending through the substrate
#853Semiconductor device and fabricating method thereof
#854Logic and flash field-effect transistors
#855S-Contact for SOI
#856Method for fabricating auto-aligned interconnection elements for a 3D integrated circuit
#857SOI power LDMOS device
#858Field-effect transistors with a buried body contact
#859Devices and methods related to radio-frequency switches having improved on-resistance performance
#860Method of fabrication of a FET transistor having an overlapped gate
#861Method of manufacturing an electric device based on glass substrate
#862Semiconductor device having SOI substrate and first and second diffusion layer
#863Semiconductor device
#864Self-aligned back-plane and well contacts for fully depleted silicon on insulator device
#865SEMICONDUCTOR STRUCTURES AND METHOD FOR FABRICATING THE SAME
#866Thin film transistor and method for manufacturing the same, array substrate and method for manufacturing the same, display panel and display device
#867Method and apparatus for flexible circuit cable attachment
#868Printable device wafers with sacrificial layers
#869Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the same
#870Semiconductor devices
#871Semiconductor device and method of manufacturing the same
#872Flipped vertical field-effect-transistor
#873Method for forming an extremely thin silicon-on-insulator (ETSOI) device having reduced parasitic capacitance and contact resistance due to wrap-around structure of source/drain regions
#874Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
#875Method of patterning target layer
#876Method for local isolation between transistors produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit
#877Isolation of semiconductor device with buried cavity
#878Convex shaped thin-film transistor device having elongated channel over insulating layer in a groove of a semiconductor substrate
#879Cavity formation in backside interface layer for radio-frequency isolation
#880Semiconductor structure with improved punch-through and fabrication method thereof
#881High density nanosheet diodes
#882Stress memorization technique for strain coupling enhancement in bulk finFET device
#883Local trap-rich isolation
#884Isolated semiconductor layer over buried isolation layer
#885INTEGRATED CIRCUIT COMPRISING MOS TRANSISTORS AND METHOD OF MANUFACTURING THE SAME
#886Process for forming semiconductor layers of different thickness in FDSOI technologies
#887Protection schemes for MEMS switch devices
#888Fabrication of nano-sheet transistors with different threshold voltages
#889Manufacturing method of semiconductor device
#890Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
#891Nano-sheet transistors with different threshold voltages
#892High aspect ratio channel semiconductor device and method of manufacturing same
#893Wafer level integration including design/co-design, structure process, equipment stress management, and thermal management
#894Radio-frequency isolation using cavity formed in interface layer
#895Cavity formation using sacrificial material
#896Conductive contacts in semiconductor on insulator substrate
#897Memory device and method for manufacturing the same
#898Self-aligned transistors for dual-side processing
#899Composite electronic component and resistor device
#900Composite electronic component and resistor device