ClassID:

209404

H01L2224/0231 - page 5 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Redistribution layers [RDL] for bonding areas Manufacturing methods of the redistribution layers

Recent Application in this class:
#1201
20050260794
2005-11-24

Method for fabrication of wafer level package incorporating dual compliant layers

#1202
20050245067
2005-11-03

Top layers of metal for high performance IC's

#1203
20050245061
2005-11-03

Semiconductor device and manufacturing method thereof

#1204
20050236104
2005-10-27

Method for mounting semiconductor device, as well as circuit board, electrooptic device, and electronic device

#1205
20050224962
2005-10-13

Manufacturing method for semiconductor integrated circuit, semiconductor integrated circuit, and semiconductor integrated circuit apparatus

#1206
20050218473
2005-10-06

Network electronic component, semiconductor device incorporating network electronic component, and methods of manufacturing both

#1207
20050215043
2005-09-29

Low fabrication cost, high performance, high reliability chip scale package

#1208
20050212126
2005-09-29

Semiconductor device and method of manufacturing the same

#1209
20050208757
2005-09-22

Top layers of metal for high performance IC's

#1210
20050208747
2005-09-22

Method of routing an electrical connection on a semiconductor device and structure therefor

#1211
20050208703
2005-09-22

Method of producing an electronic component with flexible bonding

#1212
20050200023
2005-09-15

Top layers of metal for high performance IC's

#1213
20050194687
2005-09-08

Semiconductor device, method of manufacturing the same, circuit board, and electronic instrument

#1214
20050194686
2005-09-08

Semiconductor device and manufacturing method for the same

#1215
20050194682
2005-09-08

Resin-molded semiconductor device having posts with bumps and method for fabricating the same

#1216
20050194670
2005-09-08

Semiconductor device and manufacturing method of the same

#1217
20050191772
2005-09-01

Manufacturing method of semiconductor device

#1218
20050189650
2005-09-01

Low fabrication cost, high performance, high reliability chip scale package

#1219
20050186790
2005-08-25

Methods of fabricating interconnects for semiconductor components including plating solder-wetting material and solder filling

#1220
20050186777
2005-08-25

Methods of fabricating interconnects for semiconductor components including a through hole entirely through the component and forming a metal nitride including separate precursor cycles

#1221
20050186770
2005-08-25

Methods of fabricating interconnects including depositing a first material in the interconnect with a thickness of angstroms and a low temperature for semiconductor components

#1222
20050176235
2005-08-11

Manufacturing method of semiconductor device

#1223
20050176233
2005-08-11

Wafer-level chip scale package and method for fabricating and using the same

#1224
20050161587
2005-07-28

Optical sensor module with semiconductor device for drive

#1225
20050127527
2005-06-16

Electronic component with flexible contacting pads and method for producing the electronic component

#1226
20050127486
2005-06-16

Chip-scale package and carrier for use therewith

#1227
20050116341
2005-06-02

Selective deposition of solder ball contacts

#1228
20050112800
2005-05-26

Semiconductor device and method of fabricating the same

#1229
20050104179
2005-05-19

Methods and apparatus for packaging integrated circuit devices

#1230
20050101106
2005-05-12

Method of manufacturing a semiconductor device

#1231
20050090026
2005-04-28

Method of manufacturing a semiconductor device

#1232
20050090025
2005-04-28

Method of manufacturing a semiconductor device

#1233
20050087844
2005-04-28

Chip structure and process for forming the same

#1234
20050082685
2005-04-21

Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion

#1235
20050062146
2005-03-24

Semiconductor device

#1236
20050040523
2005-02-24

Semiconductor wafer, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment

#1237
20050040033
2005-02-24

Method of metal sputtering for integrated circuit metal routing

#1238
20050037539
2005-02-17

Method for producing a semiconductor package, with a rerouted electrode formed on a resin projection portion

#1239
20050032353
2005-02-10

Method for reducing defects in post passivation interconnect process

#1240
20050029668
2005-02-10

Apparatus and method for packaging circuits

#1241
20050023680
2005-02-03

Semiconductor device with strain relieving bump design

#1242
20050023669
2005-02-03

Semiconductor wafer, semiconductor device, method for manufacturing the semiconductor device, circuit board, and electronic apparatus

#1243
20050020052
2005-01-27

Method for fabricating thermal compliant semiconductor chip wiring structure for chip scale packaging

#1244
20050020047
2005-01-27

Methods of forming conductive structures including titanium-tungsten base layers and related structures

#1245
20050017355
2005-01-27

Wafer level processing method and structure to manufacture two kinds of interconnects, gold and solder, on one wafer

#1246
20050017343
2005-01-27

Method of forming redistribution bump and semiconductor chip and mount structure fabricated using the same

#1247
20050012225
2005-01-20

Wafer-level chip scale package and method for fabricating and using the same

#1248
20050009317
2005-01-13

Wafer level bumping process

#1249
20050006765
2005-01-13

Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

#1250
20050003649
2005-01-06

Semiconductor device and manufacturing method thereof

#1251
16176078
2019-12-31

Patterning polymer layer to reduce stress

#1252
15940878
2019-07-09

Molded cavity fanout package without using a carrier and method of manufacturing the same

#1253
15671821
2018-10-16

Semiconductor device and method for manufacturing the same

#1254
15582370
2018-05-08

Fan-out wafer level integration for photonic chips

#1255
15499903
2018-09-11

Integrated fan-out package and method of fabricating the same

#1256
15462906
2018-05-01

Semiconductor structure and method for forming the same

#1257
15283342
2018-01-02

Electronic device package

#1258
15207512
2017-11-21

Integrated fan-out package and method of fabricating the same

#1259
15205553
2017-10-17

Semiconductor structure and method of forming

#1260
15184843
2017-11-14

Package-on-package structure and method

#1261
15047632
2017-02-21

Method for fabricating wafer level package

#1262
15005547
2017-04-11

Dual-sided integrated fan-out package

#1263
14970962
2016-11-29

Semiconductor device structure comprising a plurality of metal oxide fibers and method for forming the same

#1264
14854565
2017-01-24

Wafer backside redistribution layer warpage control

#1265
14555949
2016-05-03

Device packaging

#1266
14253868
2015-08-18

Assembly structure for connecting multiple dies into a system-in-package chip and the method thereof