Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate

Semiconductor device and method of forming small Z semiconductor package

Semiconductor package

Semiconductor device and method comprising redistribution layers

Methods for controlling warpage in packaging

Stacked semiconductor device and method of controlling thereof

Semiconductor device with trench-like feed-throughs

Interconnect structure for package-on-package devices and a method of fabricating

Forming recesses in molding compound of wafer to reduce stress

Package on-package (PoP) structure including stud bulbs

Microelectronic element with bond elements to encapsulation surface

CHIP SCALE SENSING CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF

Method and structure for wafer level packaging with large contact area

Semiconductor device with through-substrate via covered by a solder ball

Pre-package and methods of manufacturing semiconductor package and electronic device using the same

Waveguide and semiconductor packaging

Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same

Bump structures for multi-chip packaging

Flip chip bonding alloys

Protrusion bump pads for bond-on-trace processing

USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE

Semiconductor structure and manufacturing method thereof

Method of producing a semiconductor device with through-substrate via covered by a solder ball

Microelectronic assemblies formed using metal silicide, and methods of fabrication

Self-aligned under bump metal

Microelectronic assemblies with cavities, and methods of fabrication

Semiconductor device and method of forming EMI shielding layer with conductive material around semiconductor die

Semiconductor package and manufacturing method thereof

Semiconductor device

3D IC bump height metrology APC

Stacked semiconductor device assembly in computer system

CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

Electronic apparatus and method for fabricating the same

Semiconductor devices having metal bumps with flange

Semiconductor device processing method for material removal

Semiconductor package device and manufacturing method thereof

Electronic component and use thereof

Semiconductor device including Schottky barrier diode and power MOSFETs and a manufacturing method of the same

Method for manufacturing semiconductor device

Semiconductor package and method for fabricating the same

3DIC stacking device and method of manufacture

Wafer backside interconnect structure connected to TSVs

Packaging device and method of making the same

Bump-on-trace structures with high assembly yield

Semiconductor device and a method of manufacturing the same

Post-passivation interconnect structure and methods thereof

Chip mounting structure

Under bump metallurgy (UBM) and methods of forming same

Semiconductor package system and method

Semiconductor integrated circuit device

Stacked semiconductor devices and methods of forming same

Multilayer semiconductor integrated circuit device

SEMICONDUCTOR WIRE BONDING AND METHOD

Electronic element and manufacturing method

Semiconductor device and method of manufacture thereof

SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

Semiconductor packages including interposer and methods of manufacturing the same

Vertical inductor for WLCSP

Termination structure for gallium nitride schottky diode

Method of flip-chip assembly of two electronic components by UV annealing, and assembly obtained

Concentric bump design for the alignment in die stacking

Semiconductor devices with ball strength improvement

Semiconductor device and manufacturing method thereof

Package substrate and semiconductor package including the same

Electronic device with periphery contact pads surrounding central contact pads

Cu core ball, solder paste, formed solder, Cu core column, and solder joint

Semiconductor chip with redundant thru-silicon-vias

Semiconductor device and method of manufacturing the same

Grid array connection device and method

Fingerprint sensor chip package structure and manufacturing method thereof

Radio frequency shielding within a semiconductor package

Resonant circuit including bump pads

Double-sided vertical semiconductor device with thinned substrate

Apparatus for stacked semiconductor packages and methods of fabricating the same

Dual molded stack TSV package

3-D package having plurality of substrates

Semiconductor package

Method of fabricating an electronic package

BUMP FORMING METHOD, BUMP FORMING APPARATUS, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Substrate and package structure

Semiconductor package using flip-chip technology

Semiconductor device and method for manufacturing the same

Semiconductor structure having a patterned surface structure and semiconductor chips including such structures

Calibration kits for RF passive devices

Multiple band multiple mode transceiver front end flip-chip architecture and circuitry with integrated power amplifiers

Semiconductor device having stacked chips

Semiconductor device

Semiconductor device and manufacturing method of semiconductor device

Semiconductor device

Packaging devices and methods of manufacture thereof

Electric apparatus including electric patterns for suppressing solder bridges

Solder metallization stack and methods of formation thereof

Method of producing a semiconductor device with protruding contacts

Printed circuit board, package substrate comprising same, and method for manufacturing same

Semiconductor package and mounting structure thereof

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

Semiconductor device and manufacturing method of semiconductor device

Semiconductor device and method for producing semiconductor device

INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

Compound semiconductor device

Power device integration on a common substrate

Semiconductor package assembly and method for forming the same

Semiconductor packaging structure and method

Mechanisms of forming connectors for package on package

Method for fabricating semiconductor package having a multi-layer molded conductive substrate and structure

Semiconductor device assembly with heat transfer structure formed from semiconductor material

Semiconductor package with elastic coupler and related methods

Packaging through pre-formed metal pins

Conductive paths through dielectric with a high aspect ratio for semiconductor devices

Embedded multi-device bridge with through-bridge conductive via signal connection

Substrate structure with array of micrometer scale copper pillar based structures and method for manufacturing same

Chip package having a patterned conducting plate and a conducting pad with a recess

Methods of packaging semiconductor devices and structures thereof

Flip chip module with enhanced properties

REDUCTION OF UNDERFILL FILLER SETTLING IN INTEGRATED CIRCUIT PACKAGES

Lead-free solder ball

Method for manufacturing semiconductor package structure

Semiconductor device

Semiconductor substrate and semiconductor package structure having the same

Chip packaging structures

Method of forming a semiconductor package

Semiconductor device having through-electrode

MOLDED INSULATOR IN PACKAGE ASSEMBLY

Semiconductor device with bond pad wiring lead-out arrangement avoiding bond pad probe mark area

Semiconductor device and method of forming a thin wafer without a carrier

Fingerprint sensor and manufacturing method thereof

Semiconductor device

Power semiconductor device and method therefor

Wire bond support structure and microelectronic package including wire bonds therefrom

Methods of packaging semiconductor devices and packaged semiconductor devices

Package-on-package type semiconductor device which is realized through applying not a TSV technology but a fan-out wafer level package technology

Bonded structures for package and substrate

Packaging devices, methods of manufacture thereof, and packaging methods

Reliable device assembly

Semiconductor structure with sacrificial anode and method for forming

Semiconductor chip package assembly with improved heat dissipation performance

Electronic device including a metal substrate and a semiconductor module embedded in a laminate

Semiconductor device and method of adaptive patterning for panelized packaging with dynamic via clipping

Method of manufacturing semiconductor device by applying molding layer in substrate groove

Magnetic nanocomposite materials and passive components formed therewith

Multichip integration with through silicon via (TSV) die embedded in package

Semiconductor die assembly and methods of forming thermal paths

Package on package bonding structure and method for forming the same

Semiconductor package and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Tooling for coupling multiple electronic chips

Semiconductor device and manufacturing method thereof

Semiconductor structure with composite barrier layer under redistribution layer and manufacturing method thereof

Integration of backside heat spreader for thermal management

Integrated circuit comprising at least an integrated antenna

Multi-chip package structure having blocking structure, wafer level chip package structure having blocking structure and manufacturing process thereof

Chip package and manufacturing method thereof

Semiconductor device

Semiconductor device with advanced pad structure resistant to plasma damage and metnod for forming same

Hybrid packaged lead frame based multi-chip semiconductor device with multiple interconnecting structures

Multi-chip package structure, wafer level chip package structure and manufacturing process thereof

MOSFET with reduced resistance

Reconstituted wafer-level package dram with conductive interconnects formed in encapsulant at periphery of the package

Laser die backside film removal for integrated circuit (IC) packaging

Semiconductor device and semiconductor package

Semiconductor package

Methods of forming multiple conductive features in semiconductor devices in a same formation process

Semiconductor package and method for fabricating base for semiconductor package

Semiconductor device contact structure having stacked nickel, copper, and tin layers

Conductive traces in semiconductor devices and methods of forming same

Power MOSFET and manufacturing method thereof

Reliable packaging and interconnect structures

Wafer coating system and method of manufacturing chip package

Wafer level packaging of electronic devices

Multi-chip package having a stacked plurality of different sized semiconductor chips, and method of manufacturing the same

Semiconductor device and method of forming a package in-fan out package

Double side mounting memory integration in thin low warpage fanout package

Stacked semiconductor device

Semiconductor device including a protective film

Double-sided semiconductor package and dual-mold method of making same

Chip package and method for fabricating the same

Semiconductor apparatus, solid state imaging device, imaging apparatus and electronic equipment, and manufacturing method thereof

Process for forming package-on-package structures

Chip on package structure and method

Semiconductor packages with socket plug interconnection structures

Semiconductor packages with pillar and bump structures

Semiconductor device and method of forming wafer level ground plane and power ring

Circuit assemblies with multiple interposer substrates, and methods of fabrication

Die-on-interposer assembly with dam structure and method of manufacturing the same

Semiconductor device having through-silicon-via and methods of forming the same

Conductive line system and process

Semiconductor device having electrode pads arranged between groups of external electrodes

Semiconductor assembly and method to form the same

Magnetic shielding of MRAM package

Package on package (PoP) bonding structures

Semiconductor die assembly

Integrated Circuit Assembly and Method of Making

Package-on-package semiconductor device

Interconnect structures for wafer level package and methods of forming same

Interconnect structure and method of fabricating same

Electronic device with interconnection structure oblate ellipsoid-shaped aperture

Metal bond pad with cobalt interconnect layer and solder thereon

Semiconductor chip, flip chip package and wafer level package including the same

Fan-out interconnect structure and method for forming same

Method of forming contact holes in a fan out package

Embedded structures for package-on-package architecture

SEMICONDUCTOR STRUCTURE

Staged via formation from both sides of chip

Low profile IC package

Apparatus and method for self-aligning chip placement and leveling

Apparatus, system, and method for collecting a target material

Interposer for hermetic sealing of sensor chips and for their integration with integrated circuit chips

Semiconductor device and method of manufacturing the same

Bumpless build-up layer package with pre-stacked microelectronic devices

Three-dimensional chip stack and method of forming the same

Cooling channels in 3DIC stacks

Integrated circuit package having wirebonded multi-die stack

Semiconductor device and method of forming PoP semiconductor device with RDL over top package

Semiconductor device and manufacturing method thereof

Tunable composite interposer

Packaging devices and methods of manufacture thereof

Integrated circuit assemblies with reinforcement frames, and methods of manufacture

Chip part and method of making the same

Semiconductor device and wafer level package including such semiconductor device

Semiconductor device and method of forming an embedded SoP fan-out package

Through-hole electrode substrate and semiconductor device using through-hole electrode substrate

Semiconductor device and method of forming stacked vias within interconnect structure for FO-WLCSP

Semiconductor device and method to minimize stress on stack via

Testing of semiconductor chips with microbumps

Interconnect structure with redundant electrical connectors and associated systems and methods

Semiconductor package assembly with passive device

Semiconductor device and method of manufacturing the same

Methods to form high density through-mold interconnections

Method of manufacturing connector structures of integrated circuits

CHIP AND MANUFACTURING METHOD THEREOF

Alignment structures and methods of forming same

Methods for forming pillar bumps on semiconductor wafers

Method of forming redistribution layer

Polymer member based interconnect

Stub minimization for assemblies without wirebonds to package substrate

Semiconductor device

Fan out system in package and method for forming the same

Package-on-package stacked microelectronic structures

Fully molded peripheral package on package device

Interfacial alloy layer for improving electromigration (EM) resistance in solder joints

HYBRID INTERCONNECT FOR LOW TEMPERATURE ATTACH

Semiconductor package assembly

Method for package-on-package assembly with wire bonds to encapsulation surface

Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask

Semiconductor image sensor module and method of manufacturing the same

3D semiconductor package interposer with die cavity

Semiconductor structure and manufacturing method thereof

Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices

Packaging devices and methods of manufacture thereof

Semiconductor package and manufacturing method thereof

Integrated circuit package and method of making the same

Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components

Alignment in the packaging of integrated circuits

Electronic apparatus and method for fabricating the same

Integrated WLUF and SOD process

Method for fabricating package structure

MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICES

Capacitor in post-passivation structures and methods of forming the same

Disabling electrical connections using pass-through 3D interconnects and associated systems and methods

Signal delivery in stacked device

Semiconductor packages

Reduced volume interconnect for three-dimensional chip stack

PACKAGED SEMICONDUCTOR DEVICES

Wafer-level package having multiple dies arranged in side-by-side fashion and associated yield improvement method

Integrated antennas in wafer level package

Semiconductor device

Semiconductor device and manufacturing method of same

Metal oxide layered structure and methods of forming the same

Method of manufacturing a semiconductor device having scribe lines

Semiconductor packages and methods of forming the same

Semiconductor device and manufacturing method thereof

Contact bumps methods of making contact bumps

Semiconductor package using a contact in a pleated sidewall encapsulant opening

Power semiconductor device with a double metal contact and related method

Semiconductor packaging structure having stacked seed layers

ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME

Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package

Laminated chip having microelectronic element embedded therein

Method for forming a passive device on a package-on-package structure

Mechanisms for forming metal-insulator-metal (MIM) capacitor structure

Wiring substrate, method for manufacturing wiring substrate, electronic device and method for manufacturing electronic device

Semiconductor die assemblies with heat sink and associated systems and methods

Hollow metal pillar packaging scheme

Multiple die stacking for two or more die

Semiconductor device including a buffer layer structure for reducing stress

Methods of forming conductive materials on semiconductor devices, and methods of forming electrical interconnects

Electrode connection structure and electrode connection method

Semiconductor device, integrated circuit structure using the same, and manufacturing method thereof

Method and apparatus of ESD protection in stacked die semiconductor device

Repackaged integrated circuit and assembly method

Semiconductor package and method of fabricating the same

Micro device integration into system substrate

Image sensor packages and methods of fabricating the same

Offset interposers for large-bottom packages and large-die package-on-package structures

Semiconductor device and method of forming WLCSP with semiconductor die embedded within interconnect structure

Semiconductor packages including an interposer

Method of thinning and packaging a semiconductor chip

Post-passivation interconnect structure and method of forming same

Methods of forming semiconductor packages with an intermetallic layer comprising tin and at least one of silver, copper or nickel

Antenna cavity structure for integrated patch antenna in integrated fan-out packaging