Semiconductor packaging and manufacturing method thereof

Circuit module and method of manufacturing the same

Microelectronic package with surface mounted passive element

Multi-chip structure and method of forming same

Reduced volume interconnect for three-dimensional chip stack

Manufacturing method of ultra-thin semiconductor device package assembly

Bump structures, semiconductor device and semiconductor device package having the same

Manufacturing method of interconnect structure

Chip module and method for forming the same

Sheet for sealing and method for manufacturing semiconductor device using said sheet for sealing

Multilayer structure for a semiconductor device and a method of forming a multilayer structure for a semiconductor device

Package with low stress region for an electronic component

Front-to-back bonding with through-substrate via (TSV)

Integrated semiconductor device and wafer level method of fabricating the same

Method of manufacturing semiconductor device

Integrated circuit structure having dies with connectors

Semiconductor chip and method of processing a semiconductor chip

Electronic package and method of connecting a first die to a second die to form an electronic package

Bonding method including adjusting surface contours of a bonding system

Metal etchant compositions and methods of fabricating a semiconductor device using the same

Semiconductor package with package-on-package stacking capability and method of manufacturing the same

Package with multiple plane I/O structure

SEMICONDUCTOR PACKAGES

Localized high density substrate routing

Semiconductor device with redistribution layers on partial encapsulation and non-photosensitive passivation layers

Semiconductor device

Semiconductor device and method of forming sacrificial adhesive over contact pads of semiconductor die

Method of fabricating semiconductor package having semiconductor element

Electronic device

Electronic component

Passive components in vias in a stacked integrated circuit package

Semiconductor device and method of manufacturing same

Packaged semiconductor devices and methods of packaging semiconductor devices

Semiconductor packages and related methods

Wafer to wafer bonding process and structures

Display device and array substrate for display device

Semiconductor structure and method of fabricating the same

Semiconductor structure with UBM layer and method of fabricating the same

Wiring substrate

Semiconductor device

Stacked chip-on-board module with edge connector

Chip package and a wafer level package

Substrate structure

Thermal interface material layer and package-on-package device including the same

Semiconductor device and manufacturing method thereof

Microelectronic substrates having copper alloy conductive route structures

Solution for reducing poor contact in info packages

Mounting structure of semiconductor device and method of manufacturing the same

Method of forming bump structure having a side recess and semiconductor structure including the same

Dummy flip chip bumps for reducing stress

Low cost package warpage solution

Reducing solder pad topology differences by planarization

Chip package and method for forming the same

Semiconductor device and its manufacturing method

Method for manufacturing package structure

Through substrate vias with improved connections

Method for through silicon via structure

Printed wiring board

Ultraviolet reflective rough adhesive contact

Electronic device mounted on a substrate

Integrated circuit package with probe pad structure

Memory module in a package

Interconnect structures for wafer level package and methods of forming same

Semiconductor device having connection terminal of solder

Method and structure for wafer-level packaging

Circuit substrate and package structure

Package structure and fabrication method thereof

Integrated circuits with backside metalization and production method thereof

Power module and method for manufacturing the same

Semiconductor device, method for manufacturing the same, and electronic device

Workpiece with semiconductor chips, semiconductor device and method for producing a workpiece with semiconductor chips

Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer form

Method of packaging integrated circuits

Semiconductor substrate and manufacturing method thereof

SEMICONDUCTOR LIGHT-EMITTING DEVICE AND SEMICONDUCTOR LIGHT-EMITTING APPARATUS HAVING THE SAME

Semiconductor package and manufacturing method thereof

Stacked microelectronic assembly with TSVS formed in stages and carrier above chip

Semiconductor die and package jigsaw submount

Visibility event navigation method and system

Compound semiconductor device

Stress reduction apparatus and method

Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate

Method of multi-chip wafer level packaging

Proximity coupling of interconnect packaging systems and methods

Package substrate, semiconductor package and method of manufacturing the same

Integrated circuit package with embedded bridge

Protrusion bump pads for bond-on-trace processing

Electronic packages and methods of making and using the same

Semiconductor devices having a TSV, a front-side bumping pad, and a back-side bumping pad

Semiconductor packaging structure

Organic thin film passivation of metal interconnections

Apparatus, system, and method for collecting a target material

Bonding pad on a back side illuminated image sensor

Semiconductor package and method of forming the same

Semiconductor packages and fabrication method thereof

Integrated circuit packages and methods of forming same

Semiconductor structure having a conductive bump with a plurality of bump segments

System and method for an improved fine pitch joint

SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME

Device package with reduced thickness and method for forming same

Semiconductor device and manufacturing method thereof

Packaging substrate with block-type via and semiconductor packages having the same

Semiconductor device and method of manufacturing the same

Metal post bonding using pre-fabricated metal posts

Printed circuit board

Semiconductor chip stack with identification section on chip side-surfaces for stacking alignment

Ball amount process in the manufacturing of integrated circuit

Semiconductor device and manufacturing method thereof

Semiconductor device and method of forming the same

Semiconductor package and electronic device having heat dissipation pattern and/or heat conducting line

Semiconductor device including an embedded surface mount device and method of forming the same

Wafer-level stack chip package and method of manufacturing the same

Electrical apparatus

Semiconductor device and manufacturing method for the same

Semiconductor device

Chip using triple pad configuration and packaging method thereof

Ball grid array and land grid array assemblies fabricated using temporary resist

Method of making a semiconductor device package with dummy gate

Method of manufacturing semiconductor device

System and method for an improved interconnect structure

Systems, methods and devices for inter-substrate coupling

LED having vertical contacts redistributed for flip chip mounting

Semiconductor structure and manufacturing method thereof

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME

Package including a semiconductor die and a capacitive component

Systems, methods and devices for inter-substrate coupling

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME

Bond pad structure with dual passivation layers

High density fan out package structure

Semiconductor package

Method of making a semiconductor device having a functional capping

Bump-on-trace design for enlarge bump-to-trace distance

Interconnect structures and methods of forming same

Interconnect structure and method of forming same

Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias

Interconnect crack arrestor structure and methods

Method of forming metal pads with openings in integrated circuits including forming a polymer plug extending into a metal pad

Interconnect structure for wafer level package

Package assembly and method for manufacturing the same

Electronic module having an electrically insulating structure with material having a low modulus of elasticity

System of package (SoP) module and mobile computing device having the SoP

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

3D packages and methods for forming the same

Methods of forming 3-D circuits with integrated passive devices

Method and apparatus for connecting packages onto printed circuit boards

Semiconductor device and manufacturing method thereof

Package on package structure and method for forming the same

Semiconductor package structure and manufacturing method thereof

Chip package structure

Electrical connections for chip scale packaging

Semiconductor package

Electronic device with first and second contact pads and related methods

Embedding thin chips in polymer

Improving the strength of micro-bump joints

Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die

Metallisation for semiconductor device

Contact smart card

Semiconductor device comprising contact structures with protection layers formed on sidewalls of contact etch stop layers

Using interrupted through-silicon-vias in integrated circuits adapted for stacking

Semiconductor devices and packages having through electrodes

Integrated circuit packaging system with under bump metallization and method of manufacture thereof

Semiconductor structure with oval shaped conductor

Package-on-package structures

Multi-die package with bridge layer and method for making the same

Thermocompression for semiconductor chip assembly

Fan out package structure and methods of forming

SEMICONDUCTOR DEVICE WITH A THROUGH ELECTRODE

Semiconductor device and method comprising redistribution layers

Wafer-level flip chip device packages and related methods

Stacked semiconductor device assembly

Semiconductor package having cascaded chip stack

Three dimensional integrated circuits stacking approach

Semiconductor device and a method of manufacturing the same

Chip mounting

Semiconductor package structure with polymeric layer and manufacturing method thereof

Bump-on-trace structures with high assembly yield

Semiconductor devices and methods of manufacture thereof

Integrated circuit packages and methods for forming the same

Semiconductor device and method of adaptive patterning for panelized packaging

Test probe head for full wafer testing

Test probe substrate

Method for mounting chip on printed circuit board

Semiconductor package having stacked chips and a heat dissipation part and method of fabricating the same

Semiconductor package with a lead, package-on-package device including the same, and mobile device including the same

Wafer process for molded chip scale package (MCSP) with thick backside metallization

Semiconductor device and a method of manufacturing the same

Method of manufacturing a semiconductor device

SEMICONDUCTOR DEVICE

Metal routing architecture for integrated circuits

Package with UBM and methods of forming

Package with UBM and methods of forming

Semiconductor package including an embedded surface mount device and method of forming the same

Semiconductor package structure and method of fabricating the same

Semiconductor package structure including die and substrate electrically connected through conductive segments

Substrate structure and method of manufacturing the same

Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers

Semiconductor device

Component which can be produced at wafer level and method of production

Backside bulk silicon MEMS

Semiconductor package

Three-dimensional chip-to-wafer integration

Semiconductor package and method of manufacturing the same

Substrateless integrated circuit packages and methods of forming same

Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask

Scheme for connector site spacing and resulting structures

Through-silicon via access device for integrated circuits

Semiconductor device having multiple bonded heat sinks

Package structure and fabrication method thereof

Packaged semiconductor devices and methods of packaging thereof

Stack structures in electronic devices including passivation layers for distributing compressive force

Chip packages and methods of manufacture thereof

Stack packages and methods of fabricating the same

Semiconductor device including semiconductor chips stacked over substrate

Chip packages and methods of manufacture thereof

Method of forming a bump on pad (BOP) bonding structure in a semiconductor packaged device

Manufacturing method for semiconductor devices

Semiconductor package and method of forming the same

Semiconductor manufacturing for forming bond pads and seal rings

Method for manufacturing a chip arrangement

Method and structure for wafer level packaging with large contact area

Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof

Wafer with liquid molding compound and post-passivation interconnect

Semiconductor package

TSV formation

Package-on-package structure with organic interposer

Metal pad structure over TSV to reduce shorting of upper metal layer

Multilayered contact structure having nickel, copper, and nickel-iron layers

Etching agent for copper or copper alloy

Method for fabricating electronic device package

Integrated circuit comprising at least an integrated antenna

Multiple bond via arrays of different wire heights on a same substrate

Packages and methods of manufacture thereof

Semiconductor devices and package substrates having pillars and semiconductor packages and package stack structures having the same

Interconnect structure comprising fine pitch backside metal redistribution lines combined with vias

Thin plastic leadless package with exposed metal die paddle

Low-stress dual underfill packaging

Semiconductor modules and semiconductor packages

Multi-chip semiconductor apparatus

Preventing misshaped solder balls

ETCHING OF UNDER BUMP METALLIZATION LAYER AND RESULTING DEVICE

Pad structure of a semiconductor device, method of manufacturing the pad structure and semiconductor package including the pad structure

Semiconductor device and method of testing semiconductor device

Etching liquid, etching method, and method of manufacturing solder bump

Common drain semiconductor device structure and method

Microelectronic package with stacked microelectronic units and method for manufacture thereof

Stacked structure of semiconductor chips having via holes and metal bumps

Semiconductor TSV device package for circuit board connection

Semiconductor TSV device package for circuit board connection

Bump structural designs to minimize package defects

Bump pad structure

Semiconductor devices with close-packed via structures having in-plane routing and method of making same

Manufacturing Method of Semiconductor Device

Method for forming package systems having interposers

Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits

Current sensing using a metal-on-passivation layer on an integrated circuit die

Light emitting device and method for manufacturing same

Semiconductor device

Elongated bump structures in package structure

Semiconductor device redistribution layer with narrow trace width relative to passivation layer opening

Semiconductor chip and method for forming a chip pad

Semiconductor structure with an interconnect level having a conductive pad and metallic structure such as a base of a crackstop

Semiconductor die connection system and method

Two step method of rapid curing a semiconductor polymer layer

Ultraviolet semiconductor sensor device and method of measuring ultraviolet radiation

Semiconductor laser structure

Semiconductor device for detection of radiation and method of producing a semiconductor device for detection of radiation

Copper-containing layer on under-bump metallization layer

Semiconductor devices having through electrodes, methods of fabricating the same, electronic systems including the same, and memory cards including same

Semiconductor device and manufacturing method thereof

Method of manufacturing embedded packaging with preformed vias

Substrate interconnections having different sizes

Integrated fan-out package structures with recesses in molding compound

Semiconductor device and method of forming wafer-level interconnect structures with advanced dielectric characteristics

Methods for forming fan-out package structure

Semiconductor devices with recessed interconnects

Semiconductor wiring patterns

Semiconductor device

Semiconductor device including Schottky barrier diode and power MOSFETs and a manufacturing method of the same

Integrated system and method of making the integrated system

Semiconductor device

Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same

Semiconductor device with face-to-face chips on interposer and method of manufacturing the same

Semiconductor devices having through electrodes, methods of manufacturing the same, and semiconductor packages including the same

Methods and apparatus of packaging semiconductor devices

Semiconductor device and method for manufacturing same

Four D device process and structure

Method of forming semiconductor device having a conductive via structure

Packaging structural member

Fan-out package structure and methods for forming the same

Multiple bond via arrays of different wire heights on a same substrate

Semiconductor device including a protective film

Method of forming an integrated circuit device including a pillar capped by barrier layer

SEMICONDUCTOR PACKAGE

Semiconductor package

Capacitor in post-passivation structures and methods of forming the same

Semiconductor device and method of forming conductive vias by backside via reveal with CMP

Contact test structure and method

Method of manufacturing semiconductor package including forming a recessed region in a substrate

SEMICONDUCTOR DEVICE

Bonded structures for package and substrate