209714 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors; Material Bump connectors having different materials
LOW TEMPERATURE SOLDER INTERCONNECT FOR PACKAGE PITCH SCALING
#2IC DEVICE WITH CHIP TO PACKAGE INTERCONNECTS FROM A COPPER METAL INTERCONNECT LEVEL
#3SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
#4SEMICONDUCTOR PACKAGE
#5SEMICONDUCTOR PACKAGES WITH MULTIPLE TYPES OF CONDUCTIVE COMPONENTS
#6SEMICONDUCTOR PACKAGES WITH MULTIPLE TYPES OF SOLDER BALLS
#7SEMICONDUCTOR PACKAGES WITH MULTIPLE TYPES OF CONDUCTIVE COMPONENTS
#8SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#9HIGH DENSITY INTERCONNECT DEVICE AND METHOD
#10SEMICONDUCTOR DIE HAVING A METAL PLATE LAYER
#11MICROELECTRONIC ASSEMBLIES WITH DIRECT BONDING USING NANOTWINNED COPPER
#12SEMICONDUCTOR PACKAGE INCLUDING BALL GRID ARRAY CONNECTIONS WITH IMPROVED RELIABILITY
#13SEMICONDUCTOR PACKAGE HAVING DUMMY SOLDERS AND MANUFACTURING METHOD THEREOF
#14SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME
#15Package structure and manufacturing method thereof
#16Semiconductor package and manufacturing method thereof
#17High density interconnect device and method
#18DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
#19Copper wire bond on gold bump on semiconductor die bond pad
#20Package structure and manufacturing method thereof
#21Integrated structure with bifunctional routing and assembly comprising such a structure
#22High density interconnect device and method
#23IC device with chip to package interconnects from a copper metal interconnect level
#24Package structure including two joint structures including different materials and method for manufacturing the same
#25Copper wire bond on gold bump on semiconductor die bond pad
#26Semiconductor package structure and method for manufacturing the same
#27Aligned core balls for interconnect joint stability
#28High density interconnect device and method
#29Semiconductor bonding structures and methods
#30Semiconductor device
#31Semiconductor device
#32Mechanisms for forming hybrid bonding structures with elongated bumps
#33Semiconductor device and method of manufacturing the same
#34Semiconductor bonding structures and methods
#35Semiconductor device and corresponding method
#36Solder bumps formed on wafers using preformed solder balls with different compositions and sizes
#37High density interconnect device and method
#38Mechanisms for forming hybrid bonding structures with elongated bumps
#39Electronic device, method for manufacturing the electronic device, and electronic apparatus
#40Bump structures for multi-chip packaging
#41Semiconductor device
#42Substrate structure with first and second conductive bumps having different widths
#43Methods of forming multiple conductive features in semiconductor devices in a same formation process
#44Semiconductor packages
#45Thermal management in electronic devices with yielding substrates
#46Semiconductor device and manufacturing method therefor
#47Semiconductor device and method of manufacturing the same
#48Semiconductor package having stacked chips and a heat dissipation part and method of fabricating the same
#49Thermal management in electronic devices with yielding substrates
#50Chip package and method for forming the same
#51CHIP PACKAGE AND METHOD FOR FORMING THE SAME
#52Ball grid array system
#53Semiconductor structures including fluidic microchannels for cooling and related methods
#54Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods
#55Semiconductor device and method of manufacturing the semiconductor device
#56Wafer-level chip-scale package device having bump assemblies configured to furnish shock absorber functionality
#57Mechanisms for forming hybrid bonding structures with elongated bumps
#58Image pickup device and method for producing the same
#59Multi-solder techniques and configurations for integrated circuit package assembly
#60Bump structures for multi-chip packaging
#61Functional material systems and processes for package-level interconnects
#62Method for transferring a graphene sheet to metal contact bumps of a substrate for use in semiconductor device package
#63Multi-solder techniques and configurations for integrated circuit package assembly
#64Bump package and methods of formation thereof
#65Semiconductor device and method of manufacturing the same
#66Flip-chip assembly process for connecting two components to each other
#67Control of silver in C4 metallurgy with plating process
#68Interposers including fluidic microchannels and related structures and methods
#69Semiconductor structures including fluidic microchannels for cooling and related methods
#70Integrated antennas in wafer level package
#71TWO-SOLDER METHOD FOR SELF-ALIGNING SOLDER BUMPS IN SEMICONDUCTOR ASSEMBLY
#72Bump structures for multi-chip packaging
#73SEMICONDUCTOR DEVICE INTERCONNECT
#74Driver package
#75SEMICONDUCTOR PACKAGE
#76Heterostructure containing IC and LED and method for fabricating the same
#77Injection molded solder process for forming solder bumps on substrates
#78Injection molded solder process for forming solder bumps on substrates
#79SEMICONDUCTOR PACKAGES
#80Polymer and solder pillars for connecting chip and carrier
#81Electrical component having an electrical connection arrangement and method for the manufacture thereof
#82Semiconductor device and assembling method thereof
#83Substrate Arrangement and a Method of Manufacturing a Substrate Arrangement
#84Integrated antennas in wafer level package
#85Electronic device comprising a nanotube-based interface connection layer, and manufacturing method thereof
#86Magnetic microelectronic device attachment
#87Assembly of multi-chip modules with proximity connectors using reflowable features
#88Wafer-level chip-scale package device having bump assemblies configured to mitigate failures due to stress
#89Semiconductor package through-electrode suitable for a stacked semiconductor package and semiconductor package having the same
#90Systems and Methods Providing Arrangements of Vias
#91Semiconductor flip chip package having substantially non-collapsible spacer and method of manufacture thereof
#92Variable feature interface that induces a balanced stress to prevent thin die warpage
#93Semiconductor package and semiconductor package module
#94Semiconductor device comprising a through electrode and a pad connected to the through electrode and having an exposed portion and method for fabricating the same
#95Detection device and method for manufacturing the same
#96Bonding inspection structure
#97Semiconductor integrated circuit
#98Standoff height improvement for bumping technology using solder resist
#99Method for connecting between substrates, flip-chip mounting structure, and connection structure between substrates
#100Semiconductor chip and method for fabricating the same
#101SEMICONDUCTOR PACKAGE HAVING PASSIVE COMPONENT BUMPS
#102Composite interconnect
#103POLYMER AND SOLDER PILLARS FOR CONNECTING CHIP AND CARRIER
#104Method and system for providing a reliable semiconductor assembly
#105SEMICONDUCTOR DEVICE HAVING THREE-DIMENSIONAL STACKED STRUCTURE AND METHOD OF FABRICATING THE SAME
#106FLIP-CHIP MOUNTING BODY AND FLIP-CHIP MOUNTING METHOD
#107Semiconductor package through-electrode suitable for a stacked semiconductor package and semiconductor package having the same
#108Standoff height improvement for bumping technology using solder resist
#109Method of assembling a silicon stack semiconductor package
#110SOLDER SUPPLYING METHOD
#111Method for manufacturing semiconductor package
#112Bond quality indication by bump structure on substrate
#113Chip having side pad, method of fabricating the same and package using the same
#114BUMP ELECTRODE INCLUDING PLATING LAYERS AND METHOD OF FABRICATING THE SAME
#115Semiconductor chip and method for fabricating the same
#116Article and assembly for magnetically directed self assembly
#117Chip package and method for fabricating the same
#118Mechanical integrity evaluation of low-k devices with bump shear
#119Method and apparatus for improving thermal energy dissipation in a direct-chip-attach coupling configuration of an integrated circuit and a circuit board
#120Integrated device and electronic system
#121Semiconductor flip chip package having substantially non-collapsible spacer
#122Methods for fabricating semiconductor devices so as to stabilize the same when contact-bearing surfaces thereof face over test substrates
#123Method of making an electronic assembly
#124Stacked packages
#125Electronic assembly having multi-material interconnects
#126Package structure with two solder arrays
#127Microelectronic assembly having array including passive elements and interconnects