H01L2224/321 - CPC Classification Index

ClassID:

209932 ⎘

H01L2224/321 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto; Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector Disposition

Sub-classes:

H01L2224/32104 » relative to the bonding area, e.g. bond pad 22
H01L2224/32111 » the layer connector being disposed in a recess of the surface 27
H01L2224/32112 » the layer connector being at least partially embedded in the surface 9
H01L2224/32113 » the whole layer connector protruding from the surface 25
H01L2224/3213 » the layer connector connecting within a semiconductor or solid-state body, i.e. connecting two bonding areas on the same semiconductor or solid-state body 13
H01L2224/32135 » the layer connector connecting between different semiconductor or solid-state bodies i.e. chip-to-chip 24
H01L2224/32151 » the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive 17

Recent Application in this class:

20240038705

Substrate bonding method

20190081020

Member for semiconductor device

20170207187

Method for producing member for semiconductor device and semiconductor device, and member for semiconductor device

20160035591

Methods and apparatus for bump-on-trace chip packaging

20150340341

Package systems

20150255413

Enhanced board level reliability for wafer level packages

20140346673

Methods and apparatus for bump-on-trace chip packaging

20140170849

Package systems and manufacturing methods thereof

20140127856

Electronic assembly with three dimensional inkjet printed traces

20140124892

Semiconductor device and method for forming the same

20140054795

Electronic assembly with three dimensional inkjet printed traces

20140033526

Fabricating method of embedded package structure

20130264721

Electronic Module

20130161708

SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

20130100728

Semiconductor device and method for forming the same

20130049229

Semiconductor chip device with solder diffusion protection

20120133042

MOUNTING STRUCTURE OF CHIP AND MODULE USING THE SAME

20120086127

Package systems having a eutectic bonding material and manufacturing methods thereof

20120086126

Package systems having an opening in a substrate thereof and manufacturing methods thereof

20110147916

Semiconductor chip device with solder diffusion protection

20110084388

Reducing underfill keep out zone on substrate used in electronic device processing

20100314352

Fabricating method of embedded package structure

20090321959

Chip arrangement and method of manufacturing a chip arrangement

20090032974

Method and structure to reduce cracking in flip chip underfill

20080157352

Reducing underfill keep out zone on substrate used in electronic device processing