ClassID:

210172

H01L2224/73277 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being of different types provided for in two or more of groups; Location after the connecting process on different surfaces Wire and HDI connectors

Recent Application in this class:
#1
20260005199
2026-01-01

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

#2
20210343691
2021-11-04

Semiconductor package and method of manufacturing the semiconductor package

#3
20200118993
2020-04-16

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

#4
20200075565
2020-03-05

Package structure for semiconductor device and manufacturing method thereof

#5
20190109120
2019-04-11

Integrated circuit package assemblies including a chip recess

#6
20190027415
2019-01-24

Chip packaging structure, chip module and electronic terminal

#7
20180122789
2018-05-03

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

#8
20180005991
2018-01-04

Integrated circuit package assemblies including a chip recess

#9
20160293582
2016-10-06

Semiconductor device

#10
20160225730
2016-08-04

Electrode connection structure and electrode connection method

#11
20150266728
2015-09-24

Stress buffer layer for integrated microelectromechanical systems (MEMS)

#12
20140315355
2014-10-23

Manufacturing method of wafer level package

#13
20140061899
2014-03-06

Wafer level package structure

#14
20120228745
2012-09-13

Semiconductor package structure and manufacturing method thereof

#15
20110233755
2011-09-29

Semiconductor housing package, semiconductor package structure including the semiconductor housing package, and processor-based system including the semiconductor package structure

#16
20110045634
2011-02-24

Semiconductor device and method of forming dual-active sided semiconductor die in fan-out wafer level chip scale package

#17
20090102067
2009-04-23

Electrically enhanced wirebond package

#18
20070152310
2007-07-05

Electrical ground method for ball stack package

#19
20060246624
2006-11-02

Semiconductor device with semiconductor chip and rewiring layer and method for producing the same

#20
20050098871
2005-05-12

Semiconductor device with semiconductor chip and rewiring layer and method for producing the same