211904 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips; Aligning the plurality of semiconductor or solid-state bodies Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
Sub-classes:SEMICONDUCTOR PACKAGING METHOD, SEMICONDUCTOR ASSEMBLY COMPONENT AND ELECTRONIC DEVICE
#2PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
#3Fluidic assembly encapsulating light emitting diodes
#4Encapsulated light emitting diodes for selective fluidic assembly
#5Method for encapsulating emissive elements for fluidic assembly
#6Encapsulated emissive element for fluidic assembly
#7Encapsulated fluid assembly emissive elements
#8Printing complex electronic circuits using a printable solution defined by a patterned hydrophobic layer
#9Printing complex electronic circuits using a patterned hydrophobic layer
#10Method for forming complex electronic circuits by interconnecting groups of printed devices
#11Printing complex electronic circuits
#12Method of manufacturing semiconductor device, semiconductor device and multilayer wafer structure
#13Method for fabricating a chip having a water-repellent obverse surface and a hydrophilic reverse surface
#14Method for disposing a component
#15Use of device assembly for a generalization of three-dimensional metal interconnect technologies
#16Method of manufacturing semiconductor device, semiconductor device and multilayer wafer structure