ClassID:

207731

H01L23/525 - page 3 - CPC Classification

Classification description:

Details of semiconductor or other solid state devices; Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections

Recent Application in this class:
#601
20110039398
2011-02-17

Efficient power management method in integrated circuit through a nanotube structure

#602
20110037168
2011-02-17

Semiconductor device and method of providing a thermal dissipation path through RDL and conductive via

#603
20110031615
2011-02-10

Semiconductor device

#604
20110031584
2011-02-10

Semiconductor device and manufacturing method thereof

#605
20110027945
2011-02-03

Method for producing substrate for mounting device and method for producing a semiconductor module

#606
20110027944
2011-02-03

Method of forming electrical connections

#607
20110006434
2011-01-13

Under land routing

#608
20110001247
2011-01-06

SEMICONDUCTOR DEVICE MANUFACTURING METHOD

#609
20110001238
2011-01-06

Semiconductor construct and manufacturing method thereof as well as semiconductor device and manufacturing method thereof

#610
20110001236
2011-01-06

Semiconductor device and a method of manufacturing the same

#611
20100327454
2010-12-30

Semiconductor device, and method of fabricating semiconductor device

#612
20100320600
2010-12-23

Surface depressions for die-to-die interconnects and associated systems

#613
20100314758
2010-12-16

Through-silicon via structure and a process for forming the same

#614
20100314737
2010-12-16

Intra-die routing using back side redistribution layer and associated method

#615
20100295189
2010-11-25

Method of chip repair by stacking a plurality of bad dies

#616
20100289147
2010-11-18

Semiconductor die having a redistribution layer

#617
20100289139
2010-11-18

Hardwired switch of die stack and operating method of hardwired switch

#618
20100283150
2010-11-11

Semiconductor device

#619
20100283146
2010-11-11

Semiconductor structure

#620
20100283085
2010-11-11

Massively parallel interconnect fabric for complex semiconductor devices

#621
20100276787
2010-11-04

Wafer backside structures having copper pillars

#622
20100270679
2010-10-28

Microelectronic packages fabricated at the wafer level and methods therefor

#623
20100270656
2010-10-28

Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices

#624
20100264955
2010-10-21

Metal programmable logic and multiple function pin interface

#625
20100264514
2010-10-21

SEMICONDUCTOR DEVICE AND A METHOD OF INCREASING A RESISTANCE VALUE OF AN ELECTRIC FUSE

#626
20100258930
2010-10-14

Stacked semiconductor package and method of manufacturing thereof

#627
20100254113
2010-10-07

Electronic board, method of manufacturing the same, and electronic device

#628
20100252934
2010-10-07

Three-dimensional semiconductor architecture

#629
20100252933
2010-10-07

Semiconductor device

#630
20100237506
2010-09-23

Semiconductor device with arrangement of parallel conductor lines being insulated, between and orthogonal to external contact pads

#631
20100237485
2010-09-23

Stack type semiconductor package apparatus

#632
20100237484
2010-09-23

Semiconductor package

#633
20100221908
2010-09-02

Manufacturing method of semiconductor device

#634
20100221854
2010-09-02

Semiconductor device

#635
20100219927
2010-09-02

Electronic substrate, semiconductor device, and electronic device

#636
20100213615
2010-08-26

Semiconductor device

#637
20100210103
2010-08-19

Method of manufacturing semiconductor device

#638
20100203720
2010-08-12

Semiconductor package and method for manufacturing the same for decreasing number of processes

#639
20100197077
2010-08-05

Semiconductor package adapted for high-speed data processing and damage prevention of chips packaged therein and method for fabricating the same

#640
20100193959
2010-08-05

Redistribution layer power grid

#641
20100193907
2010-08-05

CAPACITOR STRUCTURE IN A SEMICONDUCTOR DEVICE

#642
20100167423
2010-07-01

Semiconductor package and methods of manufacturing the same

#643
20100155941
2010-06-24

SEMICONDUCTOR DEVICE

#644
20100155938
2010-06-24

Face-to-face (F2F) hybrid structure for an integrated circuit

#645
20100144097
2010-06-10

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE IN WHICH BOTTOM SURFACE AND SIDE SURFACE OF SEMICONDUCTOR SUBSTRATE ARE COVERED WITH RESIN PROTECTIVE FILM

#646
20100140795
2010-06-10

Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices

#647
20100127394
2010-05-27

Through substrate vias for back-side interconnections on very thin semiconductor wafers

#648
20100117236
2010-05-13

Top layers of metal for high performance IC's

#649
20100109620
2010-05-06

Semiconductor body and method for voltage regulation

#650
20100105200
2010-04-29

Semiconductor package with passivation island for reducing stress on solder bumps

#651
20100096754
2010-04-22

Semiconductor package, semiconductor module, and method for fabricating the semiconductor package

#652
20100096749
2010-04-22

Semiconductor package with a metal post

#653
20100096536
2010-04-22

On demand circuit function execution employing optical sensing

#654
20100084747
2010-04-08

Zigzag pattern for TSV copper adhesion

#655
20100078819
2010-04-01

Inter connection structure including copper pad and pad barrier layer, semiconductor device and electronic apparatus including the same

#656
20100072605
2010-03-25

Semiconductor package with a controlled impedance bus and method of forming same

#657
20100065948
2010-03-18

Semiconductor device and method of forming a fan-in package-on-package structure using through silicon vias

#658
20100062600
2010-03-11

Method of manufacturing a semiconductor device

#659
20100044877
2010-02-25

Electronic device having a chip stack

#660
20100044868
2010-02-25

SEMICONDUCTOR DEVICE

#661
20100044847
2010-02-25

Semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack, a semiconductor device package and an electronic apparatus including the semiconductor chip

#662
20100038803
2010-02-18

LOW FABRICATION COST, HIGH PERFORMANCE, HIGH RELIABILITY CHIP SCALE PACKAGE

#663
20100032848
2010-02-11

Bond pad structure and method for producing same

#664
20100025853
2010-02-04

Back-end-of-line wiring structures with integrated passive elements and design structures for a radiofrequency integrated circuit

#665
20100015794
2010-01-21

Packaging conductive structure and method for forming the same

#666
20100015763
2010-01-21

RESCUE STRUCTURE AND METHOD FOR LASER WELDING

#667
20100013102
2010-01-21

Semiconductor device and method of providing a thermal dissipation path through RDL and conductive via

#668
20100013082
2010-01-21

Chip package and method for fabricating the same

#669
20100013077
2010-01-21

Semiconductor device

#670
20100007011
2010-01-14

Semiconductor package and method for packaging a semiconductor package

#671
20090321953
2009-12-31

Circuit substrate having circuit wire formed of conductive polarization particles, method of manufacturing the circuit substrate and semiconductor package having the circuit wire

#672
20090321947
2009-12-31

Surface depressions for die-to-die interconnects and associated systems and methods

#673
20090315177
2009-12-24

Semiconductor package with joint reliability, entangled wires including insulating material

#674
20090309225
2009-12-17

Top layers of metal for high performance IC's

#675
20090309205
2009-12-17

Semiconductor chip package and multichip package

#676
20090302467
2009-12-10

Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board

#677
20090298234
2009-12-03

METHOD OF FABRICATING SEMICONDUCTOR CHIP PACKAGE, SEMICONDUCTOR WAFER, AND METHOD OF SAWING THE SEMICONDUCTOR WAFER

#678
20090294958
2009-12-03

WAFER LEVEL REDISTRIBUTION USING CIRCUIT PRINTING TECHNOLOGY

#679
20090289364
2009-11-26

Semiconductor device and a method for manufacturing the same

#680
20090283898
2009-11-19

Disabling electrical connections using pass-through 3D interconnects and associated systems and methods

#681
20090278263
2009-11-12

RELIABILITY WCSP LAYOUTS

#682
20090256248
2009-10-15

Configuration terminal for integrated devices and method for configuring an integrated device

#683
20090243081
2009-10-01

System and method of forming a wafer scale package

#684
20090224409
2009-09-10

Semiconductor device

#685
20090224392
2009-09-10

Semiconductor package having side walls and method for manufacturing the same

#686
20090212428
2009-08-27

RE-DISTRIBUTION CONDUCTIVE LINE STRUCTURE AND THE METHOD OF FORMING THE SAME

#687
20090212427
2009-08-27

Solder structures including barrier layers with nickel and/or copper

#688
20090206490
2009-08-20

Semiconductor device and a method of manufacturing the same

#689
20090200664
2009-08-13

Manufacturing method of semiconductor apparatus and semiconductor apparatus

#690
20090189281
2009-07-30

SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME

#691
20090189196
2009-07-30

Programmable nanotube interconnect

#692
20090183906
2009-07-23

SUBSTRATE FOR MOUNTING DEVICE AND METHOD FOR PRODUCING THE SAME, SEMICONDUCTOR MODULE AND METHOD FOR PRODUCING THE SAME, AND PORTABLE APPARATUS PROVIDED WITH THE SAME

#693
20090174068
2009-07-09

Semiconductor device, circuit board, and electronic instrument

#694
20090168391
2009-07-02

SUBSTRATE FOR MOUNTING DEVICE AND METHOD FOR PRODUCING THE SAME, SEMICONDUCTOR MODULE AND METHOD FOR PRODUCING THE SAME, AND PORTABLE APPARATUS PROVIDED WITH THE SAME

#695
20090166856
2009-07-02

Semiconductor Device

#696
20090166849
2009-07-02

Semiconductor chip having conductive member for reducing localized voltage drop

#697
20090166848
2009-07-02

Method for Enhancing the Adhesion of a Passivation Layer on a Semiconductor Device

#698
20090160066
2009-06-25

Semiconductor element, semiconductor device, and fabrication method thereof

#699
20090155982
2009-06-18

Method of manufacturing semiconductor device having semiconductor formation regions of different planar sizes

#700
20090152709
2009-06-18

Controller chip mounted on a memory chip with re-wiring lines

#701
20090146307
2009-06-11

Top layers of metal for high performance IC's

#702
20090146278
2009-06-11

Chip-stacked package structure with asymmetrical leadframe

#703
20090140424
2009-06-04

Wafer level semiconductor package and method for manufacturing the same

#704
20090134516
2009-05-28

Method of manufacturing semiconductor device and semiconductor device

#705
20090130839
2009-05-21

Manufacturing method of redistribution circuit structure

#706
20090127709
2009-05-21

Semiconductor device

#707
20090121350
2009-05-14

Board adapted to mount an electronic device, semiconductor module and manufacturing method therefor, and portable device

#708
20090111219
2009-04-30

Wafer-level chip scale package and method for fabricating and using the same

#709
20090104769
2009-04-23

Semiconductor chip with coil element over passivation layer

#710
20090102512
2009-04-23

Edit structure that allows the input of a logic gate to be changed by modifying any one of the metal or via masks used to form the metal interconnect structure

#711
20090102038
2009-04-23

CHIP SCALE STACKED DIE PACKAGE

#712
20090096094
2009-04-16

Semiconductor device

#713
20090079073
2009-03-26

Semiconductor device having low dielectric insulating film and manufacturing method of the same

#714
20090079072
2009-03-26

Semiconductor device having low dielectric insulating film and manufacturing method of the same

#715
20090079070
2009-03-26

Semiconductor package with passivation island for reducing stress on solder bumps

#716
20090072397
2009-03-19

Redistribution layer for wafer-level chip scale package and method therefor

#717
20090057907
2009-03-05

INTERCONNECTION STRUCTURE

#718
20090057900
2009-03-05

Stacked chip package with redistribution lines

#719
20090057898
2009-03-05

Semiconductor device and method of manufacturing the same

#720
20090057889
2009-03-05

Semiconductor device having wafer level chip scale packaging substrate decoupling

#721
20090051030
2009-02-26

Semiconductor package with pad parts electrically connected to bonding pads through re-distribution layers

#722
20090045516
2009-02-19

Top layers of metal for high performance IC's

#723
20090045511
2009-02-19

Integrated circuit including parylene material layer

#724
20090045487
2009-02-19

Semiconductor chip, method of fabricating the same and stacked package having the same

#725
20090032966
2009-02-05

Method of fabricating a semiconductor device, and semiconductor device with a conductive member extending through a substrate and connected to a metal pattern bonded to the substrate

#726
20090032964
2009-02-05

System and method for providing semiconductor device features using a protective layer

#727
20090032941
2009-02-05

Under Bump Routing Layer Method and Apparatus

#728
20090026631
2009-01-29

Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board

#729
20090026613
2009-01-29

Semiconductor package and method for manufacturing the same for decreasing number of processes

#730
20090026591
2009-01-29

Semiconductor package adapted for high-speed data processing and damage prevention of chips packaged therein and method for fabricating the same

#731
20090004781
2009-01-01

Method of fabricating a semiconductor die having a redistribution layer

#732
20090001610
2009-01-01

Semiconductor die having a distribution layer

#733
20090001569
2009-01-01

Semiconductor device and method for manufacturing the same

#734
20090001542
2009-01-01

Semiconductor package and multi-chip semiconductor package using the same

#735
20080315413
2008-12-25

Electronic device manufacturing method and electronic device

#736
20080315394
2008-12-25

Semiconductor package having re-distribution lines for supplying power and a method for manufacturing the same

#737
20080308929
2008-12-18

Semiconductor device, chip package and method of fabricating the same

#738
20080303167
2008-12-11

Device having high aspect-ratio via structure in low-dielectric material and method for manufacturing the same

#739
20080290444
2008-11-27

Capacitor structure in a semiconductor device

#740
20080272500
2008-11-06

Semiconductor device and method for manufacturing semiconductor device

#741
20080265410
2008-10-30

Wafer level package

#742
20080265408
2008-10-30

Highly reliable low cost structure for wafer-level ball grid array packaging

#743
20080258315
2008-10-23

SEMICONDUCTOR DEVICE AND PRODUCTION METHOD OF THE SAME SEMICONDUCTOR DEVICE

#744
20080251939
2008-10-16

Chip stack package and method of fabricating the same

#745
20080251778
2008-10-16

Four-terminal programmable via-containing structure and method of fabricating same

#746
20080248645
2008-10-09

Method to create a metal pattern using a damascene-like process

#747
20080246154
2008-10-09

Top layers of metal for high performance IC's

#748
20080246113
2008-10-09

Semiconductor device including redistribution line structure and method of fabricating the same

#749
20080241998
2008-10-02

Method for fabricating a low cost integrated circuit (IC) package

#750
20080237880
2008-10-02

Integrated circuit package system with protected conductive layers for pads and method of manufacturing thereof

#751
20080230891
2008-09-25

Chip and wafer integration process using vertical connections

#752
20080230877
2008-09-25

SEMICONDUCTOR PACKAGE HAVING WIRE REDISTRIBUTION LAYER AND METHOD OF FABRICATING THE SAME

#753
20080224307
2008-09-18

Semiconductor die with mask programmable interface selection

#754
20080224302
2008-09-18

Semiconductor module having deflecting conductive layer over a spacer structure

#755
20080220607
2008-09-11

Signal routing on redistribution layer

#756
20080217772
2008-09-11

Semiconductor device manufacturing method and semiconductor device

#757
20080217769
2008-09-11

Semiconductor module, method of manufacturing semiconductor module, and mobile device

#758
20080203578
2008-08-28

Circuit device, a method for manufacturing a circuit device, and a semiconductor module

#759
20080203569
2008-08-28

Semiconductor device and manufacturing method thereof

#760
20080203525
2008-08-28

Capacitance trimming circuit of semiconductor device having vertically stacked capacitor layers and operation method thereof

#761
20080197482
2008-08-21

Semiconductor module, portable device and method for manufacturing semiconductor module

#762
20080197475
2008-08-21

Packaging conductive structure for a semiconductor substrate having a metallic layer

#763
20080197455
2008-08-21

Method of manufacturing semiconductor devices encapsulated in chip size packages

#764
20080194064
2008-08-14

Programming of laser fuse

#765
20080191349
2008-08-14

Semiconductor device with magnetic powder mixed therein and manufacturing method thereof

#766
20080185738
2008-08-07

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

#767
20080185727
2008-08-07

Semiconductor device capable of selecting wiring connection mode by controlling via formation

#768
20080174026
2008-07-24

SEMICONDUCTOR DEVICE

#769
20080174025
2008-07-24

Semiconductor chip structure, method of manufacturing the semiconductor chip structure, semiconductor chip package, and method of manufacturing the semiconductor chip package

#770
20080174014
2008-07-24

Semiconductor device

#771
20080174000
2008-07-24

Zigzag-stacked package structure

#772
20080169558
2008-07-17

Redistribution circuit structure

#773
20080160674
2008-07-03

Method of making a semiconductor device having multiple die redistribution layer

#774
20080157355
2008-07-03

Semiconductor device having multiple die redistribution layer

#775
20080157338
2008-07-03

Packing board for electronic device, packing board manufacturing method, semiconductor module, semiconductor module manufacturing method, and mobile device

#776
20080157303
2008-07-03

Structure of super thin chip scale package and method of the same

#777
20080153204
2008-06-26

SEMICONDUCTOR DICE HAVING BACK SIDE REDISTRIBUTION LAYER ACCESSED USING THROUGH-SILICON VIAS, METHODS

#778
20080146020
2008-06-19

Top layers of metal for high performance IC's

#779
20080145973
2008-06-19

Method of manufacturing wafer level chip size package

#780
20080142981
2008-06-19

Top layers of metal for high performance IC's

#781
20080142980
2008-06-19

Top layers of metal for high performance IC's

#782
20080138976
2008-06-12

Semiconductor chip and production process therefor

#783
20080128917
2008-06-05

Semiconductor device and manufacturing method therefor

#784
20080128905
2008-06-05

Wafer level chip scale package, method of manufacturing the same, and semiconductor chip module including the wafer level chip scale package

#785
20080124837
2008-05-29

Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps

#786
20080122078
2008-05-29

Systems and methods to passivate on-die redistribution interconnects

#787
20080122062
2008-05-29

Wafer level package configured to compensate size difference in different types of packages

#788
20080121943
2008-05-29

Top layers of metal for integrated circuits

#789
20080119029
2008-05-22

WAFER SCALE THIN FILM PACKAGE

#790
20080111223
2008-05-15

Wafer level chip size packaged chip device with a double-layer lead structure and method of fabricating the same

#791
20080099928
2008-05-01

Low fabrication cost, high performance, high reliability chip scale package

#792
20080099885
2008-05-01

SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING THE SAME

#793
20080090398
2008-04-17

Method for manufacturing a structure in a semiconductor device and a structure in a semiconductor device

#794
20080090333
2008-04-17

Microelectronic packages fabricated at the wafer level and methods therefor

#795
20080088004
2008-04-17

WAFER LEVEL PACKAGE STRUCTURE WITH BUILD UP LAYERS

#796
20080083988
2008-04-10

Top layers of metal for high performance IC's

#797
20080083987
2008-04-10

Top layers of metal for high performance IC's

#798
20080079150
2008-04-03

Die arrangement and method for producing a die arrangement

#799
20080073789
2008-03-27

Method of identifying and/or programming an integrated circuit

#800
20080061319
2008-03-13

Systems and methods for supporting a subset of multiple interface types in a semiconductor device

#801
20080054441
2008-03-06

Chip package and method for fabricating the same

#802
20080050913
2008-02-28

Top layers of metal for high performance IC's

#803
20080050909
2008-02-28

Top layers of metal for high performance IC's

#804
20080048329
2008-02-28

Top layers of metal for high performance IC's

#805
20080045007
2008-02-21

Top layers of metal for integrated circuits

#806
20080038874
2008-02-14

Chip package and method for fabricating the same

#807
20080036067
2008-02-14

Package structure with leadframe on offset chip-stacked structure

#808
20080032458
2008-02-07

Semiconductor device and method of manufacturing same

#809
20080012132
2008-01-17

Chip structure with redistribution traces

#810
20080001296
2008-01-03

Multiple-dies semiconductor device with redistributed layer pads

#811
20070293037
2007-12-20

Top layers of metal for high performance IC's

#812
20070293036
2007-12-20

Top layers of metal for high performance IC's

#813
20070290368
2007-12-20

Top layers of metal for high performance IC's

#814
20070290358
2007-12-20

Top layers of metal for high performance IC's

#815
20070290357
2007-12-20

Top layers of metal for high performance IC's

#816
20070290356
2007-12-20

Top layers of metal for high performance IC's

#817
20070290355
2007-12-20

Top layers of metal for high performance IC's

#818
20070290354
2007-12-20

Top layers of metal for high performance IC's

#819
20070290353
2007-12-20

Top layers of metal for high performance IC's

#820
20070290352
2007-12-20

Top layers of metal for high performance IC's

#821
20070290351
2007-12-20

Top layers of metal for high performance IC's

#822
20070290350
2007-12-20

Top layers of metal for high performance IC's

#823
20070290349
2007-12-20

Top layers of metal for high performance IC's

#824
20070290348
2007-12-20

Top layers of metal for high performance IC's

#825
20070290187
2007-12-20

Repair structure and active device array substrate

#826
20070288880
2007-12-13

Top layers of metal for high performance IC's

#827
20070285123
2007-12-13

Programming semiconductor dies for pin map compatibility

#828
20070284753
2007-12-13

Top layers of metal for high performance IC's

#829
20070284752
2007-12-13

Top layers of metal for high performance IC's

#830
20070284751
2007-12-13

Top layers of metal for high performance IC's

#831
20070284750
2007-12-13

Top layers of metal for high performance IC's

#832
20070284739
2007-12-13

Top layers of metal for high performance IC's

#833
20070284726
2007-12-13

Integrated circuit package system with post-passivation interconnection and integration

#834
20070284716
2007-12-13

Assembly having stacked die mounted on substrate

#835
20070281468
2007-12-06

Top layers of metal for high performance IC's

#836
20070281467
2007-12-06

Top layers of metal for high performance IC's

#837
20070281463
2007-12-06

Top layers of metal for high performance IC's

#838
20070281458
2007-12-06

Top layers of metal for high performance IC's

#839
20070279176
2007-12-06

On-chip inductor using redistribution layer and dual-layer passivation

#840
20070278691
2007-12-06

Top layers of metal for high performance IC's

#841
20070278690
2007-12-06

Top layers of metal for high performance IC's

#842
20070278689
2007-12-06

Top layers of metal for high performance IC's

#843
20070278688
2007-12-06

Top layers of metal for high performance IC's

#844
20070278687
2007-12-06

Top layers of metal for high performance IC's

#845
20070278686
2007-12-06

Top layers of metal for high performance IC's

#846
20070278685
2007-12-06

Top layers of metal for high performance IC's

#847
20070278684
2007-12-06

Top layers of metal for high performance IC's

#848
20070278679
2007-12-06

Top layers of metal for high performance IC's

#849
20070273041
2007-11-29

Top layers of metal for high performance IC's

#850
20070273040
2007-11-29

Top layers of metal for high performance IC's

#851
20070273039
2007-11-29

Top layers of metal for high performance IC's

#852
20070273038
2007-11-29

Top layers of metal for high performance IC's

#853
20070273037
2007-11-29

Top layers of metal for high performance IC's

#854
20070273036
2007-11-29

Top layers of metal for high performance IC's

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2007-11-29

Top layers of metal for high performance IC's

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2007-11-29

Top layers of metal for high performance IC's

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2007-11-29

Top layers of metal for high performance IC's

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2007-11-29

Top layers of metal for high performance IC's

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2007-11-22

Semiconductor device having low dielectric insulating film and manufacturing method of the same

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2007-11-22

Top layers of metal for high performance IC's

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2007-11-15

Super high density module with integrated wafer level packages

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2007-11-15

Top layers of metal for high performance IC's

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2007-11-15

Top layers of metal for high performance IC's

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2007-11-15

Top layers of metal for high performance IC's

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2007-11-15

Top layers of metal for high performance IC's

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2007-11-15

Top layers of metal for high performance IC's

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2007-11-15

Top layers of metal for high performance IC's

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2007-11-15

Rescue structure and method for laser welding

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2007-10-11

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH POST-PASSIVATION INTERCONNECTION AND INTEGRATION

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2007-10-04

High-performance semiconductor package

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Integrated-circuit chip with offset external pads and method for fabricating such a chip

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2007-09-27

Method for fabricating a BGA device and BGA device

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Semiconductor device having a fuse element

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2007-09-20

Semiconductor device and method of manufacturing the same, electronic device and method of manufacturing the same, and electronic instrument

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2007-09-20

Semiconductor device, manufacturing method and mounting method of the semiconductor device, circuit board, and electronic apparatus

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Semiconductor device and a method of increasing a resistance value of an electric fuse

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2007-09-06

Electronic substrate, semiconductor device, and electronic device

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2007-08-30

Method for manufacturing semiconductor device

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2007-08-30

Redistribution connecting structure of solder balls

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2007-08-30

Base semiconductor chip, semiconductor integrated circuit device, and semiconductor integrated circuit device manufacturing method

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2007-08-23

Methods of redistributing bondpad locations on an integrated circuit

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Semiconductor package having an optical device and a method of making the same

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2007-08-16

Patterned gold bump structure for semiconductor chip

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2007-08-09

Electric fuse circuit providing margin read function

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2007-08-09

Method for forming a redistribution layer in a wafer structure

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2007-08-02

Wafer level chip scale package having a gap and method for manufacturing the same

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20070176240
2007-08-02

Wafer level package having floated metal line and method thereof

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2007-07-19

WAFER LEVEL CHIP SCALE PACKAGE HAVING REROUTING LAYER AND METHOD OF MANUFACTURING THE SAME

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Super high-density module with integrated wafer level packages

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2007-06-28

Compliant terminal mountings with vented spaces and methods

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20070145607
2007-06-28

System to wirebond power signals to flip-chip core

#892
20070145558
2007-06-28

Super high-density module with integrated wafer level packages

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20070145536
2007-06-28

Compliant terminal mountings with vented spaces and methods

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20070127172
2007-06-07

On demand circuit function execution employing optical sensing

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2007-06-07

Configurable power segmentation using a nanotube structure

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20070114613
2007-05-24

Programmable nanotube interconnect

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2007-05-17

Semiconductor chip having bond pads

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2007-05-17

Semiconductor chip having bond pads

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20070108629
2007-05-17

Wafer level chip scale packaging structure and method of fabricating the same

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2007-05-17

Wafer level package having redistribution interconnection layer and method of forming the same