Device having reduced pad peeling during tensile stress testing and a method of forming thereof

Metal to metal bonding for stacked (3D) integrated circuits

Stack type semiconductor package

Package with solder regions aligned to recesses

Electronic circuit arrangement and method of manufacturing the same

Method of making a pillar structure having a non-metal sidewall protection structure

Pillar bumps and process for making same

Semiconductor device, fabrication method for a semiconductor device and electronic apparatus

Semiconductor device and manufacturing method thereof

Process for fabricating a three-dimensional integrated structure with improved heat dissipation, and corresponding three-dimensional integrated structure

Method of fabricating semiconductor apparatus with through-silicon via and method of fabricating stack package including the semiconductor chip

Electroplating baths of silver and tin alloys

Moisture barrier for a wire bond

Semiconductor package including a substrate with a stepped sidewall structure

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Semiconductor structure with sacrificial anode and passivation layer and method for forming

Copper pillar bump with cobalt-containing sidewall protection layer

Techniques for fabricating fine-pitch micro-bumps

Compliant interconnects in wafers

Semiconductor device comprising mold for top side and sidewall protection

Method for bonding wafers and structure of bonding part

High power dielectric carrier with accurate die attach layer

Method of making a conductive pillar bump with non-metal sidewall protection structure

Environmentally-assisted technique for transferring devices onto non-conventional substrates

Contact landing pads for a semiconductor device and methods of making same

Chip package and method for forming the same

Semiconductor device

Chip package and method for forming the same

QFN/SON-Compatible Package

Method for mounting a semiconductor chip on a carrier

Testing of semiconductor chips with microbumps

Semiconductor device having under-bump metallization (UBM) structure and method of forming the same

Metal bump structure for use in driver IC and method for forming the same

Metal bump structure for use in driver IC and method for forming the same

Power semiconductor device, method of manufacturing the device and bonding wire

Wafer backside interconnect structure connected to TSVs

Method of making bond pad

BARRIER LAYER ON BUMP AND NON-WETTABLE COATING ON TRACE

Metal bump joint structure and methods of forming

Directly cooled substrates for semiconductor modules and corresponding manufacturing methods

Semiconductor device and method of forming stress-reduced conductive joint structures

Contact pads with sidewall spacers and method of making contact pads with sidewall spacers

Semiconductor device and method of forming bump structure with insulating buffer layer to reduce stress on semiconductor wafer

High quality factor filter implemented in wafer level packaging (WLP) integrated device

Manufacturing method of wafer level package

Wafer backside interconnect structure connected to TSVs

Semiconductor device and a method of manufacturing the same

Semiconductor device, semiconductor package, and electronic system

FLIP-CHIP SEMICONDUCTOR PACKAGE

Semiconductor element, semiconductor device and method for manufacturing semiconductor element

Pad over interconnect pad structure design

Bundled memory and manufacture method for a bundled memory with an external input/output bus

Methods of fabricating a chromium/titanium/aluminum-based semiconductor device contact

Chip interposer, semiconductor device, and method for manufacturing a semiconductor device

Semiconductor device fabrication method and semiconductor device

Semiconductor device and method of forming conductive vias using backside via reveal and selective passivation

Semiconductor device

Semiconductor device manufacturing method and semiconductor device

Chip and manufacturing method thereof

Scheme for connector site spacing and resulting structures

Through silicon via with embedded barrier pad

System and method of sensing current in a power semiconductor device

Method for manufacturing semiconductor devices having a metallisation layer

Semiconductor device having a through-substrate via

Semiconductor device and method of manufacturing the same

Semiconductor device that attenuates high-frequency oscillation

Method for forming termination structure for gallium nitride Schottky diode

Method of manufacturing semiconductor device

Methods for hybrid wafer bonding integrated with CMOS processing

Gold die bond sheet preform

Fan-out interconnect structure and method for forming same

Semiconductor package structure and method of manufacturing the same

Methods and structures to facilitate through-silicon vias

Conductive line system and process

Semiconductor device and method of forming a dual UBM structure for lead free bump connections

Integrated circuit structure having dies with connectors

Method for manufacturing a semiconductor chip with each contact pad having a pad cell associated therewith

BACKPLATE INTERCONNECT WITH INTEGRATED PASSIVES

Wafer stack protection seal

Method of forming a HEMT semiconductor device and structure therefor

System and method for an improved interconnect structure

Under ball metallurgy (UBM) for improved electromigration

Transfer substrate for forming metal wiring and method for forming metal wiring with the transfer substrate

Interconnect structures and methods of forming same

Hybrid bonding and apparatus for performing the same

Semiconductor structure having stage difference surface and manufacturing method thereof

Bonding structure of semiconductor package, method for fabricating the same, and stack-type semiconductor package

Ball amount process in the manufacturing of integrated circuit

Interconnect structures and methods of forming same

Directly sawing wafers covered with liquid molding compound

Pad defined contact for wafer level package

WAFER-LEVEL PACKAGE MITIGATED UNDERCUT

Vertical gallium nitride Schottky diode

MEMS device and method of formation thereof

Method of forming bump structure

Semiconductor device and method of forming micro-vias partially through insulating material around bump interconnect

Microelectronic unit and package with positional reversal

Wafer level chip scale package and process of manufacture

Etching agent for copper or copper alloy

Semiconductor constructions, semiconductor processing methods, methods of forming contact pads, and methods of forming electrical connections between metal-containing layers

SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING DEVICE

Semiconductor device and method for manufacturing the same

Chip package and method for forming the same

Method for creating a connection between metallic moulded bodies and a power semiconductor which is used to bond to thick wires or strips

Using interrupted Through-Silicon-Vias in integrated circuits adapted for stacking

Semiconductor device and method of forming insulating layer in notches around conductive TSV for stress relief

Methods and structures for reducing stress on die assembly

Solderless die attach to a direct bonded aluminum substrate

Semiconductor module system having encapsulated through wire interconnect (TWI)

Structure and method of forming a pad structure having enhanced reliability

Method of processing a substrate

Semiconductor device and method of manufacturing the same

Electrical Connecting Element and Method for Manufacturing the Same

Semiconductor device including a solder and method of fabricating the same

Semiconductor device and manufacturing method of the same

Double-sided package

Method of processing a substrate

Method of making a die with recessed aluminum die pads

Methods of processing substrates

Soldering device, soldering method, and substrate and electronic component produced by the soldering device or the soldering method

Method of manufacturing semiconductor device capable of enhancing bonding strength between connection terminal and electrode

Packaging methods and packaged semiconductor devices

Semiconductor devices, methods of manufacture thereof, and semiconductor device packages

Flattened substrate surface for substrate bonding

Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods

Chip stack with electrically insulating walls

Through silicon via structure

Chip stack with electrically insulating walls

Semiconductor device having a bonding pad and shield structure and method of manufacturing the same

Bonded system with coated copper conductor

Treatment method of electrodeposited copper for wafer-level-packaging process flow

In situ chamber clean with inert hydrogen helium mixture during wafer process

Method of manufacturing semiconductor device having pad region for wire-bonding

Manufacturing method for semiconductor package, semiconductor package, and semiconductor device

Bumps for chip scale packaging including under bump metal structures with different diameters

Pre-encapsulated etching-then-plating lead frame structure with island and method for manufacturing the same

Integrated circuit module with dual leadframe

Methods and devices for fabricating and assembling printable semiconductor elements

Semiconductor device including passivation layer encapsulant

Microbump and sacrificial pad pattern

Waterfall wire bonding

Post-passivation interconnect structure and method of forming the same

Guard ring design for maintaining signal integrity

Structure for microelectronic packaging with bond elements to encapsulation surface

Apparatuses and methods to enhance passivation and ILD reliability

Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection properties

Semiconductor device and method of simultaneous molding and thermalcompression bonding

Package systems and manufacturing methods thereof

Embedded package and method of manufacturing the same

Routing layer for mitigating stress in a semiconductor die

Flip chip package structure and fabrication process thereof

Low-cost low-profile solder bump process for enabling ultra-thin wafer-level packaging (WLP) packages

Method for packaging low-K chip

Low profile heat spreader and methods

Semiconductor device and method of forming low profile fan-out package with vertical interconnection units

BBUL TOP SIDE SUBSTRATE LAYER ENABLING DUAL SIDED SILICON INTERCONNECT AND STACKING FLEXIBILITY

Apparatus for package reinforcement using molding underfill

Lead frame, method for manufacturing lead frame and semiconductor device using same

Advanced device assembly structures and methods

Printed circuit board and method for manufacturing the same

Power semiconductor devices

Apparatus for mounting semiconductor chips on a circuit board

INTERCONNECT ASSEMBLIES AND METHODS OF MAKING AND USING SAME

Method for producing a structure for microelectronic device assembly

Semiconductor device assembly including a chip carrier, semiconductor wafer and method of manufacturing a semiconductor device

Solder, solder joint structure and method of forming solder joint structure

Interconnection structure of package structure and method of forming the same

Semiconductor device and manufacturing method thereof

Semiconductor apparatus, electronic device, and method of manufacturing semiconductor apparatus

Interconnection structure having a via structure

Semiconductor device having conductive pads and a method of manufacturing the same

Plasma treatment for semiconductor devices

Structure for microelectronic packaging with terminals on dielectric mass

Method of manufacturing semiconductor device

Packaged nano-structured component and method of making a packaged nano-structured component

Enhanced capture pads for through semiconductor vias

Flexible routing for chip on board applications

Semiconductor device and fabrication method

Semiconductor packaging structure and method for forming the same

Semiconductor IC packaging methods and structures

Semiconductor device with conductive vias

Semiconductor packaging structure and method

Hybrid bonding mechanisms for semiconductor wafers

Interconnection structure

Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices

Glass carrier with embedded semiconductor device and metal layers on the top surface

Bond pad structure and method of manufacturing the same

Electrical connection for chip scale packaging

Al bond pad clean method

Active area bonding compatible high current structures

Semiconductor device and method for manufacturing thereof

Wafer carrier having cavity

TSV formation

Semiconductor device and method of making TSV interconnect structures using encapsulant for structural support

Embedding thin chips in polymer

Strong, heat stable junction

Wire bondable surface for microelectronic devices

Metal bump joint structure

SEMICONDUCTOR DEVICES AND PROCESSING METHODS

Routing layer for mitigating stress in a semiconductor die

Nitride semiconductor device

Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

Multi-function and shielded 3D interconnects

Chip arrangements, a chip package and a method for manufacturing a chip arrangement

Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same

Transistor formation using cold welding

Semiconductor device and method for manufacturing the same

IC wafer having electromagnetic shielding effects and method for making the same

Transistor formation using cold welding

Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same

Method for manufacturing electronic device and electronic device

Micro device stabilization post

Semiconductor device with dummy metal protective structure around semiconductor die for localized planarization of insulating layer

Integrated circuit, a chip package and a method for manufacturing an integrated circuit

Post passivation interconnect structures and methods for forming the same

Interconnect assemblies with probed bond pads

Tunable composite interposer

Chip to package interface

Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer

Plating structure for wafer level packages

Bondable top metal contacts for gallium nitride power devices

Identification mechanism for semiconductor device die

Semiconductor device and method of manufacturing the same

Wire bond splash containment

Precise-Aligned Lock-And-Key Bonding Structures

Semiconductor package with improved redistribution layer design and fabricating method thereof

Wafer level package structure

Metal pads with openings in integrated circuits

Bump structures for semiconductor package

Interfacial alloy layer for improving electromigration (EM) resistance in solder joints

METHOD FOR MAKING A DOUBLE-SIDED FANOUT SEMICONDUCTOR PACKAGE WITH EMBEDDED SURFACE MOUNT DEVICES, AND PRODUCT MADE

Semiconductor device and method of forming RDL using UV-cured conductive ink over wafer level package

Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement

Semiconductor device having a copper plug

Semiconductor device with copper wirebond sites and methods of making same

Devices for metallization

Terminal structure, and semiconductor element and module substrate comprising the same

Terminal structure, and semiconductor element and module substrate comprising the same

Terminal structure and semiconductor device

Terminal structure and semiconductor device

Semiconductor package having protective layer with curved surface and method of manufacturing same

Semiconductor device and electronic device

Package for semiconductor device including guide rings and manufacturing method of the same

Microelectronic package having non-coplanar, encapsulated microelectronic devices and a bumpless build-up layer

Contact pads with sidewall spacers and method of making contact pads with sidewall spacers

Conductive lines and pads and method of manufacturing thereof

Semiconductor package having a recess filled with a molding compound

Semiconductor device and method of manufacturing the same

Waterproof structure of pad, waterproof pad, and method for forming waterproof structure

Double solid metal pad with reduced area

Interposer system and method

Semiconductor devices including a non-planar conductive pattern, and methods of forming semiconductor devices including a non-planar conductive pattern

Semiconductor structures comprising a dielectric material having a curvilinear profile

Semiconductor device and method of manufacturing the same

FLAT DAM AND METHOD FOR MANUFACTURING CHIP PACKAGE USING THE SAME

Integrated system and method of making the integrated system

Metal cored solder decal structure and process

Semiconductor devices having stacked solder bumps with intervening metal layers to provide electrical interconnections

Thin integrated circuit chip-on-board assembly and method of making

Method of fabricating a chip package

Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP

Semiconductor device and method of manufacturing the same

Semiconductor device, a mobile communication device, and a method for manufacturing a semiconductor device

Power device and power device module

Semiconductor device and manufacturing method of same

Wafer-level device packaging

GaN power device with solderable back metal

Backside processing of semiconductor devices

Semiconductor package and method of fabricating the same

Pillar on pad interconnect structures, semiconductor dice and die assemblies including such interconnect structures, and related methods

Method of forming post passivation interconnects

Hybrid bonding systems and methods for semiconductor wafers

Submicron connection layer and method for using the same to connect wafers

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

Non-circular under bump metallization (UBM) structure, orientation of non-circular UBM structure and trace orientation to inhibit peeling and/or cracking

Method and apparatus for dispensing flux-free solder on a substrate

3DIC stacking device and method of manufacture

Integrated WLUF and SOD process

SEMICONDUCTOR PACKAGES HAVING INCREASED INPUT/OUTPUT CAPACITY AND RELATED METHODS

Environmentally-assisted technique for transferring devices onto non-conventional substrates

Process For Flip-Chip Connection of an Electronic Component

Integrated circuit package having offset vias

Integrated circuit packages and methods for forming the same

Semiconductor device and method of manufacturing the same, and wiring substrate and method of manufacturing the same

SEMICONDUCTOR CHIP WITH EXPANSIVE UNDERBUMP METALLIZATION STRUCTURES

Hybrid low metal loading flux

Integrated circuit packaging system with through silicon via and method of manufacture thereof

Carrier-free land grid array IC chip package and preparation method thereof

Electronic device packages having bumps and methods of manufacturing the same

Methods of forming integrated circuit packages

METHOD AND APPARATUS FOR PROVIDING IMPROVED BACKSIDE METAL CONTACTS TO SILICON CARBIDE

Die edge contacts for semiconductor devices

Solderless die attach to a direct bonded aluminum substrate

Electronic device and method for production

Methods and apparatus of packaging semiconductor devices

Three dimensional microelectronic components and fabrication methods for same

Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers

Discrete semiconductor device package and manufacturing method

Integrated circuit including wire structure, related method and design structure

Coaxial solder bump support structure