ClassID:

207785

H01L24/05 - page 37 - CPC Classification

Classification description:

Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas ; Manufacturing methods related thereto; Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area

Recent Application in this class:
#10801
20080067663
2008-03-20

Wafer level chip package and a method of fabricating thereof

#10802
20080067072
2008-03-20

Method of forming metal and metal alloy features

#10803
20080064208
2008-03-13

System and method for increasing the strength of a bond made by a small diameter wire in ball bonding

#10804
20080064183
2008-03-13

METHOD OF FORMING A MULTI-LAYER SEMICONDUCTOR STRUCTURE INCORPORATING A PROCESSING HANDLE MEMBER

#10805
20080062623
2008-03-13

Pad over active circuit system and method with frame support structure

#10806
20080061444
2008-03-13

Post passivation interconnection schemes on top of IC chip

#10807
20080061436
2008-03-13

Wafer level chip scale package and method for manufacturing the same

#10808
20080061319
2008-03-13

Systems and methods for supporting a subset of multiple interface types in a semiconductor device

#10809
20080061307
2008-03-13

Method of fabricating light emitting device and thus-fabricated light emitting device

#10810
20080057703
2008-03-06

Post passivation interconnection schemes on top of IC chip

#10811
20080055015
2008-03-06

Compact impedance transformation circuit

#10812
20080054479
2008-03-06

Semiconductor device and method of producing the same

#10813
20080054474
2008-03-06

Semiconductor device and fabricating method thereof

#10814
20080054463
2008-03-06

Semiconductor apparatus and manufacturing method of semiconductor apparatus

#10815
20080054461
2008-03-06

RELIABLE WAFER-LEVEL CHIP-SCALE PACKAGE SOLDER BUMP STRUCTURE IN A PACKAGED SEMICONDUCTOR DEVICE

#10816
20080054460
2008-03-06

Structure of wafer level package with area bump

#10817
20080054459
2008-03-06

Low fabrication cost, fine pitch and high reliability solder bump

#10818
20080054457
2008-03-06

Semiconductor chip and method for fabricating the same

#10819
20080054445
2008-03-06

Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging

#10820
20080054444
2008-03-06

Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods

#10821
20080054441
2008-03-06

Chip package and method for fabricating the same

#10822
20080054427
2008-03-06

SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREFOR

#10823
20080054423
2008-03-06

Apparatus and method for packaging circuits

#10824
20080054422
2008-03-06

Semiconductor device

#10825
20080054290
2008-03-06

Light emitting device and the manufacture method thereof

#10826
20080054052
2008-03-06

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

#10827
20080053964
2008-03-06

Wire bonders and methods of wire-bonding

#10828
20080050912
2008-02-28

Chip structure and process for forming the same

#10829
20080050911
2008-02-28

Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods

#10830
20080050906
2008-02-28

Low fabrication cost, fine pitch and high reliability solder bump

#10831
20080050905
2008-02-28

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

#10832
20080050901
2008-02-28

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

#10833
20080050860
2008-02-28

Adhesion by plasma conditioning of semiconductor chip

#10834
20080048337
2008-02-28

Semiconductor device including through electrode and method of manufacturing the same

#10835
20080048334
2008-02-28

SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME

#10836
20080048330
2008-02-28

Implantable microelectronic device and method of manufacture

#10837
20080048328
2008-02-28

Chip structure and process for forming the same

#10838
20080048325
2008-02-28

Semiconductor device and fabricating method thereof

#10839
20080048322
2008-02-28

SEMICONDUCTOR PACKAGE INCLUDING REDISTRIBUTION PATTERN AND METHOD OF MANUFACTURING THE SAME

#10840
20080048321
2008-02-28

FLIP CHIP SEMICONDUCTOR ASSEMBLY WITH VARIABLE VOLUME SOLDER BUMPS

#10841
20080048320
2008-02-28

Low fabrication cost, fine pitch and high reliability solder bump

#10842
20080048319
2008-02-28

Semiconductor device having pads

#10843
20080048312
2008-02-28

Semiconductor package and method for manufacturing the same

#10844
20080048177
2008-02-28

Process of forming an electronic device including a barrier layer

#10845
20080045035
2008-02-21

Etching solution for etching metal layer, etching method using the etching solution, and method of fabricating semiconductor product using the etching solution

#10846
20080045008
2008-02-21

Post passivation interconnection schemes on top of IC chip

#10847
20080045007
2008-02-21

Top layers of metal for integrated circuits

#10848
20080045004
2008-02-21

Post passivation interconnection schemes on top of IC chips

#10849
20080045003
2008-02-21

Method of wire bonding over active area of a semiconductor circuit

#10850
20080045002
2008-02-21

Post passivation interconnection schemes on top of IC chips

#10851
20080045001
2008-02-21

Post passivation interconnection schemes on top of IC chip

#10852
20080044997
2008-02-21

Semiconductor device and method for manufacturing same

#10853
20080044977
2008-02-21

High performance system-on-chip using post passivation process

#10854
20080044976
2008-02-21

High performance system-on-chip using post passivation process

#10855
20080042298
2008-02-21

SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME

#10856
20080042297
2008-02-21

Post passivation interconnection schemes on top of the IC chips

#10857
20080042296
2008-02-21

Post passivation interconnection schemes on top of the IC chips

#10858
20080042295
2008-02-21

Post passivation interconnection schemes on top of IC chip

#10859
20080042294
2008-02-21

Post passivation interconnection schemes on top of IC chip

#10860
20080042293
2008-02-21

Post passivation interconnection schemes on top of IC chip

#10861
20080042292
2008-02-21

Bond pad for wafer and package for CMOS imager

#10862
20080042289
2008-02-21

High performance system-on-chip using post passivation process

#10863
20080042285
2008-02-21

Post passivation interconnection schemes on top of IC chip

#10864
20080042280
2008-02-21

Semiconductor chip structure

#10865
20080042273
2008-02-21

High performance system-on-chip using post passivation process

#10866
20080042269
2008-02-21

BUMP STRUCTURES AND PACKAGED STRUCTURES THEREOF

#10867
20080042259
2008-02-21

Semiconductor device, method of manufacturing the same, circuit board, and electronic instrument

#10868
20080042239
2008-02-21

High performance system-on-chip using post passivation process

#10869
20080042238
2008-02-21

High performance system-on-chip using post passivation process

#10870
20080041727
2008-02-21

Method and system for depositing alloy composition

#10871
20080038914
2008-02-14

Semiconductor element and manufacturing method thereof

#10872
20080038913
2008-02-14

METHODS OF FORMING ALUMINUM-FREE WIRE BOND PAD AND PAD SO FORMED

#10873
20080038869
2008-02-14

High performance system-on-chip using post passivation process

#10874
20080038868
2008-02-14

Process for packaging components, and packaged components

#10875
20080037234
2008-02-14

CIRCUIT BOARD AND CIRCUIT STRUCTURE

#10876
20080036445
2008-02-14

Method for setting a reference potential of a current sensor and arrangement for determining the reference potential of a power semiconductor device

#10877
20080036100
2008-02-14

Solder elements with columnar structures and methods of making the same

#10878
20080036091
2008-02-14

Semiconductor integrated circuit device

#10879
20080036086
2008-02-14

Semiconductor device and method for manufacturing the same

#10880
20080036081
2008-02-14

Interconnection structure of integrated circuit chip

#10881
20080035974
2008-02-14

High performance system-on-chip using post passivation process

#10882
20080035972
2008-02-14

High performance system-on-chip using post passivation process

#10883
20080035959
2008-02-14

Chip scale package for power devices and method for making the same

#10884
20080032496
2008-02-07

Post passivation interconnection schemes on top of the IC chips

#10885
20080032494
2008-02-07

Interconnect structures with bond-pads and methods of forming bump sites on bond-pads

#10886
20080032458
2008-02-07

Semiconductor device and method of manufacturing same

#10887
20080032452
2008-02-07

Chip scale package and method for manufacturing the same

#10888
20080029888
2008-02-07

Solder Interconnect Joints For A Semiconductor Package

#10889
20080029887
2008-02-07

Electronic device including a conductive stud over a bonding pad region

#10890
20080029879
2008-02-07

Structure and method of making lidded chips

#10891
20080029851
2008-02-07

Methods of forming conductive vias and methods of forming multichip modules including such conductive vias

#10892
20080029850
2008-02-07

Electrical through contact

#10893
20080029847
2008-02-07

Integrated circuit package system with filled wafer recess

#10894
20080029785
2008-02-07

Post passivation interconnection schemes on top of the IC chips

#10895
20080026560
2008-01-31

Methods of forming electronic structures including conductive shunt layers and related structures

#10896
20080026559
2008-01-31

Solder Ball Pad Structure

#10897
20080026318
2008-01-31

Composite photoresist for modifying die-side bumps

#10898
20080023851
2008-01-31

Microelectronic device connection structure

#10899
20080023846
2008-01-31

Method of forming hole in semiconductor device using mask

#10900
20080023836
2008-01-31

Semiconductor device with interface peeling preventing rewiring layer

#10901
20080023833
2008-01-31

Solder bumps in flip-chip technologies

#10902
20080023830
2008-01-31

Contact structure having a compliant bump and a testing area

#10903
20080023827
2008-01-31

Solder connector structure and method

#10904
20080023525
2008-01-31

Bonding apparatus

#10905
20080020559
2008-01-24

Pad structure design with reduced density

#10906
20080020511
2008-01-24

Structure of image sensor module and a method for manufacturing of wafer level package

#10907
20080017993
2008-01-24

Semiconductor device and method of manufacturing the same

#10908
20080017991
2008-01-24

SEMICONDUCTOR CHIP

#10909
20080017990
2008-01-24

Semiconductor integrated circuit device

#10910
20080017987
2008-01-24

Semiconductor device with reduced contact resistance

#10911
20080017984
2008-01-24

BLM structure for application to copper pad

#10912
20080017982
2008-01-24

Semiconductor chip and method for manufacturing same, electrode structure of semiconductor chip and method for forming same, and semiconductor device

#10913
20080017981
2008-01-24

Compliant Bumps for Integrated Circuits Using Carbon Nanotubes

#10914
20080017980
2008-01-24

Chip having two groups of chip contacts

#10915
20080017956
2008-01-24

Interconnect structure for semiconductor package

#10916
20080017947
2008-01-24

CIRCUIT HAVING A SCHOTTKY CONTACT COMPONENT

#10917
20080017941
2008-01-24

Structure of image sensor module and a method for manufacturing of wafer level package

#10918
20080017907
2008-01-24

Semiconductor module with a power semiconductor chip and a passive component and method for producing the same

#10919
20080017879
2008-01-24

Methods and apparatus for packaging integrated circuit devices

#10920
20080017873
2008-01-24

Device, method of manufacturing device, board, method of manufacturing board, mounting structure, mounting method, LED display, LED backlight and electronic device

#10921
20080017869
2008-01-24

Light emitting diode chip with large heat dispensing and illuminating area

#10922
20080014735
2008-01-17

Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same

#10923
20080014732
2008-01-17

Application of PVD W/WN bilayer barrier to aluminum bondpad in wire bonding

#10924
20080014436
2008-01-17

CIRCULAR WIRE-BOND PAD, PACKAGE MADE THEREWITH, AND METHOD OF ASSEMBLING SAME

#10925
20080013230
2008-01-17

ESD protection circuit for semiconductor device

#10926
20080012150
2008-01-17

Chip structure

#10927
20080012149
2008-01-17

Semiconductor chip structure

#10928
20080012144
2008-01-17

Method for producing chip packages, and chip package produced in this way

#10929
20080012132
2008-01-17

Chip structure with redistribution traces

#10930
20080012131
2008-01-17

Semiconductor device, mounting construction of a semiconductor device, and method of manufacturing the semiconductor device with the mounting construction

#10931
20080012130
2008-01-17

Semiconductor device, circuit substrate, electro-optic device and electronic appliance

#10932
20080012129
2008-01-17

Semiconductor device and method of producing the same

#10933
20080012128
2008-01-17

Semiconductor device having an electrode pad, a bump provided above the electrode pad and a bump foundation layer therebetween

#10934
20080012119
2008-01-17

Semiconductor component and method for producing the same

#10935
20080012046
2008-01-17

Semiconductor with reduced pad pitch

#10936
20080012042
2008-01-17

Semiconductor device and method of producing the same, and power conversion apparatus incorporating this semiconductor device

#10937
20080009294
2008-01-10

Apparatus and method for reducing volume of resource allocation information message in a broadband wireless communication system

#10938
20080009131
2008-01-10

Post passivation interconnection schemes on top of the IC chips

#10939
20080009083
2008-01-10

Semiconductor device with electrode pad having probe mark

#10940
20080007934
2008-01-10

Electronic device with EMI screen and packing process thereof

#10941
20080006951
2008-01-10

Copper bonding compatible bond pad structure and method

#10942
20080006950
2008-01-10

BONDING PAD STRUCTURE FOR ELECTRONIC DEVICE

#10943
20080006946
2008-01-10

Post passivation interconnection schemes on top of the IC chips

#10944
20080006945
2008-01-10

Integrated circuit and method for fabricating the same

#10945
20080006938
2008-01-10

Method for bonding wafers to produce stacked integrated circuits

#10946
20080006931
2008-01-10

Semiconductor constructions and assemblies, and electronic systems

#10947
20080006921
2008-01-10

Integrated circuit packaging system with ultra-thin die

#10948
20080006919
2008-01-10

Flip chip package and method of fabricating the same

#10949
20080006910
2008-01-10

Semiconductor device and method for manufacturing semiconductor device

#10950
20080006905
2008-01-10

Method for production of an integrated circuit bar arrangement, in particular comprising a capacitor assembly, as well as an integrated circuit arrangement

#10951
20080003820
2008-01-03

Bonding pad structure and method for making the same

#10952
20080003807
2008-01-03

Post passivation interconnection schemes on top of the IC chips

#10953
20080003806
2008-01-03

Post passivation interconnection schemes on top of IC chip

#10954
20080003805
2008-01-03

Method of providing mixed size solder bumps on a substrate using a solder delivery head

#10955
20080003804
2008-01-03

Method of providing solder bumps of mixed sizes on a substrate using solder transfer in two stages

#10956
20080003803
2008-01-03

Semiconductor package substrate for flip chip packaging

#10957
20080003802
2008-01-03

Method of providing solder bumps of mixed sizes on a substrate using a sorting mask and bumped substrate formed according to the method

#10958
20080003777
2008-01-03

Nickel tin bonding system for semiconductor wafers and devices

#10959
20080003761
2008-01-03

Method for fabricating a wafer level package with device wafer and passive component integration

#10960
20080003721
2008-01-03

Vibration-Assisted Method for Underfilling Flip-Chip Electronic Devices

#10961
20080003715
2008-01-03

Tapered die-side bumps

#10962
20080002460
2008-01-03

Structure and method of making lidded chips

#10963
20080001673
2008-01-03

Semiconductor device

#10964
20080001302
2008-01-03

Post passivation interconnection schemes on top of IC chip

#10965
20080001301
2008-01-03

Post passivation interconnection schemes on top of IC chip

#10966
20080001300
2008-01-03

Post passivation interconnection schemes on top of IC chip

#10967
20080001296
2008-01-03

Multiple-dies semiconductor device with redistributed layer pads

#10968
20080001294
2008-01-03

Post passivation interconnection schemes on top of IC chip

#10969
20080001293
2008-01-03

Post passivation interconnection schemes on top of IC chip

#10970
20080001291
2008-01-03

Semiconductor device having a contact hole extending from an upper surface of an insulating film and reaching one of a plurality of impurity regions constituting a transistor and method of manufacturing the same

#10971
20080001290
2008-01-03

Integrated circuit (IC) chip and method for fabricating the same

#10972
20080001289
2008-01-03

STACKED-TYPE WAFER LEVEL PACKAGE, METHOD OF MANUFACTURING THE SAME, WAFER-LEVEL STACK PACKAGE AND METHOD OF MANUFACTURING THE SAME

#10973
20080001288
2008-01-03

Semiconductor Device and Manufacturing Method Thereof, Semiconductor Package, and Electronic Apparatus

#10974
20080001244
2008-01-03

System Comprising an Electrical Component and an Electrical Connecting Lead for Said Component, and Method for the Production of Said System

#10975
20080001241
2008-01-03

Structure and method of making lidded chips

#10976
20070298620
2007-12-27

SURFACE TREATMENT, SORTING AND ASSEMBLING METHODS OF MICROELECTRONIC DEVICES AND STORAGE STRUCTURE THEREOF

#10977
20070298609
2007-12-27

Capping of metal interconnects in integrated circuit electronic devices

#10978
20070298603
2007-12-27

Die configurations and methods of manufacture

#10979
20070298602
2007-12-27

Method for applying solder to redistribution lines

#10980
20070296090
2007-12-27

Die package and probe card structures and fabrication methods

#10981
20070296088
2007-12-27

Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

#10982
20070296082
2007-12-27

Semiconductor device having conductive adhesive layer and method of fabricating the same

#10983
20070296081
2007-12-27

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

#10984
20070296080
2007-12-27

Semiconductor devices and method of manufacturing them

#10985
20070296055
2007-12-27

RF INTEGRATED CIRCUIT WITH ESD PROTECTION AND ESD PROTECTION APPARATUS THEREOF

#10986
20070296040
2007-12-27

Semiconductor device, and life prediction circuit and life prediction method for semiconductor device

#10987
20070295786
2007-12-27

Semiconductor device, manufacturing method and apparatus for the same

#10988
20070290367
2007-12-20

Mold for forming conductive bump, method of fabricating the mold, and method of forming bump on wafer using the mold

#10989
20070290362
2007-12-20

INTEGRATED INDUCTORS AND COMPLIANT INTERCONNECTS FOR SEMICONDUCTOR PACKAGING

#10990
20070290361
2007-12-20

Via layout with via groups placed in interlocked arrangement

#10991
20070290343
2007-12-20

Electronic component, semiconductor device employing same, and method for manufacturing electronic component

#10992
20070290339
2007-12-20

Bulk metallic glass solders, foamed bulk metallic glass solders, foamed-solder bond pads in chip packages, methods of assembling same, and systems containing same

#10993
20070287283
2007-12-13

Semiconductor device capable of suppressing current concentration in pad and its manufacture method

#10994
20070287279
2007-12-13

METHODS OF FORMING SOLDER CONNECTIONS AND STRUCTURE THEREOF

#10995
20070287278
2007-12-13

Methods of forming solder connections and structure thereof

#10996
20070287225
2007-12-13

Method of manufacturing an integrated circuit

#10997
20070284758
2007-12-13

Electronics package and associated method

#10998
20070284755
2007-12-13

Semiconductor device, manufacturing method of the semiconductor device, and mounting method of the semiconductor device

#10999
20070284738
2007-12-13

Wiring board and method for manufacturing the same, and semiconductor device

#11000
20070284726
2007-12-13

Integrated circuit package system with post-passivation interconnection and integration

#11001
20070284721
2007-12-13

Semiconductor device and method for producing the semiconductor device

#11002
20070284702
2007-12-13

Semiconductor device having a bonding pad and fuse and method for forming the same

#11003
20070284684
2007-12-13

SEMICONDUCTOR DEVICE, MAGNETIC SENSOR, AND MAGNETIC SENSOR UNIT

#11004
20070284606
2007-12-13

High-efficiency, overvoltage-protected, light-emitting semiconductor device

#11005
20070284420
2007-12-13

INTEGRATED CIRCUIT CHIP FORMED ON SUBSTRATE

#11006
20070284409
2007-12-13

HIGHLY COMPLIANT PLATE FOR WAFER BONDING

#11007
20070281465
2007-12-06

Semiconductor device and method for fabricating the same

#11008
20070281391
2007-12-06

Attachment method, attachment apparatus, manufacturing method of semiconductor device, and manufacturing apparatus of semiconductor device

#11009
20070281374
2007-12-06

Chip stack package and manufacturing method thereof

#11010
20070278729
2007-12-06

METHOD FOR FORMING INTERCONNECTS ON THIN WAFERS

#11011
20070278678
2007-12-06

Semiconductor device and method for fabricating the same

#11012
20070278675
2007-12-06

System and method to reduce metal series resistance of bumped chip

#11013
20070278659
2007-12-06

Semiconductor package substrate and semiconductor package having the same

#11014
20070278657
2007-12-06

Chip stack, method of fabrication thereof, and semiconductor package having the same

#11015
20070278656
2007-12-06

Modular bonding pad structure and method

#11016
20070275550
2007-11-29

Barrier layer for fine-pitch mask-based substrate bumping

#11017
20070275549
2007-11-29

Contact surrounded by passivation and polymide and method therefor

#11018
20070275503
2007-11-29

Non-cyanide gold electroplating for fine-line gold traces and gold pads

#11019
20070273031
2007-11-29

Method of wire bonding over active area of a semiconductor circuit

#11020
20070273020
2007-11-29

Semiconductor device

#11021
20070269973
2007-11-22

Method of providing solder bumps using reflow in a forming gas atmosphere

#11022
20070269930
2007-11-22

Methodology to control underfill fillet size, flow-out and bleed in flip chips (FC), chip scale packages (CSP) and ball grid arrays (BGA)

#11023
20070269926
2007-11-22

Method and apparatus for forming an electrical connection to a semiconductor substrate

#11024
20070268674
2007-11-22

Electronic module with a semiconductor chip and a component housing and methods for producing the same

#11025
20070267757
2007-11-22

Semiconductor device

#11026
20070267752
2007-11-22

Semiconductor device having pad structure for preventing and buffering stress of silicon nitride film

#11027
20070267749
2007-11-22

Metallization layer for a power semiconductor device

#11028
20070267748
2007-11-22

INTEGRATED CIRCUIT HAVING PADS AND INPUT/OUTPUT (I/O) CELLS

#11029
20070267745
2007-11-22

Semiconductor device including electrically conductive bump and method of manufacturing the same

#11030
20070267744
2007-11-22

Manufacturing a bump electrode with roughened face

#11031
20070267743
2007-11-22

Semiconductor device having low dielectric insulating film and manufacturing method of the same

#11032
20070267730
2007-11-22

Wafer level semiconductor chip packages and methods of making the same

#11033
20070267725
2007-11-22

Semiconductor chip, method of manufacturing the semiconductor chip and semiconductor chip package

#11034
20070267724
2007-11-22

Integrated circuit having stress tuning layer

#11035
20070264757
2007-11-15

Micro-package, multi-stack micro-package, and manufacturing method therefor

#11036
20070264754
2007-11-15

Method of fabricating a semiconductor device incorporating a semiconductor constructing body and an interconnecting layer which is connected to a ground layer via a vertical conducting portion

#11037
20070264751
2007-11-15

Super high density module with integrated wafer level packages

#11038
20070262469
2007-11-15

Method for fabricating semiconductor package with multi-layer die contact and external contact

#11039
20070262468
2007-11-15

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

#11040
20070262466
2007-11-15

Semiconductor device

#11041
20070262448
2007-11-15

Semiconductor Device, Power Supply Apparatus Using Same, and Electronic Device

#11042
20070262424
2007-11-15

Devices and systems having at least one dam structure

#11043
20070262407
2007-11-15

Optically blocked reference pixels for focal plane arrays

#11044
20070262338
2007-11-15

Semiconductor light-emitting element, manufacturing method and mounting method of the same and light-emitting device

#11045
20070259517
2007-11-08

Low temperature methods of forming back side redistribution layers in association with through wafer interconnects

#11046
20070257374
2007-11-08

Semiconductor chip capable of being laminated and a semiconductor device including the lamination of a plurality of semiconductor chips

#11047
20070257363
2007-11-08

Semiconductor device including a buffer layer structure for reducing stress

#11048
20070257362
2007-11-08

Process for forming bumps and solder bump

#11049
20070257352
2007-11-08

Test pads on flash memory cards

#11050
20070257350
2007-11-08

Wafer level stack structure for system-in-package and method thereof

#11051
20070257347
2007-11-08

CHIP STRUCTURE AND FABRICATING PROCESS THEREOF

#11052
20070254475
2007-11-01

Manufacturing method of semiconductor device with a barrier layer and a metal layer

#11053
20070254405
2007-11-01

3D interconnect with protruding contacts

#11054
20070252281
2007-11-01

Wirebond pad for semiconductor chip or wafer

#11055
20070252275
2007-11-01

CHIP PACKAGING STRUCTURE

#11056
20070252274
2007-11-01

Method for forming C4 connections on integrated circuit chips and the resulting devices

#11057
20070252273
2007-11-01

Semiconductor device having a smaller electrostatic capacitance electrode

#11058
20070252257
2007-11-01

SEMICONDUCTOR PACKAGE STRUCTURES HAVING HEAT DISSIPATIVE ELEMENT DIRECTLY CONNECTED TO INTERNAL CIRCUIT AND METHODS OF FABRICATING THE SAME

#11059
20070252242
2007-11-01

Semiconductor device

#11060
20070249158
2007-10-25

Semiconductor device with via hole of uneven width

#11061
20070249153
2007-10-25

Chip structure with half-tunneling electrical contact to have one electrical contact formed on inactive side thereof and method for producing the same

#11062
20070249152
2007-10-25

Method of manufacturing semiconductor apparatus

#11063
20070249068
2007-10-25

Semiconductor device system and method for modifying a semiconductor device

#11064
20070246837
2007-10-25

IC chip package with minimized packaged-volume

#11065
20070246828
2007-10-25

Semiconductor device and method of manufacturing the same

#11066
20070246826
2007-10-25

Wafer level semiconductor module and method for manufacturing the same

#11067
20070246819
2007-10-25

Semiconductor components having encapsulated through wire interconnects (TWI)

#11068
20070246735
2007-10-25

Semiconductor light emitting element

#11069
20070246133
2007-10-25

Method for Electroplating and Contact Projection Arrangement

#11070
20070243706
2007-10-18

Method of manufacturing a through electrode

#11071
20070242535
2007-10-18

Semiconductor memory device and defect remedying method thereof

#11072
20070241464
2007-10-18

Solder joint flip chip interconnection having relief structure

#11073
20070241457
2007-10-18

Semiconductor apparatus and method of producing the same

#11074
20070241446
2007-10-18

Direct-write wafer level chip scale package

#11075
20070241342
2007-10-18

Semiconductor light emitting device with first and second leads

#11076
20070241273
2007-10-18

Camera module

#11077
20070238283
2007-10-11

NOVEL UNDER-BUMP METALLIZATION FOR BOND PAD SOLDERING

#11078
20070238222
2007-10-11

Apparatuses and methods to enhance passivation and ILD reliability

#11079
20070237890
2007-10-11

Bilayer Laminated Film for Bump Formation and Method of Bump Formation

#11080
20070236320
2007-10-11

Method for fabricating a transformer integrated with a semiconductor structure

#11081
20070235878
2007-10-11

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH POST-PASSIVATION INTERCONNECTION AND INTEGRATION

#11082
20070235825
2007-10-11

Physical quantity sensor, method for manufacturing the same, and resin film for bonding semiconductor chip and circuit chip

#11083
20070235790
2007-10-11

Capacitor structure of semiconductor device and method of fabricating the same

#11084
20070234554
2007-10-11

Method for fabricating a transformer integrated with a semiconductor structure

#11085
20070232056
2007-10-04

Semiconductor device and method for manufacturing the same

#11086
20070232053
2007-10-04

Method for fabricating thermal compliant semiconductor chip wiring structure for chip scale packaging

#11087
20070232052
2007-10-04

Method for forming passivation layer

#11088
20070232049
2007-10-04

Method and structure for eliminating aluminum terminal pad material in semiconductor devices

#11089
20070232023
2007-10-04

Room temperature metal direct bonding

#11090
20070231982
2007-10-04

Thin film transistor substrate and manufacturing method thereof

#11091
20070231961
2007-10-04

Semiconductor device manufacturing method

#11092
20070231957
2007-10-04

Method of manufacturing semiconductor device

#11093
20070231936
2007-10-04

Fabrication method of semiconductor integrated circuit device

#11094
20070230153
2007-10-04

Flip chip bonding structure

#11095
20070229751
2007-10-04

Systems for providing conducting pad and fabrication method thereof

#11096
20070228926
2007-10-04

Carbon nanotube via interconnect

#11097
20070228576
2007-10-04

Isolating chip-to-chip contact

#11098
20070228574
2007-10-04

Semiconductor device with guard rings that are formed in each of the plural wiring layers

#11099
20070228567
2007-10-04

Semiconductor chip comprising a metal coating structure and associated production method

#11100
20070228563
2007-10-04

High-performance semiconductor package