Semiconductor components with conductive interconnects

INTERCONNECTIONS FOR FLIP-CHIP USING LEAD-FREE SOLDERS AND HAVING REACTION BARRIER LAYERS

Bonding pad structure, electronic device having a bonding pad structure and methods of fabricating the same

Semiconductor package having stacked semiconductor chips

Semiconductor device and method for manufacturing the same

Integrated circuit including conductive bumps

Conductive structure for a semiconductor integrated circuit and method for forming the same

Packaging conductive structure and method for manufacturing the same

Packaging conductive structure for a semiconductor substrate having a metallic layer

Conductive structure for a semiconductor integrated circuit and method for forming the same

Method of manufacturing semiconductor devices encapsulated in chip size packages

MOS transistor device in common source configuration

SEMICONDUCTOR DEVICE FOR WHICH ELECTRICAL TEST IS PERFORMED WHILE PROBE IS IN CONTACT WITH CONDUCTIVE PAD

Semiconductor sensor and manufacturing method therefor

Undercut-free BLM process for Pb-free and Pb-reduced C4

Method of low temperature wafer bonding through Au/Ag diffusion

Method For Establishing an Electrical and Mechanical Connection Between Chip Contact Surfaces and Antenna Contact Surfaces and Transponder

Bumping process and bump structure

ARCHITECTURE FOR FACE-TO-FACE BONDING BETWEEN SUBSTRATE AND MULTIPLE DAUGHTER CHIPS

Panel, semiconductor device and method for the production thereof

Semiconductor device comprising electromigration prevention film and manufacturing method thereof

Semiconductor device with magnetic powder mixed therein and manufacturing method thereof

Bump structure and manufacturing method thereof

Integrated circuit package system with bump over via

Integrated circuit package having large conductive area and method for fabricating the same

Semiconductor device, method for manufacturing the same, liquid crystal television, and EL television

Method and device for wafer scale packaging of optical devices using a scribe and break process

Low fabrication cost, fine pitch and high reliability solder bump

Semiconductor device and method for manufacturing the same

Monolithic Controller for the Generator Unit of a Motor Vehicle

Thin-film capacitor

Semiconductor and Method For Producing the Same

LSI package provided with interface module, and transmission line header employed in the package

Aluminum-based interconnection in bond pad layer

Nanostructure-Based Package Interconnect

Bump structure having a reinforcement member

CHIP PACKAGE AND PROCESS THEREOF

Sensor semiconductor package and fabrication

Imaging device equipped with a last copper and aluminum based interconnection level

Fabrication method of a semiconductor device

Method for precision assembly of integrated circuit chip packages

BOND PAD FOR SEMICONDUCTOR DEVICE

Driving circuit for a liquid crystal display device, method of manufacturing the same and display device having the same

Localized alloying for improved bond reliability

Chip having side pad, method of fabricating the same and package using the same

Electronic device having metal pad structure and method of fabricating the same

Semiconductor structure and method for forming the same

Method for fabricating a semiconductor package including stress relieving layer for flip chip packaging

Semiconductor device having a high frequency electrode positioned with a via hole

STACK PACKAGE AND METHOD OF MANUFACTURING THE SAME

Semiconductor integrated circuit device including wiring lines and interconnections

Semiconductor device

SEMICONDUCTOR DEVICE, MAGNETIC SENSOR, AND MAGNETIC SENSOR UNIT

CMOS image sensors with a bonding pad and methods of forming the same

Electrically conductive interconnect system and method

Bonding pad of semiconductor integrated circuit, method for manufacturing the bonding pad, semiconductor integrated circuit, and electronic device

Semiconductor device having conductive bumps and deviated solder pad

Semiconductor device and manufacturing method thereof

Redistribution circuit structure

Under bump metallurgy structure of a package and method of making same

Emitter ballasting by contact area segmentation in ESD bipolar based semiconductor component

Package structure for optoelectronic device and fabrication method thereof

Bonding pad structure for back illuminated optoelectronic device and fabricating method thereof

Semiconductor device and manufacturing method thereof, liquid crystal television system, and EL television system

Power MOSFET wafer level chip-scale package

INJECTION MOLDED SOLDER BALL METHOD

Method and apparatus for providing thermal management on high-power integrated circuit devices

Semiconductor package, manufacturing method thereof and IC chip

Method for reduction of soft error rates in integrated circuits

Method for manufacturing a three-dimensional semiconductor device and a wafer used therein

INTEGRATED CIRCUITS WITH CONDUCTIVE FEATURES IN THROUGH HOLES PASSING THROUGH OTHER CONDUCTIVE FEATURES AND THROUGH A SEMICONDUCTOR SUBSTRATE

Isolation structures for CMOS image sensor chip scale packages

Electronic assembly for image sensor device and fabrication method thereof

Apparatus and method for depositing and reflowing solder paste on a microelectronic workpiece

APPARATUS FOR INTEGRATED INPUT/OUTPUT CIRCUIT AND VERIFICATION METHOD THEREOF

METHOD FOR CHIP TO PACKAGE INTERCONNECT

MICROELECTRONIC DIE INCLUDING SOLDER CAPS ON BUMPING SITES THEREOF AND METHOD OF MAKING SAME

SEMICONDUCTOR DEVICE HAVING FUSE CIRCUIT ON CELL REGION AND METHOD OF FABRICATING THE SAME

Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers

Semiconductor packages, stacked semiconductor packages, and methods of manufacturing the semiconductor packages and the stacked semiconductor packages

METHODS OF FORMING STEPPED BUMPS AND STRUCTURES FORMED THEREBY

DIRECT TERMINATION OF A WIRING METAL IN A SEMICONDUCTOR DEVICE

Metal Line of Semiconductor Device and Manufacturing Method Thereof

Method to reduce UBM undercut

Conductive systems and devices including wires coupled to anisotropic conductive film, and methods of forming the same

STACK PACKAGE HAVING REDUCED ELECTRICAL CONNECTION LENGTH SUITABLE FOR HIGH SPEED OPERATIONS AND METHOD OF MANUFACTURING THE SAME

Methods of forming stepped bumps and structures formed thereby

Structure of super thin chip scale package and method of the same

INTEGRATED ELECTRONIC CIRCUIT CHIP COMPRISING AN INDUCTOR

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME

Semiconductor chip and method of manufacturing semiconductor chip

Semiconductor device and method of forming passive devices

Display driving chip

Voltage regulator integrated with semiconductor chip

Electrical fuse circuit

SEMICONDUCTOR DEVICE

Semiconductor device and method of protecting passivation layer in a solder bump process

Semiconductor device and manufacturing method of the same

Stacked-die packages with silicon vias and surface activated bonding

METHOD FOR FABRICATING A CIRCUIT

High surface area aluminum bond pad for through-wafer connections to an electronic package

Semiconductor device pad having the same voltage level as that of a semiconductor substrate

Semiconductor device

Heat dissipating chip structure and fabrication method thereof and package having the same

Microelectronic assemblies having compliancy and methods therefor

SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SAME

Semiconductor device having through vias

Process for making contact with and housing integrated circuits

Image sensor and method for manufacturing the same

Semiconductor device

Nitride semiconductor device

Chip structure and process for forming the same

Method for fabricating a circuit component

Method of manufacturing wafer level chip size package

Semiconductor package, manufacturing method thereof and IC chip

Semiconductor apparatus and manufacturing method of semiconductor apparatus

Three-dimensional integrated circuits with protection layers

Semiconductor integrated circuit

DEVICE HAVING CONTACT PAD WITH A CONDUCTIVE LAYER AND A CONDUCTIVE PASSIVATION LAYER

Semiconductor processing methods, methods of forming contact pads, and methods of forming electrical connections between metal-containing layers

Chip structure and process for forming the same

Chip structure and process for forming the same

Dummy patterns and method of manufacture for mechanical strength of low K dielectric materials in copper interconnect structures for semiconductor devices

STRUCTURE FOR CONTROLLED COLLAPSE CHIP CONNECTION WITH A CAPTURED PAD GEOMETRY

Semiconductor device

Tubular-shaped bumps for integrated circuit devices and methods of fabrication

Chip package and method of manufacturing the same

SEMICONDUCTOR PACKAGE WITH REDISTRIBUTION LAYER OF SEMICONDUCTOR CHIP DIRECTLY CONTACTED WITH SUBSTRATE AND METHOD OF FABRICATING THE SAME

Semiconductor device encapsulated by an electrically conductive plastic housing composition with conductive particles

Semiconductor device having active element formation region provided under a bump pad

Semiconductor device

Semiconductor device and method for manufacturing the same

Semiconductor device

Post passivation interconnection schemes on top of the IC chips

Semiconductor chip and production process therefor

Method of sputtering a nickel silicon alloy, especially useful for forming a solder bump barrier

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

INTEGRATED CIRCUITS WITH CONDUCTIVE FEATURES IN THROUGH HOLES PASSING THROUGH OTHER CONDUCTIVE FEATURES AND THROUGH A SEMICONDUCTOR SUBSTRATE

Chip structure and process for forming the same

Semiconductor device

Method for manufacturing semiconductor device and semiconductor device

Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications

Function element and function element mounting structure

Wire bond interconnection

Semiconductor device, layout design method thereof, and layout design device using the same

Semiconductor wafer

Test structure

Modular sensor assembly and methods of fabricating the same

Method for Preparing an Intergrated Circuits Device Having a Reinforcement Structure

Semiconductor device and manufacturing method of the same

Optimum padset for wire bonding RF technologies with high-Q inductors

Method for forming post passivation Au layer with clean surface

Semiconductor device and method of manufacturing the same

Post passivation interconnection process and structures

Semiconductor device and manufacturing method thereof

Wafer level chip scale package, method of manufacturing the same, and semiconductor chip module including the wafer level chip scale package

Semiconductor device and method of manufacturing semiconductor device

Semiconductor chip and TAB package having the same

Semiconductor device having elastic solder bump to prevent disconnection

Stress decoupling structures for flip-chip assembly

Semiconductor chip and method of producing the same

Semiconductor device and manufacturing method thereof

SEMICONDUCTOR INTEGRATED CIRCUIT AND FABRICATION METHOD FOR THE SAME

Semiconductor integrated circuit providing for wire bonding directly above an active circuit region, and manufacturing method thereof

Fluxless reflow process for bump formation

Chip structure and process for forming the same

Method of disposing and arranging dummy patterns

Resin for sealing semiconductor device, resin-sealed semiconductor device and the method of manufacturing the semiconductor device

Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps

Mounting method of semiconductor element using outside connection projection electyrode and manufacturing method of semiconductor device using outside connection projection electrode

Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumps

Bonding structures and methods of forming bonding structures

STRUCTURE FOR PREVENTING PAD PEELING AND METHOD OF FABRICATING THE SAME

Bond pad design to minimize dielectric cracking

Chip structure and process for forming the same

Semiconductor device including a power device with first metal layer and second metal layer laterally spaced apart

Electronic packaging materials for use with low-k dielectric-containing semiconductor devices

Semiconductor device with no base member and method of manufacturing the same

Solder bump structure and method of manufacturing same

Semiconductor device and a method of manufacturing the same

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE CONTAINING THE SAME

Method of fabricating electronic device having sacrificial anode, and electronic device fabricated by the same

Chip and manufacturing method and application thereof

SEMICONDUCTOR DEVICE INCLUDING CORROSION RESISTANT WIRING STRUCTURE

Top layers of metal for integrated circuits

Flip-chip packaging structure for light emitting diode and method thereof

SEMICONDUCTOR DEVICE

METHOD FOR IMPROVED COPPER LAYER ETCHING OF WAFERS WITH C4 CONNECTION STRUCTURES

Method for manufacturing semiconductor device with reduced damage to metal wiring layer

Use of palladium in IC manufacturing with conductive polymer bump

Wire and solder bond forming methods

Wire and solder bond forming methods

Semiconductor device and method for manufacturing same

MULTI-CHIP STRUCTURE

Self-aligned through vias for chip stacking

Post passivation interconnection schemes on top of the IC chips

Packaged semiconductor chips

System and method for solder bump plating

Solder joint reliability in microelectronic packaging

Method of chip manufacturing

Structure and method for enhancing resistance to fracture of bonding pads

COPPER-METALLIZED INTEGRATED CIRCUITS HAVING AN OVERCOAT FOR PROTECTING BONDABLE METAL CONTACTS AND IMPROVING MOLD COMPOUND ADHESION

High performance system-on-chip using post passivation process

Integrated circuit chips with fine-line metal and over-passivation metal

Semiconductor package with embedded die

Semiconductor package

Wafer level chip size packaged chip device with an N-shape junction inside and method of fabricating the same

Radiation hardened lateral MOSFET structure

Through-wafer interconnects for photoimager and memory wafers

Method of sealing or welding two elements to one another

Low viscosity precursor compositions and methods for the deposition of conductive electronic features

SEMICONDUCTOR CHIP STACK PACKAGE WITH REINFORCING MEMBER FOR PREVENTING PACKAGE WARPAGE CONNECTED TO SUBSTRATE

Metal filled through via structure for providing vertical wafer-to-wafer interconnection

Electronic device and method for manufacturing thereof

Semiconductor device, wiring of semiconductor device, and method of forming wiring

Solder ball mounting method and solder ball mounting apparatus

Plating Device, Plating Method, Semiconductor Device, And Method For Manufacturing Semiconductor Device

Acceleration sensor having single and multi-layer substrates

Solder ball mounting method and solder ball mounting substrate manufacturing method

Method of manufacturing complementary metal oxide semiconductor image sensor

Technique for forming a passivation layer without a terminal metal

Bonding structure and fabrication thereof

Semiconductor device

Solder pillar bumping and a method of making the same

METALLIZATION LAYER STACK WITHOUT A TERMINAL ALUMINUM METAL LAYER

Packaging with base layers comprising alloy 42

CONNECTING A PLURALITY OF BOND PADS AND/OR INNER LEADS WITH A SINGLE BOND WIRE

Semiconductor integrated circuit and method for manufacturing the same

METHOD FOR PRODUCING AN INTEGRATED CIRCUIT INCLUDING A CONNECTION CONTACT ON A SEMICONDUCTOR BODY

Flip chip metallization method and devices

Method for forming conductive layer and substrate having the same, and method for manufacturing semiconductor device

High performance system-on-chip using post passivation process

CHIP STRUCTURE AND WAFER STRUCTURE

Semiconductor module arrangement

Chip package for image sensor and method of manufacturing the same

Semiconductor Device and Method of Fabricating the Same

Low viscosity precursor compositions and methods for the deposition of conductive electronic features

Low viscosity precursor compositions and methods for the deposition of conductive electronic features

Terminal pad structures and methods of fabricating same

Semiconductor device including a plurality of circuit element chips and a manufacturing method thereof

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

Bond pad structures and integrated circuit chip having the same

Method of fabricating semiconductor package structure

ATTACHING AND INTERCONNECTING DIES TO A SUBSTRATE

Semiconductor device having a specified terminal layout pattern

Semiconductor device with bonding pad support structure

Interconnections for fine pitch semiconductor devices and manufacturing method thereof

Semiconductor device and wire bonding method therefor

Device having several contact areas

Semiconductor device having recessed connector portions

Integrated Circuit with Back Side Conductive Paths

Post passivation interconnection schemes on top of IC chips

Post passivation interconnection schemes on top of IC chips

Method of providing solder bumps on a substrate using localized heating

Bonding and probing pad structures

Wafer-level interconnect for high mechanical reliability applications

Low fabrication cost, fine pitch and high reliability solder bump

BUMP ELECTRODE INCLUDING PLATING LAYERS AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR DEVICE

Dual layer dielectric stack for microelectronics having thick metal lines

Integrated circuit chips with fine-line metal and over-passivation metal

INTEGRATED CIRCUIT CHIPS WITH FINE-LINE METAL AND OVER-PASSIVATION METAL

Fuse structure for semiconductor integrated circuit with improved insulation film thickness uniformity and moisture resistance

Wiring board and semiconductor device

Electronic device including a nickel-palladium alloy layer

Integrated circuit chips with fine-line metal and over-passivation metal

Integrated circuit chips with fine-line metal and over-passivation metal

Integrated circuit chips with fine-line metal and over-passivation metal

INTEGRATED CIRCUIT CHIPS WITH FINE-LINE METAL AND OVER-PASSIVATION METAL

METHOD AND STRUCTURE TO ENHANCE TEMPERATURE/HUMIDITY/BIAS PERFORMANCE OF SEMICONDUCTOR DEVICES BY SURFACE MODIFICATION

LAYER FOR CHIP CONTACT ELEMENT

Semiconductor element comprising a supporting structure and production method

Managing forces of semiconductor device layers

Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument

Focused stress relief using reinforcing elements

Semiconductor wafer and method of manufacturing the same and method of manufacturing semiconductor device

CHIP PACKAGE, CHIP STRUCTURE AND MANUFACTURING PROCESS THEREOF

Stack package having guard ring which insulates through-via interconnection plug and method for manufacturing the same

Process of forming an electronic device including an inductor

CHIP STRUCTURE

Method of assembling carbon nanotube reinforced solder caps

Method of forming metal lines and bumps for semiconductor devices

Apparatus and method incorporating discrete passive components in an electronic package

Electronic device and method for production

Wire pad of semiconductor device

METHOD OF FABRICATING A WIRE BOND PAD WITH Ni/Au METALLIZATION

Semiconductor device having sealing film and manufacturing method thereof

Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument

Electromagnetic shielding using through-silicon vias

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Semiconductor device and manufacturing method thereof

Method for fabricating resin-molded semiconductor device having posts with bumps

Removing dry film resist residues using hydrolyzable membranes

Post passivation interconnection schemes on top of IC chip

Post passivation interconnection schemes on top of IC chip

Pad over active circuit system and method with meshed support structure

Post passivation interconnection schemes on top of IC chip

Bonding pad for contacting a device

Electrical interconnection structure formation

Castellation wafer level packaging of integrated circuit chips