ClassID:

207790

H01L24/10 - page 2 - CPC Classification

Classification description:

Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto Bump connectors ; Manufacturing methods related thereto

Recent Application in this class:
#301
20140099753
2014-04-10

Techniques for packaging multiple device components

#302
20140042623
2014-02-13

System in package and method of fabricating same

#303
20140042613
2014-02-13

Semiconductor device and method of manufacturing the same

#304
20140035132
2014-02-06

SURFACE MOUNT CHIP

#305
20140027906
2014-01-30

Semiconductor device, a mobile communication device, and a method for manufacturing a semiconductor device

#306
20140008791
2014-01-09

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

#307
20130328186
2013-12-12

Reduced stress TSV and interposer structures

#308
20130313704
2013-11-28

Method for fabricating two substrates connected by at least one mechanical and electrically conductive connection and structure obtained

#309
20130307143
2013-11-21

Wafer-level packaging mechanisms

#310
20130299983
2013-11-14

Through wire interconnect (TWI) for semiconductor components having wire in via and bonded connection with substrate contact

#311
20130299972
2013-11-14

Self-aligned protection layer for copper post structure

#312
20130280851
2013-10-24

Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device

#313
20130277829
2013-10-24

Method of fabricating three dimensional integrated circuit

#314
20130256895
2013-10-03

STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT

#315
20130249115
2013-09-26

Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units

#316
20130249090
2013-09-26

Semiconductor device and method of forming partially-etched conductive layer recessed within substrate for bonding to semiconductor die

#317
20130234311
2013-09-12

Semiconductor component that includes a protective structure

#318
20130234251
2013-09-12

Semiconductor integrated device

#319
20130224946
2013-08-29

Passivated copper chip pads

#320
20130187289
2013-07-25

Semiconductor device structures and electronic devices including hybrid conductive vias, and methods of fabrication

#321
20130187277
2013-07-25

Crack stopper on under-bump metallization layer

#322
20130175688
2013-07-11

Tin-based solder ball and semiconductor package including the same

#323
20130146872
2013-06-13

Semiconductor device and method of forming conductive pillars having recesses or protrusions to detect interconnect continuity between semiconductor die and substrate

#324
20130140695
2013-06-06

Solder bump connections

#325
20130128477
2013-05-23

Method of determining reinforcement position of circuit substrate and substrate assembly

#326
20130127045
2013-05-23

Mechanisms for forming fine-pitch copper bump structures

#327
20130099349
2013-04-25

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

#328
20130068823
2013-03-21

Die bonder and bonding method

#329
20130065390
2013-03-14

Chips having rear contacts connected by through vias to front contacts

#330
20130062770
2013-03-14

Semiconductor structure and method for making same

#331
20130062766
2013-03-14

System and method for 3D integrated circuit stacking

#332
20130056880
2013-03-07

System in package and method of fabricating same

#333
20130049194
2013-02-28

Self-aligned protection layer for copper post structure

#334
20130034921
2013-02-07

Semiconductor light-emitting device and method for manufacturing same

#335
20130026602
2013-01-31

Semiconductor device

#336
20130001778
2013-01-03

Bump-on-trace (BOT) structures

#337
20120329219
2012-12-27

Through wafer vias and method of making same

#338
20120326303
2012-12-27

Semiconductor device with partially-etched conductive layer recessed within substrate for bonding to semiconductor die

#339
20120326296
2012-12-27

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

#340
20120319273
2012-12-20

Flip chip interconnect solder mask

#341
20120319272
2012-12-20

Flip chip interconnect solder mask

#342
20120273934
2012-11-01

Reduced-stress bump-on-trace (BOT) structures

#343
20120252163
2012-10-04

Stacked package, method of fabricating stacked package, and method of mounting stacked package fabricated by the method

#344
20120241956
2012-09-27

Techniques for packaging multiple device components

#345
20120228781
2012-09-13

Stacked semiconductor component having through wire interconnect (TWI) with compressed wire

#346
20120217593
2012-08-30

Sensor mounted in flip-chip technology at a substrate edge

#347
20120211881
2012-08-23

Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process

#348
20120208350
2012-08-16

Method of manufacturing semiconductor device having a bumped wafer and protective layer

#349
20120199969
2012-08-09

SEMICONDUCTOR DEVICE

#350
20120193790
2012-08-02

Electrostatic chucking of an insulator handle substrate

#351
20120188727
2012-07-26

EMI Shielding in a Package Module

#352
20120176151
2012-07-12

Test contact system for testing integrated circuits with packages having an array of signal and power contacts

#353
20120164825
2012-06-28

Semiconductor package with a metal post and manufacturing method thereof

#354
20120146219
2012-06-14

Wafer-level interconnect for high mechanical reliability applications

#355
20120146212
2012-06-14

Solder bump connections

#356
20120133058
2012-05-31

Semiconductor device having semiconductor substrate electrode pads, and external electrodes

#357
20120126416
2012-05-24

Method of forming partially-etched conductive layer recessed within substrate for bonding to semiconductor die

#358
20120074574
2012-03-29

Semiconductor structure and method for making same

#359
20120074553
2012-03-29

Method and system for improving reliability of a semiconductor device

#360
20120045909
2012-02-23

Multilevel interconnection system

#361
20110318590
2011-12-29

METAL LAYER-ATTACHED FILM FOR ELECTRONIC COMPONENT, METHOD FOR PRODUCING THE FILM, AND USE THEREOF

#362
20110318484
2011-12-29

SILVER-COATED BALL AND METHOD FOR MANUFACTURING SAME

#363
20110316157
2011-12-29

SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING THE SAME

#364
20110316156
2011-12-29

Semiconductor device and method of forming RDL along sloped side surface of semiconductor die for z-direction interconnect

#365
20110303443
2011-12-15

MOUNT STRUCTURE, ELECTRONIC APPARATUS, STRESS RELIEVING UNIT, AND METHOD OF MANUFACTURING STRESS RELIEVING UNIT

#366
20110291272
2011-12-01

Chip structure

#367
20110287595
2011-11-24

Semiconductor integrated circuit device

#368
20110278727
2011-11-17

Chip structure and process for forming the same

#369
20110266540
2011-11-03

Semiconductor device

#370
20110254094
2011-10-20

Semiconductor device

#371
20110233776
2011-09-29

Semiconductor chip with coil element over passivation layer

#372
20110233745
2011-09-29

Integrated circuit packages

#373
20110230044
2011-09-22

CONTACT STRUCTURE HAVING A COMPLIANT BUMP AND A TESTING AREA AND MANUFACTURING METHOD FOR THE SAME

#374
20110221023
2011-09-15

Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device

#375
20110215446
2011-09-08

Chip package and method for fabricating the same

#376
20110204511
2011-08-25

System and Method for Improving Reliability of Integrated Circuit Packages

#377
20110204505
2011-08-25

Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier

#378
20110195543
2011-08-11

FLIP-CHIP ASSEMBLY WITH ORGANIC CHIP CARRIER HAVING MUSHROOM-PLATED SOLDER RESIST OPENING

#379
20110180936
2011-07-28

Semiconductor device structures and electronic devices including same hybrid conductive vias

#380
20110169167
2011-07-14

Grid array connection device and method

#381
20110163444
2011-07-07

Semiconductor device having elastic solder bump to prevent disconnection

#382
20110151621
2011-06-23

Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods

#383
20110140730
2011-06-16

DETECTION CIRCUITRY FOR DETECTING BONDING CONDITIONS ON BOND PADS

#384
20110140236
2011-06-16

Integrated circuit with pads connected by an under-bump metallization and method for production thereof

#385
20110114978
2011-05-19

Semiconductor light-emitting device and method for manufacturing same

#386
20110101520
2011-05-05

Semiconductor die contact structure and method

#387
20110097850
2011-04-28

Method of fabricating a packaging structure

#388
20110092000
2011-04-21

Method for manufacturing and testing an integrated electronic circuit

#389
20110079898
2011-04-07

Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

#390
20110074034
2011-03-31

Method for manufacturing a semiconductor component

#391
20110072656
2011-03-31

Method for forming a current distribution structure

#392
20110062553
2011-03-17

Protected semiconductor device and method of manufacturing thereof

#393
20110059596
2011-03-10

Semiconductor wafer coat layers and methods therefor

#394
20110049705
2011-03-03

Self-aligned protection layer for copper post structure

#395
20110049515
2011-03-03

Chip structure with bumps and testing pads

#396
20110042833
2011-02-24

Semiconductor device having a wafer level chip size package structure

#397
20110037161
2011-02-17

Electrostatic chucking of an insulator handle substrate

#398
20110027987
2011-02-03

Method and apparatus for manufacturing semiconductor device

#399
20110027984
2011-02-03

Process of forming an electronic device including a conductive stud over a bonding pad region

#400
20110018129
2011-01-27

Semiconductor device

#401
20110018110
2011-01-27

Electronic device, method of producing the same, and semiconductor device

#402
20110006423
2011-01-13

Surface-mounted silicon chip

#403
20110001232
2011-01-06

Flip-chip module and method for the production thereof

#404
20100320615
2010-12-23

Semiconductor device

#405
20100317151
2010-12-16

Warpage resistant semiconductor package and method for manufacturing the same

#406
20100308450
2010-12-09

Integrated package

#407
20100295175
2010-11-25

Wafer level chip scale package

#408
20100283151
2010-11-11

Techniques for packaging multiple device components

#409
20100279501
2010-11-04

Semiconductor device and method of manufacturing the same

#410
20100277192
2010-11-04

Manufacturing method of semiconductor integrated circuit device

#411
20100270673
2010-10-28

Method for connecting two joining surfaces

#412
20100264521
2010-10-21

Semiconductor component having through wire interconnect (TWI) with compressed wire

#413
20100255673
2010-10-07

Semiconductor device having elastic solder bump to prevent disconnection

#414
20100252934
2010-10-07

Three-dimensional semiconductor architecture

#415
20100252925
2010-10-07

Semiconductor device

#416
20100244241
2010-09-30

Semiconductor device and method of forming a thin wafer without a carrier

#417
20100244172
2010-09-30

Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device

#418
20100237505
2010-09-23

Metal-metal bonding of compliant interconnect

#419
20100225006
2010-09-09

Chips having rear contacts connected by through vias to front contacts

#420
20100224987
2010-09-09

Stress buffering package for a semiconductor component

#421
20100224966
2010-09-09

Stress barrier structures for semiconductor chips

#422
20100213593
2010-08-26

Stacked semiconductor package having reduced height

#423
20100206133
2010-08-19

Method of refining solder materials

#424
20100200985
2010-08-12

Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process

#425
20100197077
2010-08-05

Semiconductor package adapted for high-speed data processing and damage prevention of chips packaged therein and method for fabricating the same

#426
20100187688
2010-07-29

Reduced bottom roughness of stress buffering element of a semiconductor component

#427
20100187684
2010-07-29

System and method for 3D integrated circuit stacking

#428
20100187659
2010-07-29

Semiconductor device and method for manufacturing semiconductor device

#429
20100180249
2010-07-15

Chip-scale package conversion technique for dies

#430
20100155945
2010-06-24

Semiconductor device

#431
20100155944
2010-06-24

Semiconductor device

#432
20100155914
2010-06-24

Power module having stacked flip-chip and method of fabricating the power module

#433
20100151630
2010-06-17

Methods of forming integrated circuit packages, and methods of assembling integrated circuit packages

#434
20100148365
2010-06-17

Grid array connection device and method

#435
20100148218
2010-06-17

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR DESIGNING THE SAME

#436
20100140762
2010-06-10

Interconnection of lead frame to die utilizing flip chip process

#437
20100140760
2010-06-10

Alpha shielding techniques and configurations

#438
20100120937
2010-05-13

SEMICONDUCTOR DEVICE

#439
20100117226
2010-05-13

Structure and method for stacked wafer fabrication

#440
20100109006
2010-05-06

Semiconductor device

#441
20100096749
2010-04-22

Semiconductor package with a metal post

#442
20100096732
2010-04-22

Semiconductor integrated circuit device

#443
20100032831
2010-02-11

BUMP STRUCTURE FOE SEMICONDUCTOR DEVICE

#444
20100032811
2010-02-11

Through wafer vias and method of making same

#445
20100032810
2010-02-11

Through wafer vias and method of making same

#446
20100032807
2010-02-11

Wafer level semiconductor module and method for manufacturing the same

#447
20100013093
2010-01-21

Chip mounting

#448
20100006978
2010-01-14

Circuit board and semiconductor device

#449
20090309224
2009-12-17

Circuitry component and method for forming the same

#450
20090309217
2009-12-17

FLIP-CHIP INTERCONNECTION WITH A SMALL PASSIVATION LAYER OPENING

#451
20090302878
2009-12-10

Test contact system for testing integrated circuits with packages having an array of signal and power contacts

#452
20090294983
2009-12-03

Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends

#453
20090289364
2009-11-26

Semiconductor device and a method for manufacturing the same

#454
20090289346
2009-11-26

Structure and manufacturing method of chip scale package

#455
20090286099
2009-11-19

Silver-coated ball and method for manufacturing same

#456
20090283905
2009-11-19

CONDUCTIVE STRUCTURE OF A CHIP

#457
20090280601
2009-11-12

Method and apparatus for facilitating proximity communication and power delivery

#458
20090273098
2009-11-05

Enhanced architectural interconnect options enabled with flipped die on a multi-chip package

#459
20090273097
2009-11-05

Semiconductor component with improved contact pad and method for forming the same

#460
20090273095
2009-11-05

Rectangular-shaped controlled collapse chip connection

#461
20090273065
2009-11-05

Interconnection of lead frame to die utilizing flip chip process

#462
20090258461
2009-10-15

Semiconductor device and method for manufacturing the same

#463
20090243093
2009-10-01

CONTACT STRUCTURE AND CONNECTING STRUCTURE

#464
20090218674
2009-09-03

Semiconductor module

#465
20090217518
2009-09-03

Method of manufacturing a device incorporated substrate and method of manufacturing a printed circuit board

#466
20090212435
2009-08-27

Power semiconductor device including a double metal contact

#467
20090212422
2009-08-27

JOINT RELIABILITY OF SOLDER JOINT BETWEEN Sn-yAg SOLDER AND Ni-P UNDER BUMP METALLIC LAYER BY COBALT ADDITION

#468
20090200675
2009-08-13

Passivated Copper Chip Pads

#469
20090194874
2009-08-06

Semiconductor chip package and method for manufacturing thereof

#470
20090193652
2009-08-06

SCALABLE SUBSYSTEM ARCHITECTURE HAVING INTEGRATED COOLING CHANNELS

#471
20090184419
2009-07-23

Flip chip interconnect solder mask

#472
20090154125
2009-06-18

Semiconductor device

#473
20090146316
2009-06-11

Flip-chip assembly with organic chip carrier having mushroom-plated solder resist opening

#474
20090146299
2009-06-11

SEMICONDUCTOR PACKAGE AND METHOD THEREOF

#475
20090140401
2009-06-04

System and Method for Improving Reliability of Integrated Circuit Packages

#476
20090140392
2009-06-04

Warpage resistant semiconductor package and method for manufacturing the same

#477
20090127665
2009-05-21

Semiconductor device and manufacturing method thereof

#478
20090126991
2009-05-21

Substrate for mounting electronic part and electronic part

#479
20090117687
2009-05-07

Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

#480
20090104769
2009-04-23

Semiconductor chip with coil element over passivation layer

#481
20090100668
2009-04-23

Inductor formed in an integrated circuit

#482
20090096093
2009-04-16

INTER-CONNECTING STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF THE SAME

#483
20090095519
2009-04-16

Current distribution structure and method

#484
20090091036
2009-04-09

Wafer structure with a buffer layer

#485
20090078935
2009-03-26

Semiconductor device

#486
20090071710
2009-03-19

Flip-chip component production method

#487
20090065931
2009-03-12

PACKAGED INTEGRATED CIRCUIT AND METHOD OF FORMING THEREOF

#488
20090065925
2009-03-12

Dual-sided chip attached modules

#489
20090057924
2009-03-05

Semiconductor device having at least two terminals among the plurality of terminals electrically connected to each other while not being adjacent to one other and not being connected to internal circuit

#490
20090045513
2009-02-19

Semiconductor chip package, electronic device including the semiconductor chip package and methods of fabricating the electronic device

#491
20090035929
2009-02-05

Method of manufacturing semiconductor device

#492
20090032964
2009-02-05

System and method for providing semiconductor device features using a protective layer

#493
20090032944
2009-02-05

Electronic device, method of producing the same, and semiconductor device

#494
20090027866
2009-01-29

Semiconductor die package with internal bypass capacitors

#495
20090026634
2009-01-29

Method of manufacturing an electronic part mounting structure

#496
20090026591
2009-01-29

Semiconductor package adapted for high-speed data processing and damage prevention of chips packaged therein and method for fabricating the same

#497
20090017565
2009-01-15

Manufacturing method of semiconductor integrated circuit device

#498
20090014896
2009-01-15

Flip-chip package structure, and the substrate and the chip thereof

#499
20090011542
2009-01-08

Method of fabricating chip package

#500
20090008778
2009-01-08

Chip package

#501
20090001542
2009-01-01

Semiconductor package and multi-chip semiconductor package using the same

#502
20080315424
2008-12-25

Structure and manufactruing method of chip scale package

#503
20080308929
2008-12-18

Semiconductor device, chip package and method of fabricating the same

#504
20080305587
2008-12-11

Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

#505
20080303152
2008-12-11

Contact pad and method of forming a contact pad for an integrated circuit

#506
20080303147
2008-12-11

HIGH-FREQUENCY CIRCUIT DEVICE AND RADAR

#507
20080296762
2008-12-04

Semiconductor device

#508
20080286903
2008-11-20

Semiconductor device packaged into chip size and manufacturing method thereof

#509
20080284011
2008-11-20

BUMP STRUCTURE

#510
20080284009
2008-11-20

Dimple free gold bump for drive IC

#511
20080284000
2008-11-20

Methods of assembling integrated circuit packages

#512
20080277805
2008-11-13

Semiconductor device

#513
20080277705
2008-11-13

Semiconductor device, semiconductor wafer structure and method for manufacturing the semiconductor wafer structure

#514
20080272488
2008-11-06

Semiconductor Device

#515
20080265428
2008-10-30

VIA AND SOLDER BALL SHAPES TO MAXIMIZE CHIP OR SILICON CARRIER STRENGTH RELATIVE TO THERMAL OR BENDING LOAD ZERO POINT

#516
20080265408
2008-10-30

Highly reliable low cost structure for wafer-level ball grid array packaging

#517
20080254611
2008-10-16

Interconnection designs and materials having improved strength and fatigue life

#518
20080248643
2008-10-09

Solder connector structure and method

#519
20080246136
2008-10-09

Chips having rear contacts connected by through vias to front contacts

#520
20080241994
2008-10-02

Print mask and method of manufacturing electronic components using the same

#521
20080237854
2008-10-02

METHOD FOR FORMING CONTACT PADS

#522
20080237850
2008-10-02

COMPLIANT BUMP STRUCTURE AND BONDING STRUCTURE

#523
20080233740
2008-09-25

Method for producing electrically conductive bushings through non-conductive or semiconductive substrates

#524
20080230891
2008-09-25

Chip and wafer integration process using vertical connections

#525
20080227240
2008-09-18

Method of making reliable wafer level chip scale package semiconductor devices

#526
20080224326
2008-09-18

Chip structure with bumps and testing pads

#527
20080224285
2008-09-18

Power module having stacked flip-chip and method of fabricating the power module

#528
20080223607
2008-09-18

Wiring board and capacitor to be built into wiring board

#529
20080197459
2008-08-21

Encapsulated chip scale package having flip-chip on lead frame structure

#530
20080173973
2008-07-24

Semiconductor integrated circuit device including wiring lines and interconnections

#531
20080169560
2008-07-17

Semiconductor device and package including the same

#532
20080157382
2008-07-03

DIRECT TERMINATION OF A WIRING METAL IN A SEMICONDUCTOR DEVICE

#533
20080157360
2008-07-03

Conductive systems and devices including wires coupled to anisotropic conductive film, and methods of forming the same

#534
20080150161
2008-06-26

Semiconductor device and method of protecting passivation layer in a solder bump process

#535
20080150101
2008-06-26

Microelectronic packages having improved input/output connections and methods therefor

#536
20080150039
2008-06-26

Semiconductor device

#537
20080146019
2008-06-19

Chip structure and process for forming the same

#538
20080142994
2008-06-19

Contact Pad And Bump Pad Arrangement for High-Lead Or Lead-Free Bumps

#539
20080142979
2008-06-19

Chip structure and process for forming the same

#540
20080142978
2008-06-19

Chip structure and process for forming the same

#541
20080142968
2008-06-19

STRUCTURE FOR CONTROLLED COLLAPSE CHIP CONNECTION WITH A CAPTURED PAD GEOMETRY

#542
20080136047
2008-06-12

Semiconductor device

#543
20080136034
2008-06-12

Chip structure and process for forming the same

#544
20080136025
2008-06-12

Semiconductor device

#545
20080132038
2008-06-05

Semiconductor device and manufacturing method of the same

#546
20080128906
2008-06-05

Semiconductor device and manufacturing method thereof

#547
20080128892
2008-06-05

Intergrated Circuits Device Having a Reinforcement Structure

#548
20080128887
2008-06-05

Semiconductor device having elastic solder bump to prevent disconnection

#549
20080128885
2008-06-05

Stress decoupling structures for flip-chip assembly

#550
20080124918
2008-05-29

Chip structure and process for forming the same

#551
20080124910
2008-05-29

Method of disposing and arranging dummy patterns

#552
20080124837
2008-05-29

Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps

#553
20080122118
2008-05-29

Silica nanoparticles thermoset resin compositions

#554
20080122108
2008-05-29

Rotation joint and semiconductor device having the same

#555
20080122099
2008-05-29

Chip structure and process for forming the same

#556
20080122086
2008-05-29

Solder bump structure and method of manufacturing same

#557
20080122082
2008-05-29

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE CONTAINING THE SAME

#558
20080121943
2008-05-29

Top layers of metal for integrated circuits

#559
20080110013
2008-05-15

Method of sealing or welding two elements to one another

#560
20080096323
2008-04-24

INTEGRATED CIRCUIT DIE/PACKAGE INTERCONNECT

#561
20080096294
2008-04-24

INTEGRATED CIRCUIT STRUCTURE, DISPLAY MODULE, AND INSPECTION METHOD THEREOF

#562
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Managing forces of semiconductor device layers

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MOULD HAVING NANO-SCALED HOLES

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Semiconductor device having circuit blocks in a single crystal layer, and bumps on certain blocks

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Electronic device and method of manufacturing the same

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Chip package and method for fabricating the same

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Chip structure and process for forming the same

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Chip structure and process for forming the same

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Semiconductor package and method for manufacturing the same

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Top layers of metal for integrated circuits

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Semiconductor package and method of manufacturing the same

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Trace design to minimize electromigration damage to solder bumps

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2008-02-21

BUMP STRUCTURES AND PACKAGED STRUCTURES THEREOF

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Stacked semiconductor components with through wire interconnects (TWI)

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Semiconductor integrated circuit device

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Bond Wireless Package

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Electronic device including a conductive stud over a bonding pad region

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Contact structure having a compliant bump and a testing area

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Solder connector structure and method

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Semiconductor integrated circuit device

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Chip having two groups of chip contacts

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Pillar Bump Package Technology

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Semiconductor device and method for manufacturing semiconductor device

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2008-01-03

Semiconductor package substrate for flip chip packaging

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Integrated circuit (IC) chip and method for fabricating the same

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Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

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CHIP STRUCTURE

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