207790 ⎘
Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto Bump connectors ; Manufacturing methods related thereto
Sub-classes:PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE USING THE SAME
#2MOISTURE RESISTIVE FLIP-CHIP BASED MODULE
#3ELECTRONIC MODULE AND MANUFACTURING METHOD OF ELECTRONIC MODULE
#4SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAME
#5SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
#6ELECTRONIC DEVICE
#7SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SAME
#8MOLDED SPACER FOR SURFACE MOUNT TECHNOLOGY
#9SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAME
#10ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
#11SECURITY CIRCUITRY FOR BONDED STRUCTURES
#12REINFORCING RESIN COMPOSITION AND MOUNTED STRUCTURE
#133D CHIP WITH SHARED CLOCK DISTRIBUTION NETWORK
#14Power, Signaling and Thermal Path Co-optimization
#15WAFER LEVEL DICING METHOD AND SEMICONDUCTOR DEVICE
#16SEMICONDUCTOR DEVICE
#17METHOD OF ALIGNMENT OF ELECTRICAL COMPONENTS OF AN ELECTRICAL APPARATUS WITH A SUPPORT ASSEMBLY
#18CHIP
#19GUARD RING DESIGN ENABLING IN-LINE TESTING OF SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES
#20ELECTRONIC DEVICE
#21HYBRID MICRO-BUMP INTEGRATION WITH REDISTRIBUTION LAYER
#22ELECTRONIC PACKAGE
#23SEMICONDUCTOR DEVICE WITH DELAMINATION REDUCTION MECHANISM AND METHODS FOR MANUFACTURING THE SAME
#24ELECTRONIC PACKAGE, PACKAGING SUBSTRATE AND FABRICATING METHOD THEREOF
#25SEMICONDUCTOR PACKAGE INCLUDING BALL GRID ARRAY CONNECTIONS WITH IMPROVED RELIABILITY
#26SEMICONDUCTOR DEVICE HAVING ELECTRODE PADS ARRANGED BETWEEN GROUPS OF EXTERNAL ELECTRODES
#27EPITAXIAL SOURCE OR DRAIN REGION WITH A WRAPPED CONDUCTIVE CONTACT
#28DRIVING SUBSTRATE, MICRO LED TRANSFER DEVICE AND MICRO LED TRANSFER METHOD
#29SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#30SEMICONDUCTOR DEVICE HAVING ELECTRODE PADS ARRANGED BETWEEN GROUPS OF EXTERNAL ELECTRODES
#31INTEGRATED ELECTRONIC STRUCTURE AND DATA COMMUNICATION BETWEEN COMPONENTS OF THE STRUCTURE
#32Electronic device including connecting pad and conductive portion
#33PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME
#34SEMICONDUCTOR ASSEMBLY INCLUDING MULTIPLE SOLDER MASKS
#35Indium electroplating on physical vapor deposition tantalum
#36SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
#37HYBRID MICRO-BUMP INTEGRATION WITH REDISTRIBUTION LAYER
#38Stackable via package and method
#39Semiconductor apparatus and electronic apparatus
#40Guard ring design enabling in-line testing of silicon bridges for semiconductor packages
#41Package and printed circuit board attachment
#42SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#43ELECTRONIC COMPONENT, MODULE, AND METHOD OF MANUFACTURING ELECTRONIC COMPONENT
#443D chip with shared clock distribution network
#45Micro LED display panel
#46Semiconductor die contact structure and method
#47Method for underfilling using spacers
#48Antenna system and antenna combination architecture
#49DISPLAY DEVICE
#50Chip on film package with trench to reduce slippage and display device including the same
#51PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE USING THE SAME
#52Electronic device and method for manufacturing electronic device
#53Method of forming an electronic device structure having an electronic component with an on-edge orientation and related structures
#54SEMICONDUCTOR PACKAGE
#55Security circuitry for bonded structures
#56Metal-bump sidewall protection
#57Semiconductor device having electrode pads arranged between groups of external electrodes
#58Shielding structures
#593D Integrated Circuit and Methods of Forming the Same
#60Method of forming semiconductor device
#61Hybrid micro-bump integration with redistribution layer
#62Barrier structures between external electrical connectors
#63Semiconductor device and method of manufacture
#643D Integrated Circuit and Methods of Forming the Same
#65Multi-use package architecture
#66Guard ring design enabling in-line testing of silicon bridges for semiconductor packages
#67Stackable via package and method
#68Methods and systems for inspecting integrated circuits based on X-rays
#69Wiring substrate having metal post offset from conductor pad and method for manufacturing wiring substrate
#70ELECTRONIC DEVICE
#71Bump connection placement in quantum devices in a flip chip configuration
#72Wafer level dicing method and semiconductor device
#73Semiconductor device and method for manufacturing semiconductor device
#74Semiconductor device with backmetal and related methods
#75Semiconductor package
#763D Integrated Circuit and Methods of Forming the Same
#77Semiconductor module
#78Hybrid under-bump metallization component
#793D chip with shared clock distribution network
#80Package and printed circuit board attachment
#81Shielding structures
#82Semiconductor device and manufacturing method thereof
#83Semiconductor die contact structure and method
#84Graphite-laminated chip-on-film-type semiconductor package having improved heat dissipation and electromagnetic wave shielding functions
#85Semiconductor package
#86Method of forming an electronic device structure having an electronic component with an on-edge orientation and related structures
#87Semiconductor device comprising semiconductor die and interposer and manufacturing method thereof
#88Modular voltage regulators
#893D Integrated Circuit and Methods of Forming the Same
#90Metal-bump sidewall protection
#91Semiconductor device
#92Semiconductor device with through silicon via structure
#93Security circuitry for bonded structures
#94Manufacturing of flip-chip electronic device with carrier having heat dissipation elements free of solder mask
#95Graphite-laminated chip-on-film-type semiconductor package allowing improved visibility and workability
#96Semiconductor devices
#97Stackable via package and method
#98Filter and capacitor using redistribution layer and micro bump layer
#99Contactless high-frequency interconnect
#1003D chip with shared clock distribution network
#101Semiconductor device having electrode pads arranged between groups of external electrodes
#102Light emitting diode panel
#103Shielding structures
#104Optical transceiver and manufacturing method thereof
#105Metal-bump sidewall protection
#106Method for manufacturing semiconductor device with through silicon via structure
#107Hybrid under-bump metallization component
#108Adhesive for semiconductor device, and high productivity method for manufacturing said device
#109Package and printed circuit board attachment
#110Vehicle radar signaling device including a substrate integrated waveguide
#111Semiconductor package structure and method for manufacturing the same
#112Semiconductor package
#113Micro light emitting device and display apparatus
#114Superconducting bump bonds
#115Superconducting bump bonds
#116Semiconductor device and method for manufacturing semiconductor device
#117Guard ring design enabling in-line testing of silicon bridges for semiconductor packages
#118Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device
#119Modular voltage regulators
#120Monolithic decoupling capacitor between solder bumps
#121Electronic device
#122Barrier structures between external electrical connectors
#123Carrier and integrated memory
#124Carrier and integrated memory
#125Semiconductor devices and methods of forming the same
#126Grid array connection device and method
#127MULTI-USE PACKAGE ARCHITECTURE
#128FLUX TRANSFER TOOL AND FLUX TRANSFER METHOD
#129Semiconductor devices with post-probe configurability
#130Semiconductor device with backmetal and related methods
#131Method of forming an electronic device structure having an electronic component with an on-edge orientation and related structures
#132Method for manufacturing printed-wiring assembly, and printed-wiring assembly manufactured according to the same
#133PACKAGING STRUCTURE AND PACKAGING METHOD
#134Layered cooling structure including insulative layer and multiple metallization layers
#135Semiconductor packages
#136Fan-out semiconductor package
#137DRAM memory chips quick optical erasure
#138Stacked dies and dummy components for improved thermal performance
#139Semiconductor package
#140Semiconductor devices with post-probe configurability
#141Semiconductor device and method of unit specific progressive alignment
#142Semiconductor die contact structure and method
#143Modular voltage regulators
#144Modular voltage regulators
#145Electrode connection structure, lead frame, and method for forming electrode connection structure
#146Semiconductor chip, method for manufacturing semiconductor chip, integrated circuit device, and method for manufacturing integrated circuit device
#147WAFER LEVEL PACKAGE AND METHOD OF ASSEMBLING SAME
#148Thermosonically bonded connection for flip chip packages
#149Semiconductor package having an electro-magnetic interference shielding or electro-magnetic wave scattering structure
#150Semiconductor packages
#151Semiconductor device having electrode pads arranged between groups of external electrodes
#152Package substrates with top superconductor layers for qubit devices
#153Flip-chip electronic device with carrier having heat dissipation elements free of solder mask
#1543D integrated circuit and methods of forming the same
#155Semiconductor device
#156Semiconductor device with through silicon via structure and method for manufacturing the same
#157Superconducting bump bonds
#158Semiconductor packages
#159Stacked dies using one or more interposers
#160Semiconductor package and semiconductor process
#161Combing bump structure and manufacturing method thereof
#162Semiconductor device and manufacturing method thereof
#1633D chip sharing power circuit
#164Package process method including disposing a die within a recess of a one-piece material
#165Wafer level dicing method and semiconductor device
#166Method for manufacturing semiconductor device including heating and pressuring a laminate having an adhesive layer
#167Monolithic decoupling capacitor between solder bumps
#168Monolithic decoupling capacitor between solder bumps
#169Semiconductor package device
#170X-ray detector comprising a converter element with rewiring unit
#171Grid array connection device and method
#172Semiconductor package having an electro-magnetic interference shielding or electro-magnetic wave scattering structure
#173Filter and capacitor using redistribution layer and micro bump layer
#174Guard ring design enabling in-line testing of silicon bridges for semiconductor packages
#175Semiconductor device and manufacturing method thereof
#176Electronic device with embedded component carrier
#177Integrated circuit structure, display module, and inspection method thereof
#178DIMM DRAM memory chips quick optical data erasure after power cycling
#179Method for manufacturing wafer-level semiconductor packages
#180Bonding pad structure of a semiconductor device
#181Three-dimensional stacked integrated circuit devices and methods of assembling the same
#182Semiconductor chip, electronic device including the same, and method of connecting the semiconductor chip to the electronic device
#183Semiconductor device and method of forming conductive vias by direct via reveal with organic passivation
#184Flip chip
#185Semiconductor device having stacked semiconductor chips interconnected via TSV
#186Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device
#187Test key strcutures, integrated circuit packages and methods of forming the same
#188Semiconductor device having electrode pads arranged between groups of external electrodes
#189Barrier structures between external electrical connectors
#190Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices
#191Semiconductor package
#192Electronic component package having stress alleviation structure
#193Wiring substrate and semiconductor device
#194Package substrate and LED flip chip package structure
#195Capacitor formed on heavily doped substrate
#196Semiconductor device and method for manufacturing semiconductor device
#197Semiconductor device having an encapsulated front side and interposer and manufacturing method thereof
#198Metal bump joint structure
#199Integrated fan-out (InFO) package structures and methods of forming same
#200Semiconductor die contact structure and method
#201Three-dimensional integrated circuit integration
#202Packaging devices and methods of manufacture thereof
#203Semiconductor package device and manufacturing method thereof
#204Bump-on-trace structures with high assembly yield
#205Electronic apparatus operable in high frequencies
#206Semiconductor device and manufacturing method thereof
#207Grid array connection device and method
#208Filter and capacitor using redistribution layer and micro bump layer
#209Semiconductor device and method of forming a thin wafer without a carrier
#210Silver alloying post-chip join
#211Semiconductor device and manufacturing method thereof
#212Semiconductor device
#213Flip-chip electronic device with carrier having heat dissipation elements free of solder mask
#214Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
#215Semiconductor device having electrode pads arranged between groups of external electrodes
#216SEMICONDUCTOR MODULE
#217Method of releasably attaching a semiconductor substrate to a carrier
#218Packaging devices and methods of manufacture thereof
#219Power semiconductor device with a double metal contact and related method
#220Electrode connection structure and electrode connection method
#221Integrated circuit structure having dies with connectors
#222Three-dimensional integrated circuit integration
#223Semiconductor device and method for manufacturing semiconductor device
#224Vertical trench routing in a substrate
#2253D integrated circuit and methods of forming the same
#226Test structure for monitoring liner oxidation
#227Semiconductor device
#228Chip mounting
#229Bump-on-trace structures with high assembly yield
#230High-power electronic module and method for making such a module
#231Semiconductor device having stacked semiconductor chips interconnected via TSV and method of fabricating the same
#232Copper-containing layer on under-bump metallization layer
#233Substrate including a dam for semiconductor package, semiconductor package using the same, and manufacturing method thereof
#234Semiconductor device and method of forming conductive vias by direct via reveal with organic passivation
#235Stack of integrated-circuit chips and electronic device
#236Three-dimensional semiconductor architecture
#237Metal bump joint structure
#238Semiconductor device and method for manufacturing semiconductor device
#239Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
#240Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device
#241Semiconductor device
#242Semiconductor device and manufacturing method thereof
#243Package structure and method of forming the same
#244System and method for 3D integrated circuit stacking
#245Semiconductor component and process for fabricating a semiconductor component
#246Semiconductor device
#247Reduced stress TSV and interposer structures
#248Grid array connection device and method
#249Semiconductor device and manufacturing method thereof
#250PRINTED CIRCUIT BOARD, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR PACKAGE
#251Semiconductor device and method of manufacturing the same
#252Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
#253Semiconductor die contact structure and method
#254Bump-on-trace structures with high assembly yield
#255Packaging devices and methods of manufacture thereof
#2563D integrated circuit and methods of forming the same
#257Semiconductor package device and manufacturing method thereof
#258Method for wafer level packaging and a package structure thereof
#259Stack packages including diffusion barriers over sidewalls of through via electrodes and methods of manufacturing the same
#260Wafer level dicing method
#261LOCKING DUAL LEADFRAME FOR FLIP CHIP ON LEADFRAME PACKAGES
#262Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure
#263FABRICATION PROCESS AND STRUCTURE TO FORM BUMPS ALIGNED ON TSV ON CHIP BACKSIDE
#264STACKED SEMICONDUCTOR APPARATUS
#265Wafer support system for 3D packaging
#266Semiconductor substrate having stress-absorbing surface layer
#267Hybrid lead frame and ball grid array package
#268Semiconductor device, method for manufacturing same, and electronic component
#269Metal bump structure for use in driver IC and method for forming the same
#270Metal bump structure for use in driver IC and method for forming the same
#271Power semiconductor device with a double metal contact
#272Metal bump joint structure and methods of forming
#273Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units
#274Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier
#275Passivated copper chip pads
#276Semiconductor device
#277Power module having stacked flip-chip and method for fabricating the power module
#278Three-dimensional semiconductor architecture
#279Integrated circuit structure having dies with connectors
#280Package-on-package structure and method of forming same
#281Semiconductor device including RDL along sloped side surface of semiconductor die for Z-direction interconnect
#282Packaging devices and methods of manufacture thereof
#283Filter and capacitor using redistribution layer and micro bump layer
#284Method and an alignment plate for engaging a stiffener frame and a circuit board
#285Method of fabricating three dimensional integrated circuit
#286Semiconductor device with conductive pillars having recesses or protrusions to detect interconnect continuity between semiconductor die and substrate
#287Reduced stress TSV and interposer structures
#288Mounting structure and manufacturing method for same
#289Electronic component, mother substrate, and electronic component manufacturing method
#290Packaging methods and packaged semiconductor devices
#291Methods and apparatus of packaging of semiconductor devices
#292Interconnection designs and materials having improved strength and fatigue life
#293Wafer-level packaging mechanisms
#294Substrate including a dam for semiconductor package, semiconductor package using the same, and manufacturing method thereof
#295Semiconductor device and semiconductor package containing the same
#296Semiconductor device and manufacturing method thereof
#297Semiconductor device having electrode pads arranged between groups of external electrodes
#298JOINING METHOD USING METAL FOAM, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
#299Metal bump joint structure
#300Self-aligned protection layer for copper post structure