Electronic device including a semiconductor layer and a sidewall spacer and a process of forming the same

Structure and method for fabrication of deep junction silicon-on-insulator transistors

Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions

Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer

Semiconductor device formed on a SOI substrate

Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor

Semiconductor device having a schottky source/drain transistor

Semiconductor memory and read method of the same

Semiconductor device including a deflected part

Field-effect-transistor multiplexing/demultiplexing architectures

Integrated circuit with different channel materials for P and N channel transistors and method therefor

Semiconductor device

Semiconductor device

SEMICONDUCTOR DEVICE

High density memory array having increased channel widths

Nonvolatile semiconductor memory device

Semiconductor integrated circuit device

Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates

Method of making a multiple crystal orientation semiconductor device

Semiconductor device structure

Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof

High responsivity high bandwidth metal-semiconductor-metal optoelectronic device

Hybrid-orientation technology buried n-well design

Fin device with capacitor integrated under gate electrode

Silicon device on Si:C SOI and SiGe and method of manufacture

Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers

Shallow trench isolation fill by liquid phase deposition of SiO

Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same

Semiconductor device

SEMICONDUCTOR DEVICE

Structure and method of integrating compound and elemental semiconductors for high-performance CMOS

Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions

Protection against charging damage in hybrid orientation transistors

Silicon device on Si:C-OI and SGOI and method of manufacture

Semiconductor storage device having an SOI structure

Semiconductor device with increased channel area and fabrication method thereof

Method and manufacturing low leakage MOSFETs and FinFETs

Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors

Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array

Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s)

Electric Device With Vertical Component

Castellated gate MOSFET device capable of fully-depleted operation

Semiconductor device with increased channel area and decreased leakage current

Grounding front-end-of-line structures on a SOI substrate

Nonvolatile semiconductor memory device

Selective silicon deposition for planarized dual surface orientation integration

Silicon deposition over dual surface orientation substrates to promote uniform polishing

Fully-depleted castellated gate MOSFET device and method of manufacture thereof

Process for forming an electronic device including semiconductor fins

Integration of strained Ge into advanced CMOS technology

Interlayer dielectric under stress for an integrated circuit

Method of manufacturing semiconductor device

Semiconductor constructions, and methods of forming semiconductor constructions

SOI substrates and SOI devices, and methods for forming the same

Integrated Circuit Chip With Electrostatic Discharge Protection Device

Semiconductor integrated circuit

SEMICONDUCTOR DEVICE

Semiconductor device and method for manufacturing the same

Method for crystallizing a semiconductor thin film

Integrated circuit with bulk and SOI devices connected with an epitaxial region

Multiple-gate device with floating back gate

Dynamic random access memory

SEMICONDUCTOR MEMORY DEVICE

Semiconductor memory device and manufacturing method thereof

Process for forming an electronic device including semiconductor layers having different stresses

BODY CONNECTION STRUCTURE FOR SOI MOS TRANSISTOR

Vertical SOI transistor memory cell

Semiconductor device, and method for manufacturing the same

Lateral bipolar transistor

Programmable anti-fuse structures, methods for fabricating programmable anti-fuse structures, and methods of programming anti-fuse structures

Semiconductor device and manufacturing method thereof

CMOS device on hybrid orientation substrate comprising equal mobility for perpendicular devices of each type

FinFET body contact structure

Dual stressed SOI substrates

Method of fabricating a body capacitor for SOI memory

Multi-orientation semiconductor-on-insulator (SOI) substrate, and method of fabricating same

Semiconductor memory device and manufacturing method thereof

Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain

Phosphorous doping methods of manufacturing field effect transistors having multiple stacked channels

Semiconductor device having a first circuit block isolating a plurality of circuit blocks

Eeprom memory cell for high temperatures

CMOS structure and method including multiple crystallographic planes

Transistor device with two planar gates and fabrication process

Method to selectively form regions having differing properties and structure

ENHANCED SILICON-ON-INSULATOR (SOI) TRANSISTORS AND METHODS OF MAKING ENHANCED SOI TRANSISTORS

Strained silicon-on-insulator transistors with mesa isolation

Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology

Semiconductor device having an antenna

Ultra-thin logic and backgated ultra-thin SRAM

NAND-type semiconductor storage device and method for manufacturing same

Semiconductor memory device and manufacturing method thereof

Opto-thermal mask including aligned thermal dissipative layer, reflective layer and transparent capping layer

Field effect transistor and a method for manufacturing the same

Method of fabricating a semiconductor device

Methods of forming integrated circuitry, and methods of forming dynamic random access memory cells

Integrated circuitry, dynamic random access memory cells, and electronic systems

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method for the same

Semiconductor integrated circuit

Semiconductor memory device and method for fabricating the same

Method for fabricating semiconductor device

Semiconductor device and method for fabricating the same

Method of manufacturing semiconductor substrate, method of manufacturing semiconductor device, and semiconductor device

Electrostatic discharge protection device and method of fabricating same

STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS

METHOD FOR FABRICATING SOI DEVICE

Device fabrication by anisotropic wet etch

Strained Si on multiple materials for bulk or SOI substrates

Method and structure to prevent circuit network charging during fabrication of integrated circuits

Inductors fabricated from spiral nanocoils and fabricated using noncoil spiral pitch control techniques

Semiconductor array and method for manufacturing a semiconductor array

Semiconductor device and method of fabricating the same

Structure and method for MOSFET gate electrode landing pad

Semiconductor device and method for manufacturing the same

Semiconductor device and method of fabricating the same

Semiconductor memory device and method of operating same

Methods for implementation of a switching function in a microscale device and for fabrication of a microscale switch

Methods of applying substrate bias to SOI CMOS circuits

Semiconductor device having SOI substrate

Thin silicon single diffusion field effect transistor for enhanced drive performance with stress film liners

Integrated circuit using FinFETs and having a static random access memory (SRAM)

Semiconductor device having SOI structure

Technique for forming an isolation trench as a stress source for strain engineering

Fully depleted silicon on insulator semiconductor devices

Vertical DMOS device in integrated circuit

Semiconductor device and manufacturing method of semiconductor device

Mixed orientation semiconductor device and method

SEMICONDUCTOR DEVICE AND METHOD FOR REGIONAL STRESS CONTROL

Integrated semiconductor device and method of manufacturing thereof

Independently controlled, double gate nanowire memory cell with self-aligned contacts

Silicon-on-insulator chip having multiple crystal orientations

Epitaxial imprinting

Radiation hardened isolation structures and fabrication methods

Integrated circuits and methods of forming a field effect transistor

Methods of nanotube films and articles

Semiconductor device and method of manufacturing the same

Semiconductor integrated circuit device

Semiconductor device

Electrically floating body memory cell and array, and method of operating or controlling same

Mechanical memory device and method of manufacturing the same

Back-gated semiconductor device with a storage layer and methods for forming thereof

Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same

Methods and structures for planar and multiple-gate transistors formed on SOI

Stacked non-volatile memory device and methods for fabricating the same

Semiconductor storage device

Diode-based memory including floating-plate capacitor and its applications

Diode-based capacitor memory and its applications

Phase change memory including diode access device

A content addressable memory including capacitor memory cell

Power supply circuits

Integrated circuit on corrugated substrate

Semiconductor device having stressors and method for forming

Semiconductor device and method of manufacturing the same

Semiconductor device and method of fabricating the same background

Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate

Silicon-on-insulator (SOI) read only memory (ROM) array and method of making a SOI ROM

Method and structure for buried circuits and devices

Polysilicon Conductor Width Measurement for 3-Dimensional FETs

SEMICONDUCTOR DEVICE

SRAM cell with improved layout designs

Semiconductor device and manufacturing method thereof

Semiconductor substrate, semiconductor device and process for producing semiconductor substrate

Dual-gate device and method

FIN FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING FIN FIELD EFFECT TRANSISTOR

Methods for fabricating nanocoils

TECHNIQUE FOR REDUCING CRYSTAL DEFECTS IN STRAINED TRANSISTORS BY TILTED PREAMORPHIZATION

Semiconductor devices and methods of fabricating the same

Stress engineering using dual pad nitride with selective SOI device architecture

Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk semiconductor regions

CMOS compatible shallow-trench efuse structure and method

Semiconductor device and manufacturing method thereof

Coiled circuit device with active circuitry and methods for making the same

Fabrication of semiconductor devices

CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and method of forming same

Non-volatile semiconductor memory element and method of manufacturing the same, and semiconductor integrated circuit device including the non-volatile semiconductor memory element

Fin field effect transistors including epitaxial fins

Vertical replacement-gate silicon-on-insulator transistor

High mobility plane FinFETs with equal drive strength

Semiconductor device

FET Channel Having a Strained Lattice Structure Along Multiple Surfaces

Semiconductor device

Method to increase strain enhancement with spacerless FET and dual liner process

Semiconductor device and fabrication method for the same

Semiconductor device including insulated gate type transistor and insulated gate type variable capacitance, and method of manufacturing the same

Electronic devices including a semiconductor layer and a process for forming the same

Semiconductor device and method of manufacturing the same

Method and Structure of Multi-Surface Transistor Device

Method for producing distinct first and second active semi-conducting zones and use thereof for fabricating C-MOS structures

BIPOLAR TRANSISTOR AND BACK-GATED TRANSISTOR STRUCTURE AND METHOD

Dual SOI structure

Inhibiting radiation hardness of integrated circuits

Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

Device having active regions of different depths

Compact integrated capacitor

Lateral bipolar cmos integrated circuit

Recessed channel negative differential resistance-based memory cell

Technique for providing multiple stress sources in NMOS and PMOS transistors

Technique for strain engineering in Si-based Transistors by using embedded semiconductor layers including atoms with high covalent radius

Semiconductor device having PN junction diode and method for manufacturing the same

Embedded strain layer in thin SOI transistors and a method of forming the same

Semiconductor device and manufacturing method thereof

Methods of generating planar double gate transistor shapes and data processing system readable media to perform the methods

Semiconductor device and method of manufacturing the same

Semiconductor substrate with multiple crystallographic orientations

Semiconductor device having first and second separation trenches

SOI DEVICE AND METHOD FOR FABRICATING THE SAME

Process for forming an electronic device including transistor structures with sidewall spacers

Method of fabricating a semiconductor device having self-aligned floating gate and related device

Method of producing the same

Electro-optical device, method of manufacturing the same, electronic apparatus, and semiconductor device

Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate

Semiconductor MIS transistor formed on SOI semiconductor substrate

Method for making a semiconductor structure using silicon germanium

Optical ready substrates

SEMICONDUCTOR DEVICE

Technique for creating different mechanical strain by a contact etch stop layer stack with an intermediate etch stop layer

Three-dimensional integrated circuit structure

Nonvolatile semiconductor memory device

SONOS type two-bit FinFET flash memory cell

Semiconductor memory device and method for manufacturing the same

Semiconductor device and semiconductor device manufacturing method

Methods for fabrication of a stressed MOS device

Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors

Method of fabricating CMOS devices having a single work function gate electrode by band gap engineering and article made thereby

Stress engineering using dual pad nitride with selective SOI device architecture

Method and apparatus improving gate oxide reliability by controlling accumulated charge

Ultra high density flash memory

Multiple crystal orientations on the same substrate

Semiconductor device

Semiconductor device and semiconductor integrated circuit using the same

SOI-like structures in a bulk semiconductor substrate

Method for forming non-volatile memory devices

Trench metal-insulator-metal (MIM) capacitors and method of fabricating same

Semiconductor device and method of manufacturing the same, and semiconductor substrate and method of manufacturing the same

Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same

Semiconductor memory device having memory cells requiring no refresh operation

Field-effect transistor and method for fabricating the same

Strained semiconductor device and method of making the same

Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM

Methods for integrating lattice-mismatched semiconductor structure on insulators

Lattice-mismatched semiconductor structures on insulators

Transistors and methods of manufacture thereof

Semiconductor memory device including an SOI substrate

Hybrid Schottky source-drain CMOS for high mobility and low barrier

Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate

Laminated substrate manufacturing method and laminated substrate manufactured by the method

Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array

Method in the fabrication of a monolithically integrated vertical device on an SOI substrate

Modified hybrid orientation technology

Dual port gain cell with side and top gated read transistor

Fully-depleted (FD) (SOI) MOSFET access transistor and method of fabrication

FinFET and method for manufacturing the same

Programmable random logic arrays using PN isolation

Integrated circuit having a transistor level top side wafer contact and a method of manufacture therefor

Technique for forming recessed strained drain/source regions in NMOS and PMOS transistors

Charge-trapping memory device and method of production

Single-poly EEPROM cell with lightly doped MOS capacitors

Semiconductor structures with body contacts and fabrication methods thereof

Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures

Ferromagnetic memory cell and methods of making and using the same

Method and apparatus for improved ESD performance

Hybrid-orientation technology buried n-well design

Integrating three-dimensional high capacitance density structures

Semiconductor device and method of fabricating same

Method of manufacturing semiconductor device having impurity region under isolation region

Semiconductor wafer and method of fabricating the same

Method of forming SOI-like structure in a bulk semiconductor substrate by annealing a lower portion of a trench while protecting an upper portion of the trench

Semiconductor device having a trench isolation and method of fabricating the same

Device selection circuitry constructed with nanotube technology

Reducing the dielectric constant of a portion of a gate dielectric

Integrated circuit having a top side wafer contact and a method of manufacture therefor

Dense arrays and charge storage devices

Shield plate electrode for semiconductor device

Semiconductor device

SOI device with reduced drain induced barrier lowering

Method of fabricating semiconductor side wall fin

Semiconductor device

Method of forming double gate transistors having varying gate dielectric thicknesses

Integrated circuitry, dynamic random access memory cells, electronic systems, and semiconductor processing methods

Buried stress isolation for high-performance CMOS technology

High performance capacitors in planar back gates CMOS

Piezoelectric stress liner for bulk and SOI

Semiconductor device with trench structure

Power gating schemes in SOI circuits in hybrid SOI-epitaxial CMOS structures

Semiconductor device and semiconductor device manufacturing method

High-frequency device including high-frequency switching circuit

Non-volatile memory cells and methods for fabricating non-volatile memory cells

Stacked transistors and process

Mixed orientation and mixed material semiconductor-on-insulator wafer

Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same

Semiconductor memory device and semiconductor integrated circuit

Semiconductor device with multi-trench separation region and method for producing the same

Epitaxial imprinting

Semiconductor device and method for manufacturing semiconductor device

Semiconductor-on-insulator (SOI) strained active areas

Semiconductor devices utilizing double gated fully depleted silicon on insulator MOS transistors

Universal programmable logic gate and routing method