Input/output circuit device

Vertical MOSFET SRAM cell

Semiconductor device with effective heat-radiation

Field effect transistor and manufacturing method thereof

Memory cell comprising a thin film three-terminal switching device having a metal source and /or drain region

Method of IC production using corrugated substrate

SOI bipolar transistors with reduced self heating

Integrated circuit on corrugated substrate

Semiconductor device and method for fabricating a semiconductor device

CMOS on SOI substrates with hybrid crystal orientations

STORAGE DEVICES FORMED ON PARTIALLY ISOLATED SEMICONDUCTOR SUBSTRATE ISLANDS

Semiconductor device having an active area partially isolated by a lateral cavity

Semiconductor device and manufacturing method of the same

Semiconductor device including a capacitance

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Crystal imprinting methods for fabricating substrates with thin active silicon layers

Metal oxide semiconductor (MOS) device having both an accumulation and a enhancement mode transistor device on a similar substrate and a method of manufacture therefor

Thin layer structure and method of forming the same

Floating body memory cell system and method of manufacture

Area diode formation in SOI application

Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same

Hybrid oriented substrates and crystal imprinting methods for forming such hybrid oriented substrates

Method for integrating silicon CMOS and AlGaN/GaN wideband amplifiers on engineered substrates

Capacitorless DRAM on bulk silicon

Method of growing a germanium epitaxial film on insulator for use in fabrication of CMOS integrated circuit

Device and method for stacked multi-level uncoupled electrostatic actuators

Apparatus and methods for multi-gate silicon-on-insulator transistors

Capacitorless DRAM on bulk silicon

Integrated circuit and method for manufacturing an integrated circuit

Semiconductor device with electrostrictive layer in semiconductor layer and method of manufacturing the same

Semiconductor memory device, semiconductor device, and method for production thereof

Strained silicon CMOS on hybrid crystal orientations

System and method based on field-effect transistors for addressing nanometer-scale devices

Protect diodes for hybrid-orientation substrate structures

Semiconductor device comprising an integrated circuit

Semiconductor device and method of manufacturing same

Lateral lubistor structure and method

Semiconductor device using partial SOI substrate and manufacturing method thereof

Semiconductor device and method of manufacturing the same

Strained Si/SiGe/SOI islands and processes of making same

Method and structure to prevent circuit network charging during fabrication of integrated circuits

Semiconductor device including insulated gate type transistor and insulated gate type capacitance, and method of manufacturing the same

Semiconductor device including single crystal silicon layer

Method of designing semiconductor device, semiconductor device and recording medium

Semiconductor memory device

Semiconductor memory component with body region of memory cell having a depression and a graded dopant concentration

Semiconductors bonded on glass substrates

Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness

Method of manufacturing semiconductor device

Semiconductor wafer, semiconductor device and manufacturing method of semiconductor device

Method for fabricating SOI device

Ultra high density flash memory

Integrated circuit memory cells and methods of forming

Semiconductor thin film, semiconductor device and manufacturing method thereof

Semiconductor device and method of manufacturing the same

Low crosstalk substrate for mixed-signal integrated circuits

Semiconductor device having an SOI structure and method for manufacturing the same

Semiconductor device

Ultra high density flash memory

Semiconductor device with decoupling capacitor and method of fabricating the same

Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer

Method of forming an integrated SOI fingered decoupling capacitor

Method of forming a pseudo SOI substrate and semiconductor devices

Integrated capacitor assembly

Method of fabricating single transistor floating-body DRAM devices having vertical channel transistor structures

Method of manufacturing semiconductor device having trench isolation

TFT mask ROM and method for making same

Integrated circuit and method of manufacture

Stable PD-SOI devices and methods

Flash memory device capable of erasing flash blocks in SOI substrate based on back-bias, method for manufacturing the same, and flash block erasion method and structure thereof

Method for forming a high-performance one-transistor memory cell

Methods for fabricating reduced floating body effect static random access memory cells

High-performance one-transistor memory cell

Fin semiconductor device and method for fabricating the same

Field effect transistor with mixed-crystal-orientation channel and source/drain regions

TMOS-infrared uncooled sensor and focal plane array

Semiconductor device having epitaxial layer

Semiconductor device for limiting leakage current

Integrated circuit (IC) with high-Q on-chip discrete capacitors

Electronically scannable multiplexing device

Memory and logic devices using electronically scannable multiplexing devices

Memory cell with negative differential resistance

Semiconductor device having a plurality of different layers and method therefor

Self correcting suppression of threshold voltage variation in fully depleted transistors

Semiconductor device and method for regional stress control

Method of manufacturing a field effect transistor comprising an insulating film including metal oxide having crystallinity and different in a lattice distance from semiconductor substrate

Semiconductor device and its fabrication method

EEPROM and method of manufacturing the same

Semiconductor device

Semiconductor device substrate including a single-crystalline layer and method of manufacturing semiconductor device substrate

SOI bottom pre-doping merged e-SiGe for poly height reduction

Methods of implementing and enhanced silicon-on-insulator (SOI) box structures

Three-dimensional memory devices and methods of manufacturing and operating the same

Semiconductor device

Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance

Hybrid crystal orientation CMOS structure for adaptive well biasing and for power and performance enhancement

Enhanced silicon-on-insulator (SOI) transistors and methods of making enhanced SOI transistors

SOI SRAM products with reduced floating body effect

Multiple dielectric FinFET structure and method

Semiconductor device for high voltage IC

Method of making a dual strained channel semiconductor device

Memory cell with trenched gated thyristor

High performance PFET header in hybrid orientation technology for leakage reduction in digital CMOS VLSI designs

Inverted multilayer semiconductor device assembly

Interlayer dielectric under stress for an integrated circuit

Resistor with reduced leakage

Semiconductor device

Self-aligned contacts for transistors

Method for manufacturing a semiconductor device

Method of manufacturing semiconductor device

Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same

SRAM cells having inverters and access transistors therein with vertical fin-shaped active regions

Fin-type channel transistor and method of manufacturing the same

High breakdown voltage semiconductor device and fabrication method of the same

Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device

Building fully-depleted and bulk transistors on same chip

Building fully-depleted and partially-depleted transistors on same chip

FinFET semiconductor device

Semiconductor-on-insulator (SOI) strained active areas

Semiconductor device and boost circuit

Semiconductor memory device and method of manufacturing semiconductor memory device

Method for forming an SOI structure with improved carrier mobility and ESD protection

High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods

Ballistic direct injection NROM cell on strained silicon structures

Memory device and manufacturing method the same

Methods of fabricating double-sided hemispherical silicon grain electrodes and capacitor modules

MIS-type semiconductor device

Semiconductor element and semiconductor memory device using the same

Three-dimensional memory devices

Semiconductor memory device and method of driving a semiconductor memory device

Lateral programmable polysilicon structure incorporating polysilicon blocking diode

Electrical fuse for silicon-on-insulator devices

Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuits

Semiconductor device and method for manufacturing the same

Integrated circuits and methods of forming a field effect transistor

Bottom-gate SONOS-type cell having a silicide gate

Layout structure for memory arrays with SOI devices

Semiconductor device, semiconductor element and method for producing same

Semiconductor device and method of making semiconductor devices

Method of manufacturing semiconductor device

SOI semiconductor device and method of manufacturing thereof

Simplified buried plate structure and process for semiconductor-on-insulator chip

Semiconductor integrated circuit and semiconductor integrated circuit manufacturing method

Methods of fabricating double-sided hemispherical silicon grain electrodes and capacitor modules

Method for manufacturing semiconductor elemental device forming an amorphous high dielectric film and an amorphous silicon film

Semiconductor integrated circuit and semiconductor device

Power semiconductor and method of fabrication

Nonvolatile memory and manufacturing method thereof

Semiconductor component and method of manufacture

SOI semiconductor device including a guard ring region

Methods for forming structures including strained-semiconductor-on-insulator devices

Methods for forming double gate strained-semiconductor-on-insulator device structures

Double gate strained-semiconductor-on-insulator device structures

Methods for forming strained-semiconductor-on-insulator bipolar device structures

Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices

Semiconductor device with cavity and method of manufacture thereof

Process for manufacturing a SOI wafer with improved gettering capability

Silicide gate transistors and method of manufacture

SEMICONDUCTOR DEVICE WITH MULTIPLE SEMICONDUCTOR LAYERS

Semiconductor device and method for manufacturing the same

CMOS device featuring high breakdown voltage without failure in enhancing integration thereof, and method for manufacturing such CMOS device

Semiconductor device with a gate electrode having a laminate structure

Field effect transistors with vertically oriented gate electrodes and methods for fabricating the same

Body capacitor for SOI memory description

SON MOSFET using a beam structure and method for fabricating thereof

Method of forming a semiconductor device and an optical device and structure thereof

2-transistor floating-body dram

Strained-semiconductor-on-insulator bipolar device structures

Semiconductor device and method of manufacturing the same

Method of forming an implantable electronic device chip level hermetic and biocompatible electronics package using SOI wafers

Semiconductor apparatus and MIS logic circuit

Multiple layer and crystal plane orientation semiconductor substrate

Programmable structured arrays

Hybrid type semiconductor integrated circuit and method of manufacturing the same

Capacitorless 1-transistor DRAM cell and fabrication method

Vertical body-contacted SOI transistor

A CMOS STRUCTURE FOR BODY TIES IN ULTRA-THIN SOI (UTSOI) SUBSTRATES

SRAM devices, and electronic systems comprising SRAM devices

Semiconductor device

Structure and method of integrating compound and elemental semiconductors for high-performance CMOS

Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels

Fin field effect transistor and method for manufacturing fin field effect transistor

Strained silicon devices transfer to glass for display applications

Accumulation mode multiple gate transistor

Semiconductor device, method of manufacture thereof and semiconductor integrated circuit

Fully depleted silicon-on-insulator CMOS logic

Semiconductor device and method of manufacturing the same

Semiconductor method and device with mixed orientation substrate

One-transistor random access memory technology integrated with silicon-on-insulator process

Method and structure for providing tuned leakage current in CMOS integrated circuits

Silicon-on-insulator device

Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors

Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications

Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer

ESD protection device

Semiconductor device with a cavity therein and a method of manufacturing the same

SRAM memories and microprocessors having logic portions implemented in high-performance silicon substrates and SRAM array portions having field effect transistors with linked bodies and method for making same

Semiconductor device having trench isolation for differential stress and method therefor

Semiconductor memory device and its manufacturing method

Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels

Methods of forming semiconductor constructions and integrated circuits

Method for manufacturing soi wafer

SOI structure comprising substrate contacts on both sides of the box, and method for the production of such a structure

High mobility plane FinFET with equal drive strength

Transistor structure having stressed regions of opposite types underlying channel and source/drain regions

Semiconductor device having controllable transistor threshold voltage

SOI SRAM device structure with increased W and full depletion

Memory device and method for manufacturing the same

Thin film transistor substrate, method of manufacturing the same, liquid crystal display apparatus having the same and method of manufacturing the liquid crystal display apparatus

Semiconductor device and method for manufacturing the same

Semiconductor integrated circuit

Semiconductor memory device having full depletion type logic transistors and partial depletion type memory transistors

Prevention of parasitic channel in an integrated SOI process

Methods of forming semiconductor constructions

Field programmable structured arrays

Semiconductor memory device and method of fabricating the same

Float gate memory device

Hybrid circuit and electronic device using same

Methods of forming semiconductor constructions

Double gate field effect transistor and method of manufacturing the same

MOS transistor on an SOI substrate with a body contact and a gate insulating film with variable thickness

Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a buried insulating layer

Semiconductor storage device and semiconductor integrated circuit

CMOS transistor structure including film having reduced stress by exposure to atomic oxygen

CMOS thin film transistor comprising common gate, logic device comprising the CMOS thin film transistor, and method of manufacturing the CMOS thin film transistor

Method of making empty space in silicon

Switchable circuit assemblies and semiconductor constructions

Methods of forming integrated circuits structures including epitaxial silicon layers in active regions

Memory devices, electronic systems, and methods of forming memory devices

Method of fabricating a combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI) devices

Integrated antifuse structure for FINFET and CMOS devices

Methods of forming SRAM constructions

Double silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) structures

Varactor

Methods of forming transistor constructions

Dual stressed SOI substrates

Capacitor that includes high permittivity capacitor dielectric

Semiconductor device including independent active layers and method for fabricating the same

CMOS inverter constructions

Semiconductor device and method of making semiconductor device comprising multiple stacked hybrid orientation layers

Semiconductor device and manufacturing method thereof

Semiconductor device and method of manufacturing the same

Metal oxide semiconductor (MOS) device, metal oxide semiconductor (MOS) memory device, and method of manufacturing the same

Semiconductor substrate comprising a support substrate which comprises a gettering site

Semiconductor memory device including an SOI substrate

Dual-gate device and method

Non-volatile semiconductor memory

Semiconductor device with ESD protection function and ESD protection circuit

Methods of forming hybrid fin field-effect transistor structures

Hybrid semiconductor-on-insulator structures and related methods

Semiconductor devices having self-aligned bodies and methods of forming the same

Electrically programmable fuse for silicon-on-insulator (SOI) technology

Self-aligned double gate device and method for forming same

Trench capacitor with hybrid surface orientation substrate

DRAM on SOI

Oxidation method for altering a film structure

Method of forming a semiconductor device

Method of forming a semiconductor device

Method for fabricating a semiconductor device

Gate dielectric antifuse circuits and methods for operating same

Fin device with capacitor integrated under gate electrode

Semiconductor structure and method for integrating SOI devices and bulk devices

High density memory devices having improved channel widths and cell size

Technique for forming a dielectric etch stop layer above a structure including closely spaced lines

Semiconductor device including semiconductor regions having differently strained channel regions and a method of manufacturing the same

Method for forming semiconductor device

Semiconductor device structure and method therefor

Analog switch having a minimized external flow of leakage current and switched capacitor filter incorporating the analog switch

FinFET body contact structure

Memory cell having an electrically floating body transistor and programming technique therefor

Transistor structure with dual trench for optimized stress effect and method therefor

Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device

Manufacturing method to construct semiconductor-on-insulator with conductor layer sandwiched between buried dielectric layer and semiconductor layers

Method of manufacturing semiconductor device

Semiconductor device

Semiconductor apparatus and method of manufacturing the same

Method for manufacturing a semiconductor device with reduced floating body effect

Semiconductor device, SRAM and manufacturing method of semiconductor device

Semiconductor device formed on insulating layer and method of manufacturing the same

Silicon-on-insulator chip with multiple crystal orientations

Semiconductor memory device and method for fabricating the same

Method of manufacturing a thin film transistor

Semiconductor memory and FBC memory cell driving method

Field effect transistor and production method thereof

Semiconductor storage device, its manufacturing method and operating method, and portable electronic apparatus

Semiconductor device having an SOI structure, manufacturing method thereof, and memory circuit

Isolation spacer for thin SOI devices

Integrated circuit device having non-linear active area pillars

Semiconductor device and method for forming the same

Semiconductor device having fin transistor and planar transistor and associated methods of manufacture

Method for producing vertical bipolar transistors and integrated circuit

Integrated circuit with bulk and SOI devices connected with an epitaxial region

Semiconductor substrate, method of manufacturing the same, semiconductor device, and method of manufacturing the same

Method of forming an integrated circuit structure on a hybrid crystal oriented substrate

Semiconductor device with PMOS and NMOS transistors

High density memory array having increased channel widths

Semiconductor device and manufacturing method thereof

Hybrid orientation CMOS with partial insulation process

Semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device

Silicon-on-insulator wafer having reentrant shape dielectric trenches