Integrated semiconductor storage with at least a storage cell and procedure

Semiconductor device and method for fabricating the same

Method for manufacturing semiconductor device

FinFET SRAM cell using inverted FinFET thin film transistors

Semiconductor device and method of forming a semiconductor device

Method of forming high-performance CMOS SOI devices on hybrid crystal-oriented substrates

Polysilicon conductor width measurement for 3-dimensional FETs

Semiconductor device structure with active regions having different surface directions and methods

Double-gated transistor circuit

Method of making a finFET having suppressed parasitic device characteristics

Strained finFET CMOS device structures

Multiple dielectric FinFET structure and method

Thin channel MOSFET with source/drain stressors

Memory cell arrays

CMOS logic gate fabricated on hybrid crystal orientations and method of forming thereof

Non-volatile semiconductor memory and method for fabricating a non-volatile semiconductor memory

Power semiconductor and method of fabrication

Semiconductor device and method of producing the same

Semiconductor integrated device

Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array

Semiconductor device and a method of manufacturing the same

Variable threshold transistor for the Schottky FPGA and multilevel storage cell flash arrays

Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation

Lateral programmable polysilicon structure incorporating polysilicon blocking diode

Semiconductor device including a contact connected to the body and method of manufacturing the same

Method for fabricating semiconductor device and semiconductor device

High density access transistor having increased channel width and methods of fabricating such devices

Semiconductor devices and optical semiconductor relay devices using same

Memory cell with trenched gated thyristor

In-line light sensor

Semiconductor device and method of manufacturing the same

High strain glass/glass-ceramic containing semiconductor-on-insulator structures

Formation of capacitor having a Fin structure

High-density SOI cross-point memory fabricating method

Semiconductor device and method therefore

Logic switch and circuits utilizing the switch

Three dimensional integrated circuit

Semiconductor device using SOI structure having a triple-well region

Semiconductor device and method of manufacturing the same

Sub-lithographics opening for back contact or back gate

Dual SIMOX hybrid orientation technology (HOT) substrates

Semiconductor memory device and manufacturing method of the same

Integrated circuit arrangement having capacitors and having planar transistors and fabrication method

Semiconductor integrated circuit device

Ultra-thin body super-steep retrograde well (SSRW) FET devices

Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device

Semiconductor device having a fin structure and method of manufacturing the same

Semiconductor device and manufacturing method of semiconductor device

Multiple-gate device with floating back gate

Nor-type channel-program channel-erase contactless flash memory on SOI

Semiconductor device and its manufacturing method

Control of strain in device layers by prevention of relaxation

Semiconductor device and manufacturing method therefor

SOI device having increased reliability and reduced free floating body effects

Integrated circuit with multiple spacer insulating region widths

Semiconductor device having a Schottky source/drain transistor

Control of strain in device layers by selective relaxation

Semiconductor constructions and integrated circuits

Non-volatile memory cell, memory cell arrangement and method for production of a non-volatile memory cell

Resistor element with uniform resistance being independent of process variations, semiconductor integrated circuit device having the same, and fabrication methods thereof

Semiconductor device

Nanowire device with (111) vertical sidewalls and method of fabrication

Process for making a silicon-on-insulator ledge and structures achieved thereby

Semiconductor device including insulated gate type transistor and insulated gate type capacitance having protruded portions

Technique for forming a substrate having crystalline semiconductor regions of different characteristics

Semiconductor device substrate with embedded capacitor

Methods of forming semiconductor circuitry

Semiconductor device

Silicon-on insulator (SOI) substrate having dual surface crystallographic orientations and method of forming same

Integrated SOI fingered decoupling capacitor

Reducing the dielectric constant of a portion of a gate dielectric

Semiconductor memory device

Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same

Vertical SOI Device

Integration of strained Ge into advanced CMOS technology

Strained-semiconductor-on-insulator finFET device structures

Backside body contact

Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers

Semiconductor storage device, manufacturing method therefor and portable electronic equipment

Semiconductor device

Memory cell using silicon carbide

Mixed orientation and mixed material semiconductor-on-insulator wafer

Semiconductor memory

SOI chip with recess-resistant buried insulator and method of manufacturing the same

Semiconductor device and method of manufacturing same

Semiconductor device

Semiconductor device with multiple semiconductor layers

Separately strained N-channel and P-channel transistors

Method and structure for providing tuned leakage current in CMOS integrated circuit

Integrated circuit having pairs of parallel complementary FinFETs

Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement

Semiconductor device and method for manufacturing semiconductor device

Semiconductor device

Semiconductor device and manufacturing method thereof

Semiconductor device

Semiconductor substrate and semiconductor circuit formed therein and fabrication methods

Integrated field-effect transistor comprising two control regions, use of said field-effect transistor and method for producing the same

Semiconductor device and method for manufacturing the same

Strained Si on multiple materials for bulk or SOI substrates

Partial replacement silicide gate

Ferroelectric memory and method of fabricating the same

Memory devices and electronic systems comprising thyristors

SOI circuit having reduced crosstalk interference and a method for forming the same

Structure and method for extraction of parasitic junction capacitance in deep submicron technology

Field-shielded SOI-MOS structure free from floating body effects, and method of fabrication therefor

Field effect transistor (FET) devices and methods of manufacturing FET devices

Apparatus and method for multiple-gate semiconductor device with angled sidewalls

Semiconductor device and method of manufacturing the same

Semiconductor device and manufacturing method thereof

Method of forming SOI-like structure in a bulk semiconductor substrate using self-organized atomic migration

Semiconductor device and method of fabricating the same

Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection

SOI-type semiconductor device, and production method for manufacturing such SOI-type semiconductor device

Method of manufacturing an integrated circuit including capacitor with high permittivity capacitor dielectric

Transistor constructions and electronic devices

Ballistic direct injection NROM cell on strained silicon structures

Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer

Method for making a semiconductor structure using silicon germanium

Semiconductor substrate, semiconductor device, and manufacturing methods for them

Field-effect-transistor multiplexing/demultiplexing architectures and methods of forming the same

MOSFET with electrostatic discharge protection structure and method of fabrication

Fully depleted SOI multiple threshold voltage application

Method for manufacturing partial SOI substrates

Semiconductor memories

Strained silicon CMOS on hybrid crystal orientations

Dislocation free stressed channels in bulk silicon and SOI CMOS devices by gate stress engineering

CMOS-compatible integration of silicon-based optical devices with electronic devices

Strained channel on insulator device

Semiconductor device and method of manufacturing the same

Writing to ferroelectric memory devices

Semiconductor device

Thin film device, integrated circuit, electrooptic device, and electronic device

Methods of forming CMOS integrated circuit devices and substrates having buried silicon germanium layers therein

Non-volatile memory devices

Method for creating a self-aligned SOI diode by removing a polysilicon gate during processing

Master chip, semiconductor memory, and method for manufacturing semiconductor memory

Methods of making semiconductor-on-insulator thin film transistor constructions

Connection structure for SOI devices

High mobility plane CMOS SOI

Strained-semiconductor-on-insulator device structures with elevated source/drain regions

Method for making a FET channel

Method for reducing a short channel effect for NMOS devices in SOI circuits

Methods of forming complementary metal oxide semiconductor (CMOS) transistors having three-dimensional channel regions therein

Method and structure for buried circuits and devices

Method to make markers for double gate SOI processing

Method of fabricating an electrical fuse for silicon-on-insulator devices

Semiconductor device

Writing to ferroelectric memory devices

Techniques to reduce substrate cross talk on mixed signal and RF circuit design

Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes

Semiconductor device and method of manufacturing the same

Semiconductor device with structure for improving breakdown voltage

Phase change memory cell on silicon-on insulator substrate

Multiple dielectric finfet structure and method

Semiconductor device and method of manufacture the same

Strained germanium-on-insulator device structures

Strained-channel Fin field effect transistor (FET) with a uniform channel thickness and separate gates

SOI CMOS device with reduced DIBL

Silicon-on-insulator active pixel sensors

Semiconductor substrate, manufacturing method therefor, and semiconductor device

Gain cell type non-volatile memory having charge accumulating region charges or discharged by channel current from a thin film channel path

Silicon-on-insulator (SOI) substrate having dual surface crystallographic orientations and method of forming same

High-performance CMOS SOI devices on hybrid crystal-oriented substrates

Semiconductor device and method for fabricating the same

Semiconductor device and method for manufacturing semiconductor device

CMOS circuit including double-insulated-gate field-effect transistors

Double gate field effect transistor with diamond film

Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain

Circuit system for a battery electronic control unit

Semiconductor device and manufacturing method of the same

Insulated gate transistor

Field effect transistor and a method for manufacturing the same

Semiconductor device and method of manufacturing the same

Nanotube films and articles

Folded bit line DRAM with vertical ultra thin body transistors

Integrated circuit with multiple spacer insulating region widths

Semiconductor device and method of manufacturing the same

Strained-semiconductor-on-insulator device structures

High-density NROM-FINFET

Semiconductor integrated circuit and method of manufacturing the same

Integrated capacitor assembly

High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof

Semiconductor device and method of manufacturing the same

Transistor and logic circuit on thin silicon-on-insulator wafers based on gate induced drain leakage currents

Semiconductor structure having strained semiconductor and method therefor

Nor-type channel-program channel-erase contactless flash memory on SOI

Semiconductor memory device, semiconductor device, and method for production thereof

Semiconductor memory device and method of operating same

Self-aligned body tie for a partially depleted SOI device structure

Method of producing active semiconductor layers of different thicknesses in an SOI wafer

Structure and method for local resistor element in integrated circuit technology

Semiconductor device including a transistor and a capacitor having an aligned transistor and capacitive element

Semiconductor device and manufacturing method thereof

Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same

Methods and structures for planar and multiple-gate transistors formed on SOI

Thyristor-based SRAM

Selective silicon-on-insulator isolation structure and method

Ultra thin channel MOSFET

Optical waveguide circuit including passive optical waveguide device combined with active optical waveguide device, and method for making same

Non-volatile multibit memory cell and method of manufacturing thereof

Low cost dielectric isolation method for integration of vertical power MOSFET and lateral driver devices

Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions

Method for the production of a memory cell, memory cell and memory cell arrangement

Semiconductor memory device and method of operating same

Ic card

Strained channel transistor and methods of manufacture

Semiconductor device with raised segment

Methods of forming strained-semiconductor-on-insulator device structures

Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer

Semiconductor device, method of manufacturing same and method of designing same

Silicide gate transistors and method of manufacture

Examination apparatus for biological sample and chemical sample

Method of forming fin field effect transistor

Process for controlling performance characteristics of a negative differential resistance (NDR) device

Semiconductor switch

Discriminative SOI with oxide holes underneath DC source/drain

Reduction of chemical mechanical planarization (CMP) scratches with sacrificial dielectric polish stop

Method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications

Method for scalable, low-cost polysilicon capacitor in a planar DRAM

CMOS device with metal and silicide gate electrodes and a method for making it

Flash memory cell and fabrication method

Method of forming connection and anti-fuse in layered substrate such as SOI

Methods for manufacturing SOI substrate using wafer bonding and complementary high voltage bipolar transistor using the SOI substrate

Semiconductor device and method of manufacturing same

SOI MOSFET with multi-sided source/drain silicide

Memory having a vertical transistor

Methods of forming switchable circuit devices

Semiconductor device and method for fabricating the same

MOSFET performance improvement using deformation in SOI structure

Method of preventing semiconductor layers from bending and semiconductor device formed thereby

Dual-gate transistor device and method of forming a dual-gate transistor device

Semiconductor memory device for dynamically storing data with channel body of transistor used as storage node

Strained dislocation-free channels for CMOS and method of manufacture

NMOS device formed on SOI substrate and method of fabricating the same

Semiconductor device and manufacturing method therefor

Semiconductor device and method for fabricating the same

Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Integrated circuit memory cells and methods of forming

Methods of forming memory cells

Floating body cell dynamic random access memory with optimized body geometry

Body contact formation in partially depleted silicon on insulator device

Shallow trench isolation fill by liquid phase deposition of SiO2

Method for manufacturing semiconductor device

Metal oxide semiconductor (MOS) transistor including a planarized material layer and method of fabricating the same

EEPROM device with substrate hot-electron injector for low-power programming

Integrated circuit with reduced body effect sensitivity

Semiconductor device

Body contact layout for semiconductor-on-insulator devices

Method of forming self-aligned poly for embedded flash

Semiconductor device having substantially planar contacts and body

Ultra-thin Si channel CMOS with improved series resistance

Oxide/nitride stacked in FinFET spacer process

Selfaligned source/drain FinFET process flow

Programmable structured arrays

Semiconductor device having patterned SOI structure and method for fabricating the same

Insulated-gate field-effect thin film transistors

Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same

FinFET SRAM cell using low mobility plane for cell stability and method for forming

Methods of fabricating semiconductor-on-insulator (SOI) substrates and semiconductor devices using sacrificial layers and void spaces

Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers

Semiconductor substrate and method for fabricating the same

Semiconductor device having SOI construction

Semiconductor apparatus and method of manufacturing the semiconductor apparatus

Method of forming field effect transistor and structure formed thereby

Semiconductor device including transistors formed in semiconductor layer having single-crystal structure isolated from substrate

Method for manufacturing a semiconductor device

Semiconductor device and method of manufacturing the same

Method of forming ladder-type gate structure for four-terminal SOI semiconductor device

Silicon device on Si:C-OI and SGOI and method of manufacture

High-density split-gate FinFET

High temperature imaging device

Methods of nanotubes films and articles

SOI chip with mesa isolation and recess resistant regions

Semiconductor device having a trench isolation and method of fabricating the same

Semiconductor memory device and its production process

Transistor structure with thick recessed source/drain structures and fabrication process of same

Semiconductor integrated circuit

Semiconductor integrated circuit

Methods for machine detection of at least one aspect of an object, methods for machine identification of a person, and methods of forming electronic systems

Wafer, semiconductor device, and fabrication methods therefor

Systems and methods for integration of heterogeneous circuit devices

Semiconductor-on-insulator chip with<100>-oriented transistors

Oxidation method for altering a film structure and CMOS transistor structure formed therewith

Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors

Semiconductor device using partial SOI substrate and manufacturing method thereof

Semiconductor integrated circuit device

SOI component with increased dielectric strength and improved heat dissipation

Semiconductor device and manufacturing method of semiconductor device

Field effect transistor and manufacturing method thereof

Semiconductor device and method for fabricating the same

Method and manufacture of thin silicon on insulator (SOI) with recessed channel

Strained Si/SiGe/SOI islands and processes of making same

Semiconductor device formed on (111) surface of a Si crystal and fabrication process thereof

Fully-depleted-collector silicon-on-insulator (SOI) bipolar transistor useful alone or in SOI BiCMOS

Semiconductor device including a capacitance

Semiconductor device and fabrication method for the same

Process integration of SOI FETs with active layer spacer

Method of manufacturing strained dislocation-free channels for CMOS

Semiconductor memory device having full depletive type logic transistors and partial depletion type memory transistors