208009 ⎘
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Backside device contact
#1202Backside device contact
#1203Semiconductor devices with sidewall spacers of equal thickness
#1204INTEGRATED CIRCUIT COMPRISING MOS TRANSISTORS AND METHOD OF MANUFACTURING THE SAME
#1205Semiconductor switch
#1206Protection schemes for MEMS switch devices
#1207Metal trench capacitor and improved isolation and methods of manufacture
#1208Integrated circuit including balanced cells limiting an active area
#1209Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
#1210High aspect ratio channel semiconductor device and method of manufacturing same
#1211FDSOI channel control by implanted high-K buried oxide
#1212Wafer level integration including design/co-design, structure process, equipment stress management, and thermal management
#1213Radio-frequency isolation using cavity formed in interface layer
#1214Semiconductor device, electrical device system, and method of producing semiconductor device
#1215Cavity formation using sacrificial material
#1216Display device
#1217Conductive contacts in semiconductor on insulator substrate
#1218Memory device and method for manufacturing the same
#1219Self-aligned transistors for dual-side processing
#1220Utilization of backside silicidation to form dual side contacted capacitor
#1221Semiconductor device
#1222Method and structure for forming a dense array of single crystalline semiconductor nanocrystals
#1223Method and system for a photonic interposer
#1224Method for late differential SOI thinning for improved FDSOI performance and HCI optimization
#1225Tunable breakdown voltage RF FET devices
#1226SEMICONDUCTOR DEVICES INCLUDING TRAP RICH LAYER REGIONS
#1227Semiconductor device and method of manufacturing the same
#12283D IC semiconductor device and structure with stacked memory
#1229Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#1230Semiconductor devices with sidewall spacers of equal thickness
#1231Copper interconnect for improving radio frequency (RF) silicon-on-insulator (SOI) switch field effect transistor (FET) stacks
#1232Semi-sequential 3D integration
#1233Backside contact to a final substrate
#1234Backside contact to a final substrate
#1235POROUS SEMICONDUCTOR LAYER TRANSFER FOR AN INTEGRATED CIRCUIT STRUCTURE
#1236Display apparatus and method of manufacturing the same
#1237Double balanced mixer
#1238Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink—harmonic wrinkle reduction
#1239Display device
#1240Display device
#1241Stacked SOI lateral bipolar transistor RF power amplifier and driver
#1242Vertical field effect transistor including integrated antifuse
#1243Vertical field effect transistor including integrated antifuse
#1244Semiconductor device structure with self-aligned capacitor device
#1245Substrate contact land for an MOS transistor in an SOI substrate, in particular an FDSOI substrate
#1246Semiconductor devices on two sides of an isolation layer
#1247Manufacture method of low temperature poly-silicon TFT substrate and low temperature poly-silicon TFT substrate
#1248NVM device in SOI technology and method of fabricating an according device
#1249System on chip fully-depleted silicon on insulator with RF and MM-wave integrated functions
#1250System on chip fully-depleted silicon on insulator with rf and mm-wave integrated functions
#1251Integrated circuits with Peltier cooling provided by back-end wiring
#1252RADIO-FREQUENCY SWITCH WITHOUT NEGATIVE VOLTAGES
#1253Method of manufacturing a semiconductor device
#1254Back-side illuminated pixel
#1255Lateral bipolar junction transistor with multiple base lengths
#1256Stack device having voltage compensation
#1257Semiconductor device
#1258Air gap spacer implant for NZG reliability fix
#1259Thermally stable charge trapping layer for use in manufacture of semiconductor-on-insulator structures
#1260Germanium lateral bipolar transistor with silicon passivation
#1261Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
#1262Backside contact to a final substrate
#1263Systems and methods for in vivo detection of electrophysiological and electrochemical signals
#1264On-chip DC-DC power converters with fully integrated GaN power switches, silicon CMOS transistors and magnetic inductors
#1265Three dimensional monolithic LDMOS transistor
#1266Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
#1267Nonvolatile nanotube switches and systems using same
#1268Manufacturing method of semiconductor device and semiconductor device
#1269Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)
#1270Voltage distribution in transistor stacks using non-uniform transistor dimensions
#1271Semiconductor device and manufacturing method of the same
#1272Semiconductor device and monolithic semiconductor device including a power semiconductor device and a control circuit
#1273Anti-fuses memory cell and memory apparatus
#1274FINFET having a gate structure in a trench feature in a bent fin
#1275Surface devices within a vertical power device
#1276Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dial raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI
#1277Image sensor with vertical electrodes
#1278Method for producing pillar-shaped semiconductor device
#1279METHODS, APPARATUS AND SYSTEM FOR PROVIDING NMOS-ONLY MEMORY CELLS
#1280Method of making a fully depleted semiconductor-on-insulator programmable cell and structure thereof
#1281ESD protection structure
#1282Systems and methods for thermal conduction using S-contacts
#1283Thermally conductive and electrically isolating layers in semiconductor structures
#1284Structure and method to prevent EPI short between trenches in FinFET eDRAM
#1285SEMICONDUCTOR DEVICE, MANUFACTURING METHOD, AND CONDUCTIVE POST
#1286Semiconductor memory having both volatile and non-volatile functionality and method of operating
#1287Semiconductor device
#1288Test of stacked transistors
#1289Integrated circuits with capacitors and methods for producing the same
#1290Approach for an area-efficient and scalable CMOS performance based on advanced silicon-on-insulator (SOI), silicon-on-sapphire (SOS) and silicon-on-nothing (SON) technologies
#1291Semiconductor device
#1292Display substrate, manufacturing method thereof and display device
#1293Integrated circuits with capacitors and methods for producing the same
#1294Method for producing on the same transistors substrate having different characteristics
#1295Method for patterning a thin film
#1296Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device
#1297Semiconductor device
#1298Double sided NMOS/PMOS structure and methods of forming the same
#1299Radio-frequency switch having dynamic gate bias resistance, body contact, and compensation circuit
#1300Method to form strained channel in thin box SOI structures by elastic strain relaxation of the substrate
#1301Methods for forming integrated circuits that include a dummy gate structure
#1302Method for forming a PN junction and associated semiconductor device
#1303Method for the formation of transistors PDSO1 and FDSO1 on a same substrate
#1304Method for manufacturing a bonded SOI wafer
#1305Embedded temperature control system for a biosensor
#1306HIGH-VOLTAGE TRANSISTOR DEVICE
#1307Floating body contact circuit method for improving ESD performance and switching speed
#1308S-contact for SOI
#1309Semiconductor structure with integrated passive structures
#1310GATE PROTECTION FOR HV-STRESS APPLICATION
#1311Nanofluid sensor with real-time spatial sensing
#1312Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI
#1313FinFETs having dielectric punch-through stoppers
#1314Integrated circuits with deep and ultra shallow trench isolations and methods for fabricating the same
#1315Semiconductor device
#1316Vertical system integration
#1317Air gap over transistor gate and related method
#1318Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding
#1319Method, apparatus and system for back gate biasing for FD-SOI devices
#1320SOI WAFERS AND DEVICES WITH BURIED STRESSOR
#1321Group III-N transistor on nanoscale template structures
#1322Semiconductor film with adhesion layer and method for forming the same
#1323CMOS compatible BioFET
#1324Semiconductor device having a channel region patterned into a ridge by adjacent gate trenches
#1325Integrated circuits with selectively strained device regions and methods for fabricating same
#1326Semiconductor device with inductively coupled coils
#1327Commonly-bodied field-effect transistors
#1328Lateral MOSFET with dielectric isolation trench
#1329METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#1330Engineered substrate including light emitting diode and power circuitry
#1331Tunable capacitor for FDSOI applications
#1332Systems and Methods for a Semiconductor Structure Having Multiple Semiconductor-Device Layers
#1333Semiconductor device and fabricating the same
#1334Switchable die seal connection
#1335Flipped vertical field-effect-transistor
#1336Semiconductor device with silicon layer containing carbon
#1337RF electronic circuit comprising cavities buried under RF electronic components of the circuit
#1338Transistor with controlled overlap of access regions
#1339Display apparatus
#1340Fabrication of semiconductor structures
#1341Double balanced mixer
#1342Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate
#1343Aluminum nitride based Silicon-on-Insulator substrate structure
#1344Semiconductor structure including a trench capping layer
#1345VARIABLE BURIED OXIDE THICKNESS FOR SILICON-ON-INSULATOR DEVICES
#1346Semiconductor device and manufacturing method thereof
#1347Multi-finger devices in mutliple-gate-contacted-pitch, integrated structures
#1348Semiconductor structure including a transistor including a gate electrode region provided in a substrate and method for the formation thereof
#1349VARIABLE HANDLE WAFER RESISTIVITY FOR SILICON-ON-INSULATOR DEVICES
#1350Non-symmetric body contacts for field-effect transistors
#1351Body contacts for field-effect transistors
#1352Semiconductor device and manufacturing method thereof
#1353Silicon on nothing devices and methods of formation thereof
#1354Front-Side Imager Having a Reduced Dark Current on a SOI Substrate
#1355Inline monitoring of transistor-to-transistor critical dimension
#1356Silicon-on-plastic semiconductor device with interfacial adhesion layer
#1357Method and apparatus for optical waveguide-to-semiconductor coupling for integrated photonic circuits
#1358FDSOI with on-chip physically unclonable function
#1359Semiconductor device and manufacturing method thereof
#1360SOI substrate and manufacturing method thereof
#1361Field-effect transistors with a non-relaxed strained channel
#1362SOI integrated circuit equipped with a device for protecting against electrostatic discharges
#1363SOI SUBSTRATE AND MANUFACTURING METHOD THEREOF
#1364Transistor layout with low aspect ratio
#1365METHOD FOR MANUFACTURING A TRANSISTOR HAVING A SHARP JUNCTION BY FORMING RAISED SOURCE-DRAIN REGIONS BEFORE FORMING GATE REGIONS AND CORRESPONDING TRANSISTOR PRODUCED BY SAID METHOD
#1366LAYOUT STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT
#1367Electronic device including moat power metallization in trench
#1368High-sensitivity electronic detector
#1369Reducing antenna effects in SOI devices
#1370LAYOUT STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT
#1371Vertical semiconductor device with thinned substrate
#1372Methods of forming field effect transistor (FET) and non-FET circuit elements on a semiconductor-on-insulator substrate
#1373Method and apparatus improving gate oxide reliability by controlling accumulated charge
#1374ESD protection device with buried layer having variable doping concentrations
#1375Semiconductor device including a high-electron-mobility transistor (HEMT) and method for manufacturing the same
#1376Third type of metal gate stack for CMOS devices
#1377Method and structure for forming on-chip anti-fuse with reduced breakdown voltage
#1378Semiconductor structure and fabrication method thereof
#1379Hybrid ETSOI structure to minimize noise coupling from TSV
#1380Fabricating a dual gate stack of a CMOS structure
#1381Method for forming a semiconductor structure containing high mobility semiconductor channel materials
#1382ELECTRONIC CONTROL DEVICE
#1383Semiconductor device, semiconductor wafer, module, electronic device, and manufacturing method thereof
#1384Manufacturing method of semiconductor device and semiconductor device
#1385Method for forming a semiconductor structure containing high mobility semiconductor channel materials
#13863D semiconductor device and system
#1387Method of localized modification of the stresses in a substrate of the SOI type, in particular FD SOI type, and corresponding device
#1388Semiconductor switch
#1389Semiconductor device including write access transistor whose oxide semiconductor layer including channel formation region
#1390Field-effect transistors having black phosphorus channel and methods of making the same
#1391Superlattice materials and applications
#1392Connection structure for vertical gate all around (VGAA) devices on semiconductor on insulator (SOI) substrate
#1393Single-poly nonvolatile memory cell structure having an erase device
#1394Nonvolatile memory structure
#1395Electrostatic protective device and electrostatic protective circuit
#1396Monolithic integration of antenna switch and diplexer
#1397Switching system and method
#1398Semiconductor device and fabricating method thereof
#1399Method of manufacturing a substrate
#1400Integrated circuit with resurf region biasing under buried insulator layers
#1401Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures
#1402LOW-NOISE MOS TRANSISTORS AND CORRESPONDING CIRCUIT
#1403Apparatus and methods for electrical overstress protection
#1404Feed-forward circuit to improve intermodulation distortion performance of radio-frequency switch
#1405VERTICAL SUPER-THIN BODY SEMICONDUCTOR ON DIELECTRIC WALL DEVICES AND METHODS OF THEIR FABRICATION
#1406Back-side illuminated pixel
#14073D semiconductor memory device and structure
#1408Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
#1409Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
#1410Method of manufacturing semiconductor device reducing variation in thickness of silicon layer among semiconductor wafers
#1411Method to form strained nFET and strained pFET nanowires on a same substrate
#1412ULTRASOUND T/R ISOLTATION DISOLATOR WITH FAST RECOVERY TIME ON SOI
#1413Semiconductor device
#1414Structure and method for fully depleted silicon on insulator structure for threshold voltage modification
#1415Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region
#1416Semiconductor integrated circuit device and wearable device
#1417Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#1418Hybrid circuit including a tunnel field-effect transistor
#1419Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#1420Channel silicon germanium formation method
#1421S-contact for SOI
#1422Charge pump circuit for providing multiplied voltage
#1423Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
#1424Semiconductor device with isolated body portion
#1425Radio frequency isolation for SOI transistors
#1426Raised e-fuse
#1427Method of fabricating anti-fuse for silicon on insulator devices
#1428SEMICONDUCTOR DEVICE
#1429Butted body contact for SOI transistor
#1430Radiation-hard electronic device and method for protecting an electronic device from ionizing radiation
#1431Semiconductor device
#1432Semiconductor device with low band-to-band tunneling
#1433Silicon and silicon germanium nanowire structures
#1434Semiconductor integrated circuit
#1435Method for producing one-time-programmable memory cells and corresponding integrated circuit
#1436CMOS nanowire structure
#1437High density vertically integrated FEOL MIM capacitor
#1438Substrate having two semiconductor materials on insulator
#1439Integrated level shifter circuit
#1440Method of manufacturing a device with MOS transistors
#1441Semiconductor device including transistor with back gate, and memory device including the semiconductor device
#1442Methods of forming strained-semiconductor-on-insulator device structures
#1443Complementary SOI lateral bipolar transistors with backplate bias
#1444Radio-frequency isolation using front side opening
#1445Contacting SOI subsrates
#1446Integrated circuits (ICs) on a glass substrate
#1447Semiconductor device and manufacturing method thereof
#1448Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)
#1449Highly scaled tunnel FET with tight pitch and method to fabricate same
#1450Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)
#1451Method for forming deep trench spacing isolation for CMOS image sensors
#1452Semiconductor device with reduced poly spacing effect
#1453SUBSTRATE-TRANSFERRED, DEEP TRENCH ISOLATION SILICON-ON-INSULATOR (SOI) SEMICONDUCTOR DEVICES FORMED FROM BULK SEMICONDUCTOR WAFERS
#1454Dense arrays and charge storage devices
#1455Layout structure for electrostatic discharge protection
#1456Integrated circuits (ICS) on a glass substrate
#1457Highly scaled tunnel FET with tight pitch and method to fabricate same
#1458Field-effect transistor, and memory and semiconductor circuit including the same
#1459SiGe CMOS with tensely strained NFET and compressively strained PFET
#1460Composite substrate
#1461Backside coupled symmetric varactor structure
#1462Integrated circuit composed of tunnel field-effect transistors and method for manufacturing same
#1463Method, apparatus and system for using hybrid library track design for SOI technology
#1464Complementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxial semiconductor material formed using lateral overgrowth
#1465MOTFT with un-patterned etch-stop
#1466Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
#1467Semiconductor device, method of manufacturing semiconductor device, and antenna switch module
#1468Detection of gate-to-source/drain shorts
#1469Techniques for dual dielectric thickness for a nanowire CMOS technology using oxygen growth
#1470ELECTRICAL GATE-TO-SOURCE/DRAIN CONNECTION
#1471Raised e-fuse
#1472Non-uniform spacing in transistor stacks
#1473Circuit device
#1474Semiconductor Device With Self-Aligned Back Side Features
#1475Semiconductor device with surrounding gate transistors in a NAND circuit
#1476Static electricity protection circuit, electro-optic device and electronic device
#1477Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
#1478Method and structure for forming on-chip anti-fuse with reduced breakdown voltage
#1479Method for evaluating SOI substrate
#1480Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device
#1481Approach for an area-efficient and scalable CMOS performance based on advanced Silicon-On-Insulator (SOI), Silicon-On-Sapphire (SOS) and Silicon-On-Nothing (SON) technologies
#1482BULEX contacts in advanced FDSOI techniques
#1483Semiconductor device and method of fabricating the same
#1484Semiconductor device and manufacturing method of the same
#1485Semiconductor device and manufacturing method thereof
#1486Semiconductor device for radio frequency switch, radio frequency switch, and radio frequency module
#1487Memory device, semiconductor device, and electronic device
#1488Multi-threshold voltage field effect transistor and manufacturing method thereof
#1489Method of manufacture for a semiconductor device
#1490Semiconductor memory having both volatile and non-volatile functionality
#1491Semiconductor device, electrical device system, and method of producing semiconductor device
#1492Semiconductor structures with deep trench capacitor and methods of manufacture
#1493Transistors having offset contacts for reduced off capacitance
#1494CMOS compatible BioFET
#1495Method of manufacturing a semiconductor device to prevent occurrence of short-channel characteristics and parasitic capacitance
#1496SOI-based semiconductor device with dynamic threshold voltage
#1497Method of manufacturing image sensor including nanostructure color filter
#1498Backside contact to a final substrate
#1499Substrate contact land for an MOS transistor in an SOI substrate, in particular an FDSOI substrate
#1500Semiconductor devices with sidewall spacers of equal thickness