Junction butting in SOI transistor with embedded source/drain

Methods of containing defects for non-silicon device engineering

Flexible, stretchable electronic devices

Handle wafer for high resistivity trap-rich SOI

Methodology to avoid gate stress for low voltage devices in FDSOI technology

MOSFET with work function adjusted metal backgate

Embedded Memory Device With Silicon-On-Insulator Substrate, And Method Of Making Same

Quasi-nanowire transistor and method of manufacturing the same

Complementary metal-oxide-semiconductor structure with III-V and silicon germanium transistors on insulator

Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer

Silicon-on-insulator heat sink

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Third type of metal gate stack for CMOS devices

High speed bipolar junction transistor for high voltage applications

Semiconductor-on-insulator with back side support layer

Semiconductor devices and methods providing non-linear compensation of field-effect transistors

Methods for forming semiconductor device structures

Boron rich nitride cap for total ionizing dose mitigation in SOI devices

Very planar gate cut post replacement gate process

Methods for wafer bonding, and for nucleating bonding nanophases

Pseudo-substrate with improved efficiency of usage of single crystal material

Semiconductor device including groups of nanowires of different semiconductor materials and related methods

Diode biased body contacted transistor

Junction field-effect floating gate memory switch with thin tunnel insulator

CMOS transistors including gate spacers of the same thickness

Wiring structure for trench fuse component with methods of fabrication

On-chip diode with fully depleted semicondutor devices

Handle substrates of composite substrates for semiconductors

Flexible active matrix circuits for interfacing with biological tissue

ISOLATION METHODS FOR LEAKAGE, LOSS AND NON-LINEARITY MITIGATION IN RADIO-FREQUENCY INTEGRATED CIRCUITS ON HIGH-RESISTIVITY SILICON-ON-INSULATOR SUBSTRATES

Monolithically integrated CMOS and acoustic wave device

Reduced threshold voltage-width dependency in transistors comprising high-K metal gate electrode structures

MOSFET with work function adjusted metal backgate

Matching of transistors

Deep trench capacitor

SOI SRAM having well regions with opposite conductivity

High dose implantation for ultrathin semiconductor-on-insulator substrates

Barrier trench structure and methods of manufacture

Integrated passive devices for finFET technologies

Semiconductor device and method of manufacturing the same

Integrated circuit and manufacturing method thereof

STRUCTURE AND PROCESS TO DECOUPLE DEEP TRENCH CAPACITORS AND WELL ISOLATION

Electronic device for ESD protection

Electronic device and protection circuit

Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer

Hybrid fin field-effect transistor structures and related methods

Semiconductor device and method for forming the same

Apparatus and methods for variable capacitor arrays

Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs

Semiconductor device structure and method of forming

Semiconductor device

Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device

Semiconductor die, integrated circuits and driver circuits, and methods of maufacturing the same

Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming

Multi-plasma nitridation process for a gate dielectric

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Method for forming deep trench isolation for RF devices on SOI

Semiconductor device having a closed cavity structure and method of manufacturing the same

Three-dimensional non-volatile memory

Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making

Silicon-on-insulator substrate and method of manufacturing thereof

Temperature stabilized circuitry

SOI lateral bipolar transistors having surrounding extrinsic base portions

Area efficient field effect device

Method for producing strained semi-conductor blocks on the insulating layer of a semi-conductor on insulator substrate

Heterogeneous semiconductor material integration techniques

Floating body memory cell having gates favoring different conductivity type regions

Semiconductor structures including fluidic microchannels for cooling and related methods

Semiconductor structure with TRL and handle wafer cavities

Handle Substrates of Composite Substrates for Semiconductors

Multi-plasma nitridation process for a gate dielectric

Defective P-N junction for backgated fully depleted silicon on insulator mosfet

Linearity performance for radio-frequency switches

CMOS FABRICATION OF A THIN-FILM BULK ACOUSTIC RESONATOR

Method for manufacturing a semiconductor on insulator structure having low electrical losses

Devices and methods related to radio-frequency switches having improved on-resistance performance

Radio-frequency switching devices having improved voltage handling capability

Antifuse cell comprising program transistor and select transistor arranged on opposite sides of semiconductor layer

CMOS DEVICES WITH STRESSED CHANNEL REGIONS, AND METHODS FOR FABRICATING THE SAME

Semiconductor device and method of manufacturing the same

Pattern factor dependency alleviation for eDRAM and logic devices with disposable fill to ease deep trench integration with fins

Low power die

SEMICONDUCTOR SUBSTRATE WITH MULTIPLE SiGe REGIONS HAVING DIFFERENT GERMANIUM CONCENTRATIONS BY A SINGLE EPITAXY PROCESS

Semiconductor device having semiconductor layers with different thicknesses

Composite substrate

Techniques for providing a semiconductor memory device

Method for producing a strained semiconductor on insulator substrate

Switching device having a discharge circuit for improved intermodulation distortion performance

Deep trench MIM capacitor and moat isolation with epitaxial semiconductor wafer scheme

Circuit and method for improving ESD tolerance and switching speed

FDSOI semiconductor structure and method for manufacturing the same

RF SOI switch with backside cavity and the method to form it

Methods of forming semiconductor structures

CMOS with dual raised source and drain for NMOS and PMOS

CMOS with dual raised source and drain for NMOS and PMOS

Current source array

Integrated circuit assembly with faraday cage

Semiconductor device and manufacturing method thereof

Floating Body Contact Circuit Method for Improving ESD Performance and Switching Speed

Insulation wall between transistors on SOI

Semiconductor device and method of manufacturing the same

Semiconductor device, integrated circuit and method of forming a semiconductor device

Semiconductor structures including bodies of semiconductor material and methods of forming same

CMOS with dual raised source and drain for NMOS and PMOS

Method of manufacturing semiconductor device

Semiconductor structures including an integrated FinFET with deep trench capacitor and methods of manufacture

Non-volatile memory device employing semiconductor nanoparticles

Apparatus and methods for variable capacitor arrays

Semiconductor device comprising epitaxially grown semiconductor material and an air gap

DUAL GATE FD-SOI TRANSISTOR

Devices and methods related to radio-frequency switches having reduced-resistance metal layout

Bridging local semiconductor interconnects

Semiconductor device

Method for manufacturing semiconductor device including a MOS-type transistor

Semiconductor device with an integrated heat sink array

Flexible, stretchable electronic devices

Systems and methods for a semiconductor structure having multiple semiconductor-device layers

Systems and methods for a semiconductor structure having multiple semiconductor-device layers

Strained semiconductor device and method of making the same

Semiconductor device with heat sinks

NON-VOLATILE MEMORY DEVICE INTEGRATED WITH CMOS SOI FET ON A SINGLE CHIP

Self aligned semiconductor device and structure

Method of stressing a semiconductor layer

Method of forming stressed semiconductor layer

Extended-drain MOS transistor in a thin film on insulator

Silicon-on-plastic semiconductor device and method of making the same

Mechanisms for forming radio frequency (RF) area of integrated circuit structure

Self-protected metal-oxide-semiconductor field-effect transistor

Anisotropic dielectric material gate spacer for a field effect transistor

Method of manufacturing a misfet on an SOI substrate

Anisotropic dielectric material gate spacer for a field effect transistor

Method for fabricating NMOS and PMOS transistors on a substrate of the SOI, in particular FDSOI, type and corresponding integrated circuit

Methods for forming a self-aligned maskless junction butting for integrated circuits

Group III-N transistor on nanoscale template structures

Semiconductor film with adhesion layer and method for forming the same

Semiconductor device using Ge channel and manufacturing method thereof

Semiconductor-on-insulator (SOI) device and related methods for making same using non-oxidizing thermal treatment

Vertical semiconductor device with thinned substrate

Method of making a semiconductor device using trench isolation regions to maintain channel stress

Semiconductor device including SOI butted junction to reduce short-channel penalty

Semiconductor device with relaxation reduction liner and associated methods

Semiconductor device and method for manufacturing the same

Dynamic threshold MOS and methods of forming the same

SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Overvoltage protection components in an optoelectronic circuit on SOI

Test circuit for testing signal receiving unit, image pickup apparatus, method of testing signal receiving unit, and method of testing image pickup apparatus

Programmable structured arrays

Semiconductor structure and method for manufacturing the same

Multi-threshold circuitry based on silicon-on-insulator technology

Method of forming different voltage devices with high-K metal gate

Semiconductor-on-insulator with back side strain topology

Semiconductor structure with deep trench thermal conduction

On-SOI integrated circuit equipped with a device for protecting against electrostatic discharges

Semi-conductor device with epitaxial source/drain facetting provided at the gate edge

Semiconductor device and method of manufacturing the same

Semiconductor device with transistor in semiconductor subtrate and insulated contact plug extending trough the substrate

Semiconductor device having diffusion barrier to reduce back channel leakage

Strain engineering in semiconductor devices by using a piezoelectric material

Semiconductor structure with deep trench thermal conduction

Epitaxial semiconductor resistor with semiconductor structures on same substrate

Shallow trench isolation structure having a nitride plug

Passive devices for FinFET integrated circuit technologies

Semiconductor device and manufacturing method thereof

Method of forming a complementary metal-oxide-semiconductor (CMOS) device

Solar-powered energy-autonomous silicon-on-insulator device

Memory device and manufacturing method of the same

Semiconductor device including an oxide semiconductor layer

Thermally stable high-K tetragonal HFO2 layer within high aspect ratio deep trenches

Dense arrays and charge storage devices

Electric charge flow circuit for a time measurement

Semiconductor device manufacturing method

Field-effect transistor stack voltage compensation

Transistors with various levels of threshold voltages and absence of distortions between nMOS and pMOS

Voltage contrast inspection of deep trench isolation

Structure, method and system for complementary strain fill for integrated circuit chips

Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same

Methods and apparatuses for forming multiple radio frequency (RF) components associated with different RF bands on a chip

Field effect transistor (FET) with self-aligned contacts, integrated circuit (IC) chip and method of manufacture

Semiconductor device having GaN-based layer

Semiconductor device and fabricating the same

ZRAM heterochannel memory

Methods of forming replacement fins for a FinFET semiconductor device by performing a replacement growth process

Semiconductor memory device

Radio-frequency switches having gate bias and frequency-tuned body bias

Nonvolatile latch circuit and logic circuit, and semiconductor device using the same

Metal-insulator-metal (MIM) capacitor with deep trench (DT) structure and method in a silicon-on-insulator (SOI)

Method of localized modification of the stresses in a substrate of the SOI type, in particular FD SOI type, and corresponding device

Semiconductor structures including an integrated finFET with deep trench capacitor and methods of manufacture

Metal trench capacitor and improved isolation and methods of manufacture

SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND SYSTEM FOR MANUFACTURING THE SAME

SOI bipolar junction transistor with substrate bias voltages

Semiconductor device

Semiconductor device

Semiconductor device

Transistor having a stressed body

Carbon-doped cap for a raised active semiconductor region

Static electricity protection circuit, electro-optic device and electronic device

STRUCTURE AND METHOD OF HIGH-PERFORMANCE EXTREMELY THIN SILICON ON INSULATOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTORS WITH DUAL STRESS BURIED INSULATORS

System with memory having voltage applying unit

Selective amorphization for signal isolation and linearity

Methods for the formation of a trap rich layer

Semiconductor device

Reliable electrical fuse with localized programming and method of making the same

Semiconductor device and manufacturing method thereof

Method and system for a photonic interposer

Methods of forming three-dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates

Semiconductor device with strain technique

Flexible, stretchable electronic devices

Semiconductor device

Structure and method for adjusting threshold voltage of the array of transistors

Semiconductor structure having column III-V isolation regions

Device including a transistor having a stressed channel region and method for the formation thereof

Solid-state image pick-up device and manufacturing method thereof, image-pickup apparatus, semiconductor device and manufacturing method thereof, and semiconductor substrate

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Bipolar transistor, band-gap reference circuit and virtual ground reference circuit

Semiconductor device and method of manufacturing the same

Semiconductor device including a channel region and method for manufacturing the semiconductor device

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Method for manufacturing silicon-based electronics with disabling feature

SILICON-ON-INSULATOR (SOI) BODY-CONTACT PASS GATE STRUCTURE

Silicon-based electronics with disabling feature

Forming semiconductor structure with device layers and TRL

Transistor devices having an anti-fuse configuration and methods of forming the same

Method of fabricating a semiconductor device including embedded crystalline back-gate bias planes

Memory device and manufacturing method the same

Semiconductor-on-insulator integrated circuit with back side gate

Semiconductor device

Tristate gate

Integrating channel SiGe into pFET structures

Fabricating polysilicon MOS devices and passive ESD devices

Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same

Structure and method for reducing floating body effect of SOI MOSFETS

Semiconductor device

Semiconductor device

Semiconductor device and driving method thereof

Semiconductor-on-insulator integrated circuit with reduced off-state capacitance

Redistribution layer contacting first wafer through second wafer

SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND PROCESS FOR PRODUCING SAME

6T SRAM architecture for gate-all-around nanowire devices

Method of manufacturing an LTPS array substrate

Semiconductor device and method for manufacturing the same

6T SRAM architecture for gate-all-around nanowire devices

Method of producing a silicon-on-insulator article

Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs

Semiconductor memory device

High-current N-type silicon-on-insulator lateral insulated-gate bipolar transistor

Semiconductor field-effect transistor, memory cell and memory device

SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER

Semiconductor device and method for manufacturing semiconductor device

Method for controlling an integrated circuit

Semiconductor-on-insulator integrated circuit with interconnect below the insulator

Semiconductor device with antenna and light-emitting element

Integrated semiconductor device having an insulating structure and a manufacturing method

Thermally assisted flash memory with diode strapping

Semiconductor structure with deep trench thermal conduction

Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding

Circuit structures, memory circuitry, and methods

Apparatus and methods relating to a memory cell having a floating body

Three-dimensional semiconductor architecture

Devices including a diamond layer

Integrated structure with bidirectional vertical actuation

Hybrid ETSOI structure to minimize noise coupling from TSV

Semiconductor structures with deep trench capacitor and methods of manufacture

Carbon-doped cap for a raised active semiconductor region

Extremely thin semiconductor on insulator (ETSOI) logic and memory hybrid chip

Field-effect transistor, and memory and semiconductor circuit including the same

Semiconductor device comprising a channel region of a transistor with a crystalline oxide semiconductor and a specific off-state current for the transistor

Methods of forming strained-semiconductor-on-insulator device structures

Methods of containing defects for non-silicon device engineering

Electronic device

High freuency semiconductor switch and wireless device

High frequency switch

Diode structure for gate all around silicon nanowire technologies

Diode structure and method for gate all around silicon nanowire technologies

Diode structure and method for wire-last nanomesh technologies

Semiconductor integrated circuit device, electronic apparatus, and display apparatus

Diode structure and method for wire-last nanomesh technologies

Method of fabricating isolated capacitors and structure thereof

SOI RF device and method for forming the same

Short circuit reduction in a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate

ESD-protection circuit for integrated circuit device

Convex shaped thin-film transistor device having elongated channel over insulating layer

Memory device

Nanowire capacitor for bidirectional operation

Nanowire capacitor for bidirectional operation

Methods of forming semiconductor structures including bodies of semiconductor material

Method of forming a gated diode structure for eliminating RIE damage from cap removal

Semiconductor device and manufacturing method thereof

Thermal shunt

NANOELECTROMECHANICAL RESONATORS

Semiconductor device with silicon layer containing carbon

Butted SOI junction isolation structures and devices and method of fabrication

Hybrid fin field-effect transistor structures and related methods

Fabricating polysilicon MOS devices and passive ESD devices

Integrated circuit having back gating, improved isolation and reduced well resistance and method to fabricate same

Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drain

Fabrication method of semiconductor apparatus

Integrated circuit comprising a clock tree cell

Integrated circuit comprising a clock tree cell

Silicon-on-insulator radio frequency device and silicon-on-insulator substrate