Annealing copper interconnects

Methods of forming three dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates

Trap rich layer with through-silicon-vias in semiconductor devices

Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)

Nonvolatile memory and electronic apparatus

METHOD OF PROTECTING DEEP TRENCH SIDEWALL FROM PROCESS DAMAGE

Trench capacitor with spacer-less fabrication process

Method of fabricating high-mobility dual channel material based on SOI substrate

THRESHOLD ADJUSTMENT OF TRANSISTORS BY CONTROLLED S/D UNDERLAP

Borderless contact for ultra-thin body devices

Circuit structures, memory circuitry, and methods

Hybrid CMOS technology with nanowire devices and double gated planar devices

Hybrid CMOS technology with nanowire devices and double gated planar devices

Semiconductor system and device

Semiconductor device having well regions with opposite conductivity

Shift register memory and method of manufacturing the same

Semiconductor device and method for making same

SOI CMOS STRUCTURE HAVING PROGRAMMABLE FLOATING BACKPLATE

Solutions for controlling bulk bias voltage in an extremely thin silicon-on-insulator (ETSOI) integrated circuit chip

Semiconductor device having a trench isolation structure

CMOS with dual raised source and drain for NMOS and PMOS

FET eDRAM trench self-aligned to buried strap

Structure and method for forming a light detecting diode and a light emitting diode on a silicon-on-insulator wafer backside

Switching system and method

Semiconductor device

Schottky-clamped bipolar transistor with reduced self heating

Semiconductor devices with low junction capacitances

Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic suppressing region

ETSOI CMOS with back gates

Method and structure for integrating capacitor-less memory cell with logic

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Semiconductor structures and devices and methods of forming the same

Method and structure for low resistive source and drain regions in a replacement metal gate process flow

Vertical stacking of field effect transistor structures for logic gates

Semiconductor structures including bodies of semiconductor material, devices including such structures and related methods

Raised Source/Drain Field Effect Transistor

WAFER FOR BACKSIDE ILLUMINATION TYPE SOLID IMAGING DEVICE, PRODUCTION METHOD THEREOF AND BACKSIDE ILLUMINATION SOLID IMAGING DEVICE

Buried metal-semiconductor alloy layers and structures and methods for fabrication thereof

Semiconductor devices with active semiconductor height variation

SILICON ON INSULATOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR WITH AN ISOLATION FORMED AT LOW TEMPERATURE

Semiconductor structure and method for manufacturing the same

Deposition on a nanowire using atomic layer deposition

Programmable structured arrays

Shielding for high-voltage semiconductor-on-insulator devices

Method for manufacturing a semiconductor-on-insulator structure having low electrical losses, and corresponding structure

Planar and nanowire field effect transistors

Complementary SOI lateral bipolar for SRAM in a low-voltage CMOS platform

NON-VOLATILE MEMORY CELL STRUCTURE AND METHOD FOR PROGRAMMING AND READING THE SAME

Complementary bipolar inverter

Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture

METHOD FOR ISOLATING RF FUNCTIONAL BLOCKS ON SILICON-ON-INSULATOR (SOI) SUBSTRATES

SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, AND METHODS OF MANUFACTURING THE SAME

Recessed gate field effect transistor

Highly scaled ETSOI floating body memory and memory circuit

Method of manufacturing convex shaped thin-film transistor device

Metal trench capacitor and improved isolation and methods of manufacture

High density memory cells using lateral epitaxy

Semiconductor device

Method of protecting STI structures from erosion during processing operations

Method for manufacturing semiconductor device having SOI substrate

SOI Trench Dram Structure With Backside Strap

Method and system for hybrid integration of optical communication systems

Semiconductor device with cross-talk isolation using M-cap

Semiconductor device

ETSOI CMOS with back gates

Semiconductor architecture having field-effect transistors especially suitable for analog applications

Structure for CMOS ETSOI with multiple threshold voltages and active well bias capability

SOI trench DRAM structure with backside strap

CMOS with channel P-FinFET and channel N-FinFET having different crystalline orientations and parallel fins

Embedded silicon germanium n-type filed effect transistor for reduced floating body effect

Semiconductor device and manufacturing method thereof

CMOS with channel P-FinFET and channel N-FinFET having different crystalline orientations and parallel fins

Signal processing circuit

Semiconductor integrated circuit

Semiconductor structure having NFET and PFET formed in SOI substrate with underlapped extensions

Barrier trench structure and methods of manufacture

Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance

Bi-directional self-aligned FET capacitor

CMOS devices incorporating hybrid orientation technology (HOT) with embedded connectors

Integrated circuit (IC) chip having both metal and silicon gate field effect transistors (FETs) and method of manufacture

Semiconductor device

Semiconductor device

SEMICONDUCTOR DEVICE HAVING CONTROLLABLE TRANSISTOR THRESHOLD VOLTAGE

SOI SiGe-base lateral bipolar junction transistor

Method for fabricating transistor with high-K dielectric sidewall spacer

Semiconductor device

Integrated circuit diode

Semiconductor device having a trenched insulating layer coated with an oxide semiconductor film

Method of manufacturing semiconductor device

Thermally assisted flash memory with diode strapping

Semiconductor memory device

Contacts for nanowire field effect transistors

Semiconductor device and method for manufacturing the same

Reliable electrical fuse with localized programming

System comprising a semiconductor device and structure

Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner

Semiconductor device with electrically floating body

Semiconductor device manufacturing method and semiconductor device

Method of forming a borderless contact structure employing dual etch stop layers

Memory device and manufacturing method the same

Programmable LSI

Isolated capacitors within shallow trench isolation

Method of fabricating isolated capacitors and structure thereof

Floating body memory cell having gates favoring different conductivity type regions

SOI DEVICE HAVING AN INCREASING CHARGE STORAGE CAPACITY OF TRANSISTOR BODIES AND METHOD FOR MANUFACTURING THE SAME

Semiconductor device and production method therefor

METHOD OF FABRICATING NON-VOLATILE MEMORY DEVICE

Semiconductor element, memory circuit, integrated circuit, and driving method of the integrated circuit

Lateral epitaxial grown SOI in deep trench structures and methods of manufacture

SOI device with DTI and STI

Strained thin body CMOS device having vertically raised source/drain stressors with single spacer

FLASH MEMORY AND METHOD FOR FABRICATING THE SAME

Semiconductor memory device

Semiconductor memory device

Semiconductor device and method for making same

Dual-depth self-aligned isolation structure for a back gate electrode

Semiconductor nanowire structure reusing suspension pads

Junction field effect transistor with an epitaxially grown gate structure

Semiconductor device and method for manufacturing the same

Stressed source/drain CMOS and method for forming same

Method for producing a thyristor

Semiconductor device and driving method thereof

3D semiconductor device and structure with back-bias

Semiconductor device and fabrication method therefor

Memory device

Method of fabricating a FINFET having a gate structure disposed at least partially at a bend region of the semiconductor fin

Field-effect transistor, and memory and semiconductor circuit including the same

FIELD EFFECT TRANSISTOR

Semiconductor element, semiconductor device and methods for manufacturing thereof

Reducing defect rate during deposition of a channel semiconductor alloy into an in situ recessed active region

Semiconductor device and method of manufacturing the same

Multi-layer structures and process for fabricating semiconductor devices

Method for fabricating 3D-nonvolatile memory device

Manufacturing method of semiconductor device having semiconductor layers with different thicknesses

Integrated circuit structure incorporating one or more asymmetric field effect transistors as power gates for an electronic circuit with stacked symmetric field effect transistors

Wafer with intrinsic semiconductor layer

Memory device and method for manufacturing the same

Test circuit for testing signal receiving unit, image pickup apparatus, method of testing signal receiving unit, and method of testing image pickup apparatus

Method of manufacture transistor with reduced charge carrier mobility

Transistor with reduced charge carrier mobility

Semiconductor device including gate electrode having a laminate structure and a plug electrically connected thereto

Dense arrays and charge storage devices

Method for fabricating semiconductor wafers for the integration of silicon components with HEMTs, and appropriate semiconductor layer arrangement

Semiconductor device

Hybrid fin field-effect transistor structures and related methods

Semiconductor device and manufacturing method of semiconductor device

Semiconductor device and fabrication method thereof

Structure and method for adjusting threshold voltage of the array of transistors

Method for manufacturing semiconductor device

Semiconductor-on-insulator with back side connection

Integrated circuit device with series-connected field effect transistors and integrated voltage equalization and method of forming the device

Structure and method for buried inductors for ultra-high resistivity wafers for SOI/RF SiGe applications

Lateral Power MOSFET With Integrated Schottky Diode

Semiconductor-on-insulator with back side strain inducing material

Structure for high density stable static random access memory

Semiconductor device having silicon on stressed liner (SOL)

Localized biasing for silicon on insulator structures

Schottky diode switch and memory units containing the same

Capacitorless DRAM on bulk silicon

Semiconductor memory device and method for manufacturing the same

Method of fabricating a deep trench (DT) metal-insulator-metal (MIM) capacitor

Semiconductor device and production method therefor

3D integrated circuit with logic

Semiconductor device and electronic device

Capacitor and semiconductor device including dielectric and N-type semiconductor

3D integration method using SOI substrates and structures produced thereby

SOI substrate, method of manufacturing the SOI substrate, semiconductor device, and method of manufacturing the semiconductor device

ANNEALING TECHNIQUES FOR HIGH PERFORMANCE COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICE FABRICATION

Asymmetric silicon-on-insulator SRAM cell

Semiconductor-on-insulator device with asymmetric structure

Integration of structurally-stable isolated capacitive micromachined ultrasonic transducer (CMUT) array cells and array elements

Metal high-K transistor having silicon sidewalls for reduced parasitic capacitance

Semiconductor device

Extremely thin semiconductor-on-insulator (ETSOI) integrated circuit with on-chip resistors and method of forming the same

FET structures with trench implantation to improve back channel leakage and body resistance

Deposition on a nanowire using atomic layer deposition

Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture

ASYMMETRIC SILICON-ON-INSULATOR SRAM CELL

Semiconductor device and semiconductor memory device including transistor and capacitor

Storage element, storage device, signal processing circuit, and method for driving storage element

Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture

Method and structure for forming a deep trench capacitor

SOI semiconductor device comprising a substrate diode and a film diode formed by using a common well implantation mask

Fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications

SEMICONDUCTOR SURROUND GATE SRAM STORAGE DEVICE

Replacement gate CMOS

Method and system for a photonic interposer

Structure and method of forming enhanced array device isolation for implanted plate EDRAM

Structure and method to form EDRAM on SOI substrate

Method and structure for forming capacitors and memory devices on semiconductor-on-insulator (SOI) substrates

Nanomesh SRAM cell

Structure, method and system for complementary strain fill for integrated circuit chips

Semiconductor structure and method for manufacturing the same

Trap rich layer for semiconductor devices

Semiconductor devices and semiconductor device manufacturing methods

Semiconductor device and manufacturing method thereof

Semiconductor device and method for manufacturing

SEMICONDUCTOR DEVICE

Transistor, semiconductor device comprising the transistor and method for manufacturing the same

Semiconductor integrated circuit device including a fin-type field effect transistor and method of manufacturing the same

SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME

Schottky diode switch and memory units containing the same

Structure and method for mobility enhanced MOSFETS with unalloyed silicide

Methods, devices, and systems relating to a memory cell having a floating body

SEMICONDUCTOR DEVICE

Pseudo butted junction structure for back plane connection

Transistor and semiconductor device

Structure and method for mobility enhanced MOSFETs with unalloyed silicide

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

Electronically scannable multiplexing device

Method of forming substrate contact for semiconductor on insulator (SOI) substrate

Diode

Semiconductor device

SOI SiGe-base lateral bipolar junction transistor

HIGH-PERFORMANCE ONE-TRANSISTOR MEMORY CELL

Single gate inverter nanowire mesh

Silicon and silicon germanium nanowire structures

Biosensor devices, systems and methods therefor

Manufacturing method of a thin film transistor

Monolithic integration of photonics and electronics in CMOS processes

HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICE

Monolithic integration of photonics and electronics in CMOS processes

Semiconductor device

Transparent memory for transparent electronic device

Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material

Method of constructing a semiconductor device and structure

Semiconductor memory device

Multi-wafer 3D CAM cell

Integrated circuit made out of SOI with transistors having distinct threshold voltages

Enhanced thin film field effect transistor integration into back end of line

Structure and method to fabricate a body contact

Creating anisotropically diffused junctions in field effect transistor devices

Semiconductor-on-insulator apparatus, device and system with buried decoupling capacitors

Electrostatic discharge protection device and method of fabricating same

Semiconductor signal processing device

RAM MEMORY ELEMENT WITH ONE TRANSISTOR

Methods of operating a memory device having a buried boosting plate

Method to match SOI transistors using a local heater element

Integrated circuit device, system, and method of fabrication

Diffusion sidewall for a semiconductor structure

Low cost fabrication of double box back gate silicon-on-insulator wafers with subsequent self aligned shallow trench isolation

SOI CMOS circuits with substrate bias

Strained semiconductor devices and methods of fabricating strained semiconductor devices

ESD protection devices for SOI integrated circuit and manufacturing method thereof

Fabrication of semiconductors with high-K/metal gate electrodes

Butted SOI junction isolation structures and devices and method of fabrication

Semiconductor device including memory cell

Substrate Structure Having Buried Wiring And Method For Manufacturing The Same, And Semiconductor Device And Method For Manufacturing The Same Using The Substrate Structure

Method of providing threshold voltage adjustment through gate dielectric stack modification

SEMICONDUCTOR DEVICE AND MANUFACTURING METHODS WITH USING NON-PLANAR TYPE OF TRANSISTORS

Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating

SILICON-ON-INSULATOR (SOI) BODY-CONTACT PASS GATE STRUCTURE

Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same

Lateral epitaxial grown SOI in deep trench structures and methods of manufacture

Structure and method for using high-k material as an etch stop layer in dual stress layer process

High voltage drain extension on thin buried oxide SOI

SOI radio frequency switch with enhanced electrical isolation

Method for driving semiconductor device

FORMING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER

Formation of multi-height MUGFET

Structure of high-K metal gate semiconductor transistor

Integrated circuit device and structure

TFT MONOS or SONOS memory cell structures

Method of manufacturing a semiconductor device with two monocrystalline layers

Vertical semiconductor device with thinned substrate

SOI-based CMUT device with buried electrodes

Semiconductor device

FET structures with trench implantation to improve back channel leakage and body resistance

Semiconductor device and structure

Vertical semiconductor device with thinned substrate

FinFETs having dielectric punch-through stoppers

Structure and method of forming enhanced array device isolation for implanted plate eDRAM

Semiconductor device with photonics

Circuit device

Methods for fabricating a semiconductor device having decreased contact resistance

Semiconductor memory device having a floating body capacitor, memory cell array having the same and method of manufacturing the same

Self-aligned strap for embedded capacitor and replacement gate devices

Semiconductor device

Single transistor floating-body DRAM devices having vertical channel transistor structures

Electronic device

SRAM device

Silicon device on Si: C-oi and Sgoi and method of manufacture

Conductive layer buried-type substrate, method of forming the conductive layer buried-type substrate, and method of fabricating semiconductor device using the conductive layer buried-type substrate

Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)

Reduced threshold voltage-width dependency in transistors comprising high-k metal gate electrode structures

Same-chip multicharacteristic semiconductor structures

Semiconductor device with high-breakdown-voltage transistor

Semiconductor Memory Device

Epitaxy silicon on insulator (ESOI)

Nonvolatile semiconductor memory device

Low harmonic RF switch in SOI

Methods of forming contacts for nanowire field effect transistors

Semiconductor integrated circuit device and supply voltage supervisor

Semiconductor device and manufacturing method thereof

Method for fabrication of a semiconductor device and structure

Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer

Structure and method for making metal semiconductor field effect transistor (MOSFET) with isolation last process

Methods of forming radiation-hardened semiconductor structures

SOI trench DRAM structure with backside strap

Raised source/drain field effect transistor