Temperature monitoring in a semiconductor device by using a PN junction based on silicon/germanium materials

Semiconductor device and method for manufacturing the same

Semiconductor device, method for manufacturing same, and semiconductor storage device

Semiconductor-on-insulator (SOI) structure with selectively placed sub-insulator layer void(s) and method of forming the SOI structure

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Method of fabricating isolated capacitors and structure thereof

System comprising a semiconductor device and structure

Method for fabricating SOI high voltage power chip with trenches

Stress-induced CMOS device

Charging protection device

Semiconductor device

Semiconductor Structures with Rare-earths

Methods for forming semiconductor device structures

Structure and method to control bottom corner threshold in an SOI device

Flexible ferroelectric memory device and manufacturing method for the same

Readout transistor circuits for CMOS imagers

Strained thin body CMOS device having vertically raised source/drain stressors with single spacer

Field effects transistor with asymmetric abrupt junction implant

Integrated semiconductor device having an insulating structure and a manufacturing method

Switching device and testing apparatus

Surround gate CMOS semiconductor device

Semiconductor devices having stressor regions and related fabrication methods

Semiconductor device and method for manufacturing the same

Miniature micro-electromechanical system (MEMS) based directional sound sensor

Current sensor, inverter circuit, and semiconductor device having the same

SOI wafer, method for producing same, and method for manufacturing semiconductor device

Vertical Stacking of Field Effect Transistor Structures for Logic Gates

Semiconductor device and method for manufacturing the same

SRAM memory cell with four transistors provided with a counter-electrode

HIGH DENSITY BUTTED JUNCTION CMOS INVERTER, AND MAKING AND LAYOUT OF SAME

Semiconductor device and method for manufacturing same

Reduced corner leakage in SOI structure and method

Semiconductor element and semiconductor device

Asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method of forming the asymmetrical SOI JFET

Junctionless TFT NAND flash memory

Strained semiconductor device and method of making the same

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Generation of multiple diameter nanowire field effect transistors

Memory array having a programmable word length, and method of operating same

Method for forming semiconductor devices with active silicon height variation

Embedded DRAM for extremely thin semiconductor-on-insulator

Semiconductor substrate, semiconductor device, and manufacturing methods for them

Semiconductor device

Semiconductor substrate, electronic device and method for manufacturing semiconductor substrate

Shielding for high-voltage semiconductor-on-insulator devices

Low leakage FINFETs

SOI Wafer and Method of Forming the SOI Wafer with Through the Wafer Contacts and Trench Based Interconnect Structures that Electrically Connect the Through the Wafer Contacts

Device comprising a field-effect transistor in a silicon-on-insulator

MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

Semiconductor device and method for manufacturing the same

Semiconductor component and methods for producing a semiconductor component

Semiconductor device

Semiconductor device and manufacturing method thereof

Hybrid orientation inversion mode GAA CMOSFET

ESD protection structures on SOI substrates

Semiconductor device and method for forming the same

Hybrid orientation accumulation mode GAA CMOSFET

Semiconductor Device and Manufacturing Method Thereof

Semiconductor device and method of manufacturing the same

Uncooled infrared detector and methods for manufacturing the same

Hybrid material inversion mode GAA CMOSFET

Vertical stacking of field effect transistor structures for logic gates

Semiconductor device

Semiconductor device and manufacturing process therefor

Manufacturing method of semiconductor substrate and manufacturing method of semiconductor device

Semiconductor device comprising a capacitor formed in the contact level

Semiconductor memory device

Stacked non-volatile memory device and methods for fabricating the same

Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drain

Capacitor, integrated device, radio frequency switching device, and electronic apparatus

Semiconductor component and methods for producing a semiconductor component

Semiconductor devices with vertical extensions for lateral scaling

SRAM-type memory cell

Design Structure For Dense Layout of Semiconductor Devices

Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors

VERTICAL INTEGRATED SILICON NANOWIRE FIELD EFFECT TRANSISTORS AND METHODS OF FABRICATION

Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating

Silicon-on-insulator high power amplifiers

Method and apparatus improving gate oxide reliability by controlling accumulated charge

Semiconductor device

ETSOI with reduced extension resistance

Si and SiGeC on a buried oxide layer on a substrate

Methods of manufacturing buried wiring type substrate and semiconductor device incorporating buried wiring type substrate

Techniques for providing a semiconductor memory device

SOI radio frequency switch with enhanced signal fidelity and electrical isolation

Charge breakdown avoidance for MIM elements in SOI base technology and method

Semiconductor devices with buried bit lines and methods of manufacturing semiconductor devices

Semiconductor nanowire memory device

Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer

Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures

Semiconductor device and manufacturing method thereof

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Fully depleted SOI multiple threshold voltage application

Strain memorization in strained SOI substrates of semiconductor devices

Semiconductor device and method of manufacturing the same

Fully depleted silicon-on-insulator CMOS logic

Method of forming a buried plate by ion implantation

METHOD FOR FABRICATION OF A SEMICONDUCTOR DEVICE AND STRUCTURE

Method of manufacturing a semiconductor device having elevated layers of differing thickness

Semiconductor device and method of driving semiconductor device

Electronic device including a doped region disposed under and having a higher dopant concentration than a channel region and a process of forming the same

Self-aligned two-step STI formation through dummy poly removal

Structure and method for reducing floating body effect of SOI MOSFETs

Floating body field-effect transistors, and methods of forming floating body field-effect transistors

Electronic device including a buried insulating layer and a vertical conductive structure extending therethrough and a process of forming the same

Silicon-on-insulator substrate with built-in substrate junction

Electronic device including doped regions between channel and drain regions and a process of forming the same

SEMICONDUCTOR INTEGRATED CIRCUIT

Complementary metal oxide semiconductor devices

Semiconductor device

SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE

SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device

Semiconductor device with back-gate voltage control of a logic circuit

Deep trench capacitor for SOI CMOS devices for soft error immunity

Method of operating inverter

Semiconductor device and manufacturing method thereof

Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array

Static randon access memory cell

Device having a contact between semiconductor regions through a buried insulating layer, and process for fabricating said device

Extremely thin semiconductor-on-insulator (ETSOI) integrated circuit with on-chip resistors and method of forming the same

Memory cell with a channel buried beneath a dielectric layer

Structure and production process of a microelectronic 3D memory device of flash NAND type

Method and structure for forming capacitors and memory devices on semiconductor-on-insulator (SOI) substrates

Read transistor for single poly non-volatile memory using body contacted SOI device

Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension

Field effect transistor and method for manufacturing the same

Field effect transistor and method for manufacturing the same

Enhanced confinement of high-K metal gate electrode structures by reducing material erosion of a dielectric cap layer upon forming a strain-inducing semiconductor alloy

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Enhancing deposition uniformity of a channel semiconductor alloy by forming a recess prior to the well implantation

DENSE ARRAYS AND CHARGE STORAGE DEVICES

Memory device, semiconductor device, and electronic device

Complementary logic gate device

Recessed channel negative differential resistance-based memory cell

Non-volatile latch circuit and logic circuit, and semiconductor device using the same

PHOTODETECTOR WITH VALENCE-MENDING ADSORBATE REGION AND A METHOD OF FABRICATION THEREOF

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Single transistor memory with immunity to write disturb

Double-gated transistor memory

Semiconductor device and manufacturing method thereof

Semiconductor storage element and manufacturing method thereof

Lateral Power MOSFET With Integrated Schottky Diode

Embedded bit line structure, field effect transistor structure with the same and method of fabricating the same

NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

Structure and method for making a strained silicon transistor

Method of manufacturing semiconductor device having optical devices

METHOD OF CONTROLLING A DRAM MEMORY CELL ON THE SeOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER

Semiconductor device

Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer

Arrays of transistors with back control gates buried beneath the insulating film of a semiconductor-on-insulator substrate

Structure and method for semiconductor power devices

Semiconductor apparatus

Planar and nanowire field effect transistors

Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method

Semiconductor device

Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure

Nonvolatile latch circuit and logic circuit, and semiconductor device using the same

Three-dimensional memory devices and methods of manufacturing and operating the same

Method for making complementary P and N MOSFET transistors, electronic device including such transistors, and processor including at least one such device

Semiconductor device and structure

Semiconductor memory device including semiconductor and oxide semiconductor transistors

Semiconductor device

Semiconductor device, method of controlling the same, and method of manufacturing the same

Semiconductor device and driving method thereof

BACKSIDE ILLUMINATED IMAGE SENSOR WITH REDUCED DARK CURRENT

SOI CMOS structure having programmable floating backplate

Diffusion sidewall for a semiconductor structure

Embedded photodetector apparatus in a 3D CMOS chip stack

Semiconductor substrate with stripes of different crystal plane directions and semiconductor device including the same

METHOD FOR MANUFACTURING SOI SUBSTRATE

Hybrid double box back gate silicon-on-insulator wafers with enhanced mobility channels

Method for forming a back-side illuminated image sensor

Bi-directional self-aligned FET capacitor

Monolithic three-dimensional semiconductor device and structure

Semiconductor device including image sensor

Semiconductor device comprising a gate of an amplifier transistor under an insulating layer and a transfer transistor channel over the insulating layer the amplifier transistor and transfer transistor overlapping

SEMICONDUCTOR DEVICE FORMED ON A SOI SUBSTRATE

Contoured insulator layer of silicon-on-insulator wafers and process of manufacture

SOI type semiconductor device having a protection circuit

TWO PFET SOI MEMORY CELLS

Forming an extremely thin semiconductor-on-insulator (ETSOI) layer

One-transistor cell semiconductor on insulator random access memory

Electrically conductive path forming below barrier oxide layer and integrated circuit

Buried decoupling capacitors, devices and systems including same, and methods of fabrication

Zero capacitor RAM with reliable drain voltage application and method for manufacturing the same

Method of manufacturing a three dimensional integrated circuit by transfer of a mono-crystalline layer

Green transistor for nano-Si ferro-electric RAM and method of operating the same

Semiconductor device having silicon on stressed liner (SOL)

Semiconductor device and structure

Thin film transistor and manufacturing method thereof

Semiconductor device having a surrounding gate

Nonvolatile memory transistor

Manufacturing method of SOI substrate and manufacturing method of semiconductor device

Ferroelectric memory devices and operating methods thereof

Element array, electromechanical conversion device, and process for producing the same

APPARATUS AND METHOD OF FORMING A MEMS ACOUSTIC TRANSDUCER WITH LAYER TRANSFER PROCESSES

Asymmetric silicon-on-insulator SRAM cell

III-V semiconductor device structures

Semiconductor device having SOI substrate

Method for fabricating a semiconductor device having a semiconductive resistor structure

Integrated circuit device with series-connected field effect transistors and integrated voltage equalization and method of forming the device

Semiconductor device

Multi-gate semiconductor devices with improved carrier mobility

Dual dielectric tri-gate field effect transistor

Semiconductor device

Fabrication of semiconductors with high-K/metal gate electrodes

Manufacturing process of fin-type field effect transistor and semiconductor

Semiconductor structure having a gate electrode at least partially disposed in a trench formed at a bend in a semiconductor material

Method for manufacturing semiconductor device

Method of making bipolar FinFET technology

SEMICONDUCTOR INTEGRATED CIRCUIT HAVING INSULATED GATE FIELD EFFECT TRANSISTORS

Stressed source/drain CMOS and method of forming same

Embedded silicon germanium n-type filed effect transistor for reduced floating body effect

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Silicon-on-insulator substrate with built-in substrate junction

System comprising a semiconductor device and structure

Field-effect transistor and method for fabricating the same

Techniques to reduce substrate cross talk on mixed signal and RF circuit design

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals

Semiconductor memory having both volatile and non-volatile functionality and method of operating

Structure and method of forming enhanced array device isolation for implanted plate EDRAM

SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Multi-thickness semiconductor with fully depleted devices and photonic integration

Extremely thin silicon on insulator (ETSOI) complementary metal oxide semiconductor (CMOS) with in-situ doped source and drain regions formed by a single mask

SEMICONDUCTOR DEVICE HAVING MULTI-GATE STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Semiconductor device and manufacturing method thereof

Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making

Terminal structure and manufacturing method thereof, and electronic device and manufacturing method thereof

Semiconductor integrated circuit device

Nanomesh SRAM cell

Semiconductor device and manufacturing method thereof

Method for manufacturing semiconductor device

Capacitorless DRAM on bulk silicon

Bipolar Transistor, Band-Gap Reference Circuit and Virtual Ground Reference Circuit

Method and structures for improving substrate loss and linearity in SOI substrates

Semiconductor device and method for manufacturing the same

In-line light sensor

SEMICONDUCTOR CIRCUIT ARRANGEMENT AND ASSOCIATED METHOD FOR TEMPERATURE DETECTION

Semiconductor-on-insulator with back side connection

Semiconductor-on-insulator with back side support layer

Semiconductor-on-insulator with back side heat dissipation

Vertical channel transistor structure and manufacturing method thereof

Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source(s) and/or drain(s)

Method for fabricating semiconductor device

Floating body memory cell system and method of manufacture

Inducing stress in CMOS device

Schottky diode switch and memory units containing the same

Semiconductor device and method for manufacturing the same

Process of forming an electronic device including insulating layers having different strains

Method for producing a transistor with metallic source and drain

Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Method of adjusting the threshold voltage of a transistor by a buried trapping layer

Methods of forming one transistor DRAM devices

SRAM device

Structure and method for buried inductors for ultra-high resistivity wafers for SOI/RF SiGe applications

Process to fabricate a metal high-K transistor having first and second silicon sidewalls for reduced parasitic capacitance

Semiconductor device and method for fabricating the same

Semiconductor device and semiconductor integrated circuit using the same

Semiconductor device

Semiconductor device

SEMICONDUCTOR DEVICE INCLUDING INDEPENDENT ACTIVE LAYERS AND METHOD FOR FABRICATING THE SAME

Semiconductor device with electrostatic protection device

Method for producing an integrated field-effect transistor

Semiconductor device having an enlarged space area surrounding an isolation trench for reducing thermal resistance and improving heat dissipation

High-voltage semiconductor device

SEMICONDUCTOR DEVICE

Charging protection device

Nonvolatile semiconductor memory device

Method for manufacturing semiconductor device

Semiconductor structure for fabricating a handle wafer contact in a trench insulated SOI disc

Semiconductor dynamic quantity sensor and method of manufacturing the same

Epitaxy silicon on insulator (ESOI)

Device including high-K metal gate finfet and resistive structure and method of forming thereof

Strain transformation in biaxially strained SOI substrates for performance enhancement of P-channel and N-channel transistors

Nonvolatile semiconductor memory device and manufacturing method thereof

Semiconductor structures having both elemental and compound semiconductor devices on a common substrate

Single gate inverter nanowire mesh

Reduced silicon thickness of N-channel transistors in SOI CMOS devices

Method for fabrication of a semiconductor device and structure

Electronically scannable multiplexing device

Structure and method to form EDRAM on SOI substrate

Method of reducing stacking faults through annealing

Memory element and method for manufacturing the same, and semiconductor device

Threshold voltage adjustment through gate dielectric stack modification

Semiconductor device with photonics

Semiconductor device

Nonvolatile semiconductor memory device and method for manufacturing the same

Fabrication methods for radiation hardened isolation structures

Power supply circuits

SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same

SRAM memory cell provided with transistors having a vertical multichannel structure

Semiconductor device having increased gate length implemented by surround gate transistor arrangements

Non-volatile semiconductor memory device and method of manufacturing the same