ClassID:

208260

H01L29/107 - CPC Classification

Classification description:

Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes Substrate region of field-effect devices

Sub-classes:
Recent Application in this class:
#1
20230378345
2023-11-23

SEMICONDUCTOR DEVICE

#2
20200176558
2020-06-04

Method of forming III-V on insulator structure on semiconductor substrate

#3
20190362976
2019-11-28

Semiconductor devices and methods for forming semiconductor devices

#4
20190305086
2019-10-03

Semiconductor device, method of manufacturing semiconductor device, and semiconductor package

#5
20190181220
2019-06-13

Method of forming III-V on insulator structure on semiconductor substrate

#6
20190051723
2019-02-14

Protected electronic chip

#7
20180301548
2018-10-18

Silicon carbide transistor

#8
20180226496
2018-08-09

Transistors having ultra thin fin profiles and their methods of fabrication

#9
20170186648
2017-06-29

Bipolar junction semiconductor device and method for manufacturing thereof

#10
20160197169
2016-07-07

Injection control in semiconductor power devices

#11
20160005816
2016-01-07

Group III-V Transistor with Voltage Controlled Substrate

#12
20150349101
2015-12-03

Injection control in semiconductor power devices

#13
20150318407
2015-11-05

Adding decoupling function for TAP cells

#14
20150115283
2015-04-30

SiC bipolar junction transistor with reduced carrier lifetime in collector and a defect termination layer

#15
20140242762
2014-08-28

Method of fabricating a tunable schottky diode with depleted conduction path

#16
20140061731
2014-03-06

Tunable schottky diode with depleted conduction path

#17
20130210203
2013-08-15

Method of manufacturing compound semiconductor device

#18
20130009280
2013-01-10

Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases

#19
20120326276
2012-12-27

Buried layer of an integrated circuit

#20
20120286341
2012-11-15

Adding decoupling function for tap cells

#21
20120241766
2012-09-27

Epitaxial wafer and semiconductor element

#22
20120223330
2012-09-06

Semiconductor device having high performance channel

#23
20120211759
2012-08-23

Structure and method to reduce wafer warp for gallium nitride on silicon wafer

#24
20110316051
2011-12-29

Semiconductor wafer, method of producing semiconductor wafer, electronic device, and method of producing electronic device

#25
20110160065
2011-06-30

Phase-separated, epitaxial composite cap layers for electronic device applications and method of making the same

#26
20110127572
2011-06-02

Gated resonant tunneling diode

#27
20110073911
2011-03-31

Semiconductor device

#28
20110049677
2011-03-03

Buried layer of an integrated circuit

#29
20100181551
2010-07-22

Quantum dot transistor

#30
20100065823
2010-03-18

Gated resonant tunneling diode

#31
20100019290
2010-01-28

Junction field effect transistor using a silicon on insulator architecture

#32
20080197359
2008-08-21

Compound semiconductor device and method of manufacturing the same

#33
15494187
2018-05-29

Variable capacitor structures with reduced channel resistance

#34
15401281
2018-02-13

Structures with contact trenches and isolation trenches

#35
15297120
2017-12-26

Stacked capacitor structure