208270 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed; Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices Compositional structures
Sub-classes:EPITAXIAL OXIDE MATERIALS, STRUCTURES, AND DEVICES
#2METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH OFFSET SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
#3METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH FLUSH SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
#4NITRIDE SEMICONDUCTOR DEVICE
#5ARTIFICIAL DOUBLE-LAYER TWO-DIMENSIONAL MATERIAL AND METHOD OF MANUFACTURING SAME
#6ELECTRONIC DEVICE WITH GALLIUM NITRIDE TRANSISTORS AND METHOD OF MAKING SAME
#7EPITAXIAL OXIDE MATERIALS, STRUCTURES, AND DEVICES
#8Method for making nanostructure transistors with source/drain trench contact liners
#9NANOSTRUCTURE TRANSISTORS WITH SOURCE/DRAIN TRENCH CONTACT LINERS
#10EPITAXIAL OXIDE TRANSISTOR
#11EPITAXIAL OXIDE TRANSISTOR
#12Epitaxial oxide transistor
#13BIPOLAR JUNCTION TRANSISTOR STRUCTURES
#14Epitaxial oxide materials, structures, and devices
#15Epitaxial oxide materials, structures, and devices
#16SEMICONDUCTOR STRUCTURE WITH CHIRP LAYER
#17Bipolar nanocomposite semiconductors
#18Method for Fabricating Semiconductor Structure Having Enhanced Hole Linear Rashba Spin-Orbit Coupling Effect
#19HIGH-ELECTRON-MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING
#20Electronic device with gallium nitride transistors and method of making same
#21Semiconductor device with strain relaxed layer
#22Semiconductor device with strain relaxed layer
#23Three dimensional memory device containing resonant tunneling barrier and high mobility channel and method of making thereof
#24Epitaxial oxide materials, structures, and devices
#25Epitaxial oxide device with impact ionization
#26Method and epitaxial oxide device with impact ionization
#27Semiconductor device with strain relaxed layer
#28Semiconductor device with strain relaxed layer
#29Vertical semiconductor device with enhanced contact structure and associated methods
#30Lateral gate material arrangements for quantum dot devices
#31Electronic device with gallium nitride transistors and method of making same
#32III-nitride thermal management based on aluminum nitride substrates
#33Semiconductor device with strain relaxed layer
#34Digital circuits comprising quantum wire resonant tunneling transistors
#35Ferroelectric or anti-ferroelectric trench capacitor with spacers for sidewall strain engineering
#36Semiconductor structure with chirp layer
#37Semiconductor device with strain relaxed layer
#38Vertical semiconductor device with enhanced contact structure and associated methods
#39Semiconductor device and method for producing semiconductor device
#40Semiconductor structure with chirp layer
#41Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice
#42Ferroelectric or anti-ferroelectric trench capacitor with spacers for sidewall strain engineering
#43Multi-super lattice for switchable arrays
#44Quantum dot channel (QDC) quantum dot gate transistors, memories and other devices
#45Template-assisted synthesis of 2D nanosheets using nanoparticle templates
#46Multi-super lattice for switchable arrays
#47COMPOUND SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND INFRARED DETECTOR
#48III-V or II-VI compound semiconductor films on graphitic substrates
#49Key-based multi-qubit memory
#50Techniques for monolithic co-integration of thin-film bulk acoustic resonator devices and III-N semiconductor transistor devices
#51Stretchable form of single crystal silicon for high performance electronics on rubber substrates
#52Substrates and transistors with 2D material channels on 3D geometries
#53Quantum dot devices with modulation doped stacks
#54Nitride semiconductor epitaxial stack structure and power device thereof
#55Quantum dot devices with gate interface materials
#56Semiconductor device including enhanced contact structures having a superlattice
#57Method for making a semiconductor device including enhanced contact structures having a superlattice
#58AN APPARATUS AND METHOD OF FORMING AN APPARATUS COMPRISING A GRAPHENE FIELD EFFECT TRANSISTOR
#59Layer, multilevel element, method for fabricating multilevel element, and method for driving multilevel element
#60Layer, multilevel element, method for fabricating multilevel element, and method for driving multilevel element
#61Optoelectronic semiconductor chip
#62Sidewall metal spacers for forming metal gates in quantum devices
#63Superlattice materials and applications
#64Approach to preventing atomic diffusion and preserving electrical conduction using two dimensional crystals and selective atomic layer deposition
#65Coated semiconductor nanocrystals and products including same
#66Method for making a semiconductor device including a superlattice as a gettering layer
#67Semiconductor device including a superlattice as a gettering layer
#68P-doping of group-III-nitride buffer layer structure on a heterosubstrate
#69Nitride semiconductor epitaxial stack structure and power device thereof
#70Template-assisted synthesis of 2D nanosheets using nanoparticle templates
#71Substrates and transistors with 2D material channels on 3D geometries
#72Superlattice materials and applications
#73Superlattice memory having GeTe layer and nitrogen-doped SbTelayer and memory device having the same
#74Semiconductor structure having graded transition bodies
#75Optoelectronic semiconductor chip
#76Semiconductor device
#77Ultraviolet reflective rough adhesive contact
#78P-doping of group-III-nitride buffer layer structure on a heterosubstrate
#79Techniques for forming contacts to quantum well transistors
#80Semiconductor devices with enhanced deterministic doping and related methods
#81Semiconductor chip carriers with monolithically integrated quantum dot devices and method of manufacture thereof
#82SEMICONDUCTOR MULTILAYER STRUCTURE
#83Scalable process for the formation of self aligned, planar electrodes for devices employing one or two dimensional lattice structures
#84Scalable process for the formation of self aligned, planar electrodes for devices employing one or two dimensional lattice structures
#85FABRICATION METHOD OF SEMICONDUCTOR MULTILAYER STRUCTURE
#86Epitaxy technique for growing semiconductor compounds
#87TWO-DIMENSIONAL HETEROJUNCTION INTERLAYER TUNNELING FIELD EFFECT TRANSISTORS
#88P-doping of group-III-nitride buffer layer structure on a heterosubstrate
#89Non-planar quantum well device having interfacial layer and method of forming same
#90III-V or II-VI compound semiconductor films on graphitic substrates
#91Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity control
#92SEMICONDUCTOR MULTILAYER STRUCTURE AND FABRICATION METHOD THEREOF
#93Techniques for forming contacts to quantum well transistors
#94Superlattice materials and applications
#95Non-planar quantum well device having interfacial layer and method of forming same
#96METHOD AND APPARATUS FOR 3D CONCURRENT MULTIPLE PARALLEL 2D QUANTUM WELLS
#97Nitride semiconductor layer, nitride semiconductor device, and method for manufacturing nitride semiconductor layer
#98P-doping of group-III-nitride buffer layer structure on a heterosubstrate
#99Semiconductor devices with enhanced deterministic doping and related methods
#100Methods of forming semiconductor diodes by aspect ratio trapping with coalesced films
#101Three-dimensional quantum well transistor
#102Forming arsenide-based complementary logic on a single substrate
#103Quantum Well IGZO Devices and Methods for Forming the Same
#104III-nitride semiconductor structures with strain absorbing interlayers
#105Integrated circuit devices including strained channel regions and methods of forming the same
#106Heterostructure including a composite semiconductor layer
#107Semiconductor device and manufacturing method thereof
#108SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#109Semiconductor device
#110Semiconductor device and fabrication method thereof
#111METHODS FOR COATING SEMICONDUCTOR NANOCRYSTALS
#112Strained InGaAs quantum wells for complementary transistors
#113Methods for coating semiconductor nanocrystals
#114SEMICONDUCTOR DEVICE HAVING SUPERLATTICE THIN FILM LAMINATED BY SEMICONDUCTOR LAYER AND INSULATOR LAYER
#115Stretchable form of single crystal silicon for high performance electronics on rubber substrates
#116Techniques for forming contacts to quantum well transistors
#117Field effect power transistors
#118Method for manufacturing functional material and electronic component
#119MULTIPLE QUANTUM WELL STRUCTURE
#120Strained InGaAs quantum wells for complementary transistors
#121Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
#122FERROELECTRIC MEMORY DEVICE
#123Tunnel diodes incorporating strain-balanced, quantum-confined heterostructures
#124Semiconductor device and method for manufacturing the same
#125Semiconductor device and fabrication method therefor, and power supply apparatus
#126Three-dimensional quantum well transistor and fabrication method
#127Field effect transistor having double transition metal dichalcogenide channels
#128Ordered superstructures of octapod-shaped nanocrystals, their process of fabrication and use thereof
#129Epitaxy technique for growing semiconductor compounds
#130SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
#131SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
#132InGaN-Based Double Heterostructure Field Effect Transistor and Method of Forming the Same
#133Nanocomposite Material And Its Use In Optoelectronics
#134Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
#135III-Nitride semiconductor structures with strain absorbing interlayer transition modules
#136Semiconductor chip carriers with monolithically integrated quantum dot devices and method of manufacture thereof
#137Non-planar quantum well device having interfacial layer and method of forming same
#138Field effect power transistors
#139Long wavelength infrared superlattice
#140Techniques for forming contacts to quantum well transistors
#141ELECTRONIC DEVICE INCLUDING AN ELECTRICALLY POLLED SUPERLATTICE AND RELATED METHODS
#142SEMICONDUCTOR ELECTRONIC DEVICE AND PROCESS OF MANUFACTURING THE SAME
#143Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
#144Stretchable form of single crystal silicon for high performance electronics on rubber substrates
#145Forming arsenide-based complementary logic on a single substrate
#146ELECTRONIC DEVICE INCLUDING A SELECTIVELY POLABLE SUPERLATTICE
#147METHOD FOR MAKING AN ELECTRONIC DEVICE INCLUDING A SELECTIVELY POLABLE SUPERLATTICE
#148Method for making an electronic device including a poled superlattice having a net electrical dipole moment
#149ELECTRONIC DEVICE INCLUDING A POLED SUPERLATTICE HAVING A NET ELECTRICAL DIPOLE MOMENT
#150Method for making a semiconductor device including a front side strained superlattice layer and a back side stress layer
#151Method for Making Semiconductor Device Including a Strained Superlattice and Overlying Stress Layer and Related Methods
#152FINFET including a superlattice
#153Method for Making a FINFET Including a Superlattice
#154Stretchable form of single crystal silicon for high performance electronics on rubber substrates
#155METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A DOPANT BLOCKING SUPERLATTICE
#156METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A MEMORY CELL WITH A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE
#157SEMICONDUCTOR DEVICE INCLUDING A DOPANT BLOCKING SUPERLATTICE
#158Semiconductor device including a memory cell with a negative differential resistance (NDR) device
#159Epitaxial oxide materials, structures, and devices
#160High mobility group-III nitride transistors with strained channels
#161Method for making a varactor with hyper-abrupt junction region including a superlattice
#162Semiconductor devices including hyper-abrupt junction region including a superlattice
#163Approach to preventing atomic diffusion and preserving electrical conduction using two dimensional crystals and selective atomic layer deposition
#164Random access memory cells using spatial wavefunction switched field-effect transistors