Method of forming a self-aligned charge balanced power DMOS

Semiconductor device and manufacturing method thereof

MOS transistor, fabrication method thereof, and SRAM memory cell circuit

Deep depleted channel MOSFET with minimized dopant fluctuation and diffusion levels

Structure and method for a field effect transistor

EPITAXIAL GROWTH OF SMOOTH AND HIGHLY STRAINED GERMANIUM

SiGe SRAM butted contact resistance improvement

Epitaxial formation of source and drain regions

Thin film hybrid junction field effect transistor

Strained MOS device and methods for forming the same

Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations

Semiconductor device having embedded strain-inducing pattern and method of forming the same

PROCESSES AND STRUCTURES FOR DOPANT PROFILE CONTROL IN EPITAXIAL TRENCH FILL

Source and drain architecture in an active region of a P-channel transistor by tilted implantation

Methods of forming semiconductor devices with metal silicide using pre-amorphization implants

Semiconductor device manufacturing method

Semiconductor device with voltage compensation structure

Heterojunction bipolar transistors with thin epitaxial contacts

Heterojunction bipolar transistors with intrinsic interlayers

Method of forming a semiconductor device

BIPOLAR TRANSISTOR WITH EMBEDDED EPITAXIAL EXTERNAL BASE REGION AND METHOD OF FORMING THE SAME

Semiconductor structure containing an aluminum-containing replacement gate electrode

Semiconductor device including first and second semiconductor materials

Method for improving transistor performance through reducing the salicide interface resistance

Methods and apparatus for bipolar junction transistors and resistors

Method of manufacturing semiconductor device

Self-powered integrated circuit with multi-junction photovoltaic cell

Structure for FinFETs

Strained silicon structure

Vertical polysilicon-germanium heterojunction bipolar transistor

Aqueous cleaning techniques and compositions for use in semiconductor device manufacturing

Strained structure of semiconductor device and method of making the strained structure

Multi-gate devices with replaced-channels and methods for forming the same

Transistor with improved sigma-shaped embedded stressor and method of formation

Self-aligned contact metallization for reduced contact resistance

Integrated circuits having protruding source and drain regions and methods for forming integrated circuits

Semiconductor structure with metal gate and method of fabricating the same

Method for forming semiconductor device

STRUCTURE AND METHOD FOR NFET WITH HIGH K METAL GATE

STRAINED SOI FINFET ON EPITAXIALLY GROWN BOX

Replacement channels

Non-planar FET

Replacement gates to enhance transistor strain

Column IV transistors for PMOS integration

Strained structure of semiconductor device

Method of epitaxial doped germanium tin alloy formation

MOSFETs with channels on nothing and methods for forming the same

MOS device for making the source/drain region closer to the channel region and method of manufacturing the same

Surface tension modification using silane with hydrophobic functional group for thin film deposition

Performing enhanced cleaning in the formation of MOS devices

Semiconductor device and fabrication method thereof

Contact structure of semiconductor device

Selective germanium P-contact metalization through trench

Semiconductor device having tipless epitaxial source/drain regions

FinFET having superlattice stressor

Semiconductor structure and fabrication method thereof

MOS devices having non-uniform stressor doping

Method for fabricating semiconductor device and PMOS device fabricated by the method

Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains

MOS devices with modulated performance and methods for forming the same

Short-Resistant Metal-Gate MOS Transistor and Method of Forming the Transistor

Transistors with uniaxial stress channels

Method for fabricating FinFETs and semiconductor structure fabricated using the method

Laser using locally strained germanium on silicon for opto-electronic applications

Modifying work function in PMOS devices by counter-doping

Structure and method for transistor with line end extension

Semiconductor devices having encapsulated stressor regions and related fabrication methods

Epitaxial replacement of a raised source/drain

Performing treatment on stressors

Semiconductor devices

Semiconductor substrate and semiconductor substrate manufacturing method

Method of forming a semiconductor device

STRESS ENHANCED MOS TRANSISTOR AND METHODS FOR FABRICATION

TRANSISTOR WITH STRESS ENHANCED CHANNEL AND METHODS FOR FABRICATION

Methods of Forming Faceted Stress-Inducing Stressors Proximate the Gate Structure of a Transistor

FinFETs and the methods for forming the same

Semiconductor device with strain-inducing regions and method thereof

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Complementary junction field effect transistor device and its gate-last fabrication method

Replacement gate having work function at valence band edge

Semiconductor device including transistors having embedded source/drain regions each including upper and lower main layers comprising germanium

Structure and method for increasing strain in a device

MOSFETs with reduced contact resistance

Embedded stressors for multigate transistor devices

FinFETs with multiple threshold voltages

Embedded stressors for multigate transistor devices

Method and structure for forming high-K/metal gate extremely thin semiconductor on insulator device

Method for manufacturing vertical-channel tunneling transistor

METHODS OF FORMING FIELD EFFECT TRANSISTORS HAVING SILICON-GERMANIUM SOURCE/DRAIN REGIONS THEREIN

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Stressed channel FET with source/drain buffers

Silicon layer for stopping dislocation propagation

Junction field-effect transistor with raised source and drain regions formed by selective epitaxy

Method for forming a semiconductor transistor device with optimized dopant profile

Semiconductor devices and methods of fabricating the same

Strained-induced mobility enhancement nano-device structure and integrated process architecture for CMOS technologies

Semiconductor device and method of manufacture

Semiconductor device having epitaxial layer

Semiconductor structure

SiGe HBT and Manufacturing Method Thereof

Post-gate shallow trench isolation structure formation

Methods of Forming Source/Drain Regions on Transistor Devices

SIGE HBT HAVING A POSITION CONTROLLED EMITTER-BASE JUNCTION

SEMICONDUCTOR PROCESS

Tucked active region without dummy poly for performance boost and variation reduction

Selective epitaxial growth of semiconductor materials with reduced defects

Method for growing conformal epi layers and structure thereof

Semiconductor device and manufacturing method thereof

Semiconductor device with strained channels induced by high-k capping metal layers

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Semiconductor device fabrication method

Field effect transistor device with raised active regions

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Trench isolation structure

Field effect transistor device with raised active regions

CMOS SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABRICATION METHODS

Strained semiconductor devices having asymmetrical heterojunction structures and methods for the fabrication thereof

SILICON CARBIDE MOSFET WITH HIGH MOBILITY CHANNEL

Device with engineered epitaxial region and methods of making same

Method of manufacturing IC comprising a bipolar transistor and IC

Techniques providing metal gate devices with multiple barrier layers

Transistors having stressed channel regions and methods of forming transistors having stressed channel regions

CIRCUIT SIMULATION METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT

PRE-CLEAN METHOD FOR EPITAXIAL DEPOSITION AND APPLICATIONS THEREOF

Semiconductor device with work function adjusting layer having varied thickness in a gate width direction and methods of making same

MOSFET INTEGRATED CIRCUIT WITH IMPROVED SILICIDE THICKNESS UNIFORMITY AND METHODS FOR ITS MANUFACTURE

Semiconductor devices utilizing partially doped stressor film portions and methods for forming the same

FinFET device having a channel defined in a diamond-like shape semiconductor structure

Graphene switching device having tunable barrier

Semiconductor devices and methods of manufacturing the same

Semiconductor device

Semiconductor device with a buried stressor

Semiconductor device having strained fin structure and method of making the same

Semiconductor device and manufacturing method thereof

Semiconductor device

Fabrication of field-effect transistors with atomic layer doping

N-CHANNEL TRANSISTOR COMPRISING A HIGH-K METAL GATE ELECTRODE STRUCTURE AND A REDUCED SERIES RESISTANCE BY EPITAXIALLY FORMED SEMICONDUCTOR MATERIAL IN THE DRAIN AND SOURCE AREAS

FinFET field-effect transistors with atomic layer doping

Transistor with boot shaped source/drain regions

Semiconductor devices with non-implanted barrier regions and methods of fabricating same

Non-planar germanium quantum well devices

Methods and apparatus for forming silicon germanium-carbon semiconductor structures

Replacement source/drain finFET fabrication

Semiconductor device having epitaxial structures

Replacement gate electrode with planar work function material layers

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Re-growing source/drain regions from un-relaxed silicon layer

Method for fabricating a semiconductor device

Method of fabricating semiconductor devices including PMOS devices having embedded SiGe

Replacement metal gate structure and methods of manufacture

Method of forming polysilicon resistor during replacement metal gate process and semiconductor device having same

Semiconductor device having metal gate and manufacturing method thereof

SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

MOS device with low injection diode

Charge balance semiconductor devices with increased mobility structures

Metal oxide semiconductor having epitaxial source drain regions and method of manufacturing same using dummy gate process

Semiconductor device and method of fabricating the same

Method to modify the shape of a cavity using angled implantation

Semiconductor device with voltage compensation structure

Method of forming a planar field effect transistor structure with recesses for epitaxially deposited source/drain regions

Semiconductor device and method of manufacturing the same

METAL SEMICONDUCTOR ALLOY STRUCTURE FOR LOW CONTACT RESISTANCE

Semiconductor device with lower metal layer thickness in PMOS region

Devices and methods to optimize materials and properties for replacement metal gate structures

Process for forming repair layer and MOS transistor having repair layer

Strained channel field effect transistor

SEMICONDUCTOR DEVICE WITH THRESHOLD VOLTAGE CONTROL AND METHOD OF FABRICATING THE SAME

Semiconductor device and method of manufacturing the same

Semiconductor device and manufacturing method thereof

Devices comprising coated semiconductor nanocrystal heterostructures

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

Method of removing gate cap materials while protecting active area

System and method of plating conductive gate contacts on metal gates for self-aligned contact interconnections

Recessed gate field effect transistor

Method of forming metal gate structure

Method of manufacturing a semiconductor device

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

Method for fabricating semiconductor device

Method of fabricating semiconductor devices

Method of fabricating semiconductor devices

Method of fabricating semiconductor devices

Transistors with embedded strain-inducing material formed in cavities provided by an oxidizing etch process

Accumulation type FinFET, circuits and fabrication method thereof

Performance enhancement in transistors by providing an embedded strain-inducing semiconductor material on the basis of a seed layer

Semiconductor device with strained channel and method of fabricating the same

PMOS threshold voltage control by germanium implantation

Fabrication of MOS device with varying trench depth

Method for fabricating semiconductor device having field effect transistor

Method for fabricating semiconductor device

Control of tunneling junction in a hetero tunnel field effect transistor

High throughput cyclical epitaxial deposition and etch process

SELECTIVE EPITAXIAL GROWTH BY INCUBATION TIME ENGINEERING

Self-aligned contacts in carbon devices

Fabrication methods of integrated semiconductor structure

SOI SiGe-base lateral bipolar junction transistor

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Planar MOSFET with textured channel and gate

Field effect transistor device with shaped conduction channel

Heterojunction device comprising a semiconductor oxide and a resistivity-switching oxide or nitride

Embedded source/drain MOS transistor

Method of fabricating an epitaxial layer

Method of fabricating a semiconductor structure

Early embedded silicon germanium with insitu boron doping and oxide/nitride proximity spacer

Starting structure and protection component comprising such a starting structure

Complementary tunneling field effect transistor and method for forming the same

MANUFACTURING METHOD FOR METAL GATE STRUCTURE

METHOD FOR FABRICATING MOS TRANSISTOR

MICROELECTRONIC DEVICE STRUCTURE AND MANUFACTURING METHOD THEREOF

Stabilized metal silicides in silicon-germanium regions of transistor elements

Monolayer dopant embedded stressor for advanced CMOS

SiC field effect transistor

Semiconductor device

Semiconductor device and fabrication method

Method for increasing penetration depth of drain and source implantation species for a given gate height

Semiconductor device and fabrication method therefor

Selective epitaxial formation of semiconductive films

Methods for fabricating semiconductor devices

Methods of fabricating semiconductor devices

FIELD-EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Semiconductor device

Metal-gate CMOS device

TRANSISTOR STRUCTURE AND MANUFACTURING METHOD WHICH HAS CHANNEL EPITAXIAL EQUIPPED WITH LATERAL EPITAXIAL STRUCTURE

Two-dimensional condensation for uniaxially strained semiconductor fins

SEMICONDUCTOR DEVICE

Semiconductor devices and methods of fabricating the same

Semiconductor devices having tensile and/or compressive strain and methods of manufacturing and design structure

Integrated circuit including a bipolar transistor and methods of making the same

Vertical polysilicon-germanium heterojunction bipolar transistor

Method of forming quantum well mosfet channels having uni-axial strains caused by metal source/drains

Twin-drain spatial wavefunction switched field-effect transistors

Semiconductor integrated circuit devices having different thickness silicon-germanium layers

Strained Ge-on-insulator structure and method for forming the same

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

3D polysilicon diode with low contact resistance and method for forming same

Metal gate structure and manufacturing method thereof

Transistors and methods of manufacturing the same

Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions

Methods related to power semiconductor devices with thick bottom oxide layers

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

Semiconductor device comprising self-aligned contact elements and a replacement gate electrode structure

Transistor with embedded Si/Ge material having enhanced across-substrate uniformity

Fin-transistor formed on a patterned STI region by late fin etch

Forming a non-planar transistor having a quantum well channel

Graphene-containing semiconductor structures and devices on a silicon carbide substrate having a defined miscut angle

Epitaxially Grown Extension Regions for Scaled CMOS Devices

Method of manufacturing strained source/drain structures

METHOD FOR FABRICATING MOS TRANSISTOR

Bipolar transistor and method with recessed base electrode

Drain extended field effect transistors and methods of formation thereof

Defect reduction using aspect ratio trapping

Power MOSFET Having a Strained Channel in a Semiconductor Heterostructure on Metal Substrate

Devices and methods to optimize materials and properties for replacement metal gate structures

STRUCTURE WITH ISOTROPIC SILICON RECESS PROFILE IN NANOSCALE DIMENSIONS

Semiconductor devices having encapsulated stressor regions and related fabrication methods

STRUCTURE WITH ISOTROPIC SILICON RECESS PROFILE IN NANOSCALE DIMENSIONS

Heterojunction tunneling field effect transistors, and methods for fabricating the same

Fabrication of a vertical heterojunction tunnel-FET

Germanium-based quantum well devices

N-type carrier enhancement in semiconductors

N-type carrier enhancement in semiconductors

Asymmetric channel MOSFET

Semiconductor device including embedded isolation regions and method for forming the same

FET structures with trench implantation to improve back channel leakage and body resistance

Semiconductor device including an epitaxy region

Method of introducing strain into channel and device manufactured by using the method

Semiconductor devices with strained source/drain structures

Stressed channel FET with source/drain buffers

SUBSTRATE PROCESSING APPARATUS

METHODS FOR FABRICATING A METAL SILICIDE LAYER AND SEMICONDUCTOR DEVICES USING THE SAME

Method for forming accumulation-mode field effect transistor with improved current capability

Semiconductor structures and methods of manufacturing the same

Semiconductor device

Semiconductor device and method of manufacturing same

Method of manufacturing semiconductor device having silicon carbide layers containing phosphorus

Semiconductor device and manufacturing method thereof

Semiconductor device

STRAINED-INDUCED MOBILITY ENHANCEMENT NANO-DEVICE STRUCTURE AND INTEGRATED PROCESS ARCHITECTURE FOR CMOS TECHNOLOGIES

Reduction of Defect Rates in PFET Transistors Comprising a Silicon/Germanium Semiconductor Material by Providing a Graded Germanium Concentration

High-K metal gate electrode structures formed by cap layer removal without sacrificial spacer

Transistor comprising an embedded sigma shaped sequentially formed semiconductor alloy

Strain Enhancement in Transistors Comprising an Embedded Strain-Inducing Semiconductor Material by Alloy Species Condensation

SUBSTRATE, MANUFACTURING METHOD OF SUBSTRATE, SEMICONDUCTOR ELEMENT, AND MANUFACTURING METHOD OF SEMICONDUCTOR ELEMENT

Phase change memory device and method of manufacturing the same

Method for manufacturing a strained channel MOS transistor

Transistors with high concentration of boron doped germanium

PERFORMANCE ENHANCEMENT IN TRANSISTORS COMPRISING HIGH-K METAL GATE STACKS AND AN EMBEDDED STRESSOR BY PERFORMING A SECOND EPITAXY STEP

Buried oxidation for enhanced mobility

TEST MASK SET AND MASK SET

Structure and method for mobility enhanced MOSFETS with unalloyed silicide

Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

Semiconductor device and method for manufacturing the same

Structure and method for mobility enhanced MOSFETs with unalloyed silicide

Method of fabricating spacers in a strained semiconductor device

MOSFET with source side only stress

Replacement gate devices with barrier metal for simultaneous processing

Source/drain extension control for advanced transistors

SOI SiGe-base lateral bipolar junction transistor

Silicon and silicon germanium nanowire structures