208282 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group , e.g. alloys in different semiconductor regions, e.g. heterojunctions
Method for forming silicon-germanium in the upper portion of a silicon substrate
#4202Methods of fabricating a semiconductor device using a selective epitaxial growth technique
#4203Deposited semiconductor structure to minimize n-type dopant diffusion and method of making
#4204Method for manufacturing a semiconductor device with reduced floating body effect
#4205Recessed drain extensions in transistor device
#4206Transistor with a strained region and method of manufacture
#4207Field effect transistors having a strained silicon channel and methods of fabricating same
#4208Semiconductor transistor having structural elements of differing materials
#4209Semiconductor device and manufacturing method of the same
#4210Structure and method for making strained channel field effect transistor using sacrificial spacer
#4211Bipolar transistor
#4212Phosphorus activated NMOS using SiC process
#4213NFET and PFET devices and methods of fabricating same
#4214Low temperature methods of etching semiconductor substrates
#4215Surface preparation method for selective and non-selective epitaxial growth
#4216Semiconductor device having a junction extended by a selective epitaxial growth (SEG) layer and method of fabricating the same
#4217Method and apparatus for mobility enhancement in a semiconductor device
#4218Transistor and method of manufacturing the same
#4219Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow
#4220Strained semiconductor devices and method for forming at least a portion thereof
#4221Memory device forming methods
#4222Method for producing semiconductor substrate, method for producing field effect transistor, semiconductor substrate, and field effect transistor
#4223Germanium substrate-type materials and approach therefor
#4224Strained semiconductor device structures
#4225Accumulation device with charge balance structure and method of forming the same
#4226Semiconductor substrate, method of manufacturing the same and semiconductor device
#4227Methods for forming a transistor
#4228Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device
#4229Strained-silicon CMOS device and method
#4230Method of fabricating CMOS transistor and CMOS transistor fabricated thereby
#4231Method of fabricating a complementary semiconductor device having a strained channel p-transistor
#4232Polycrystalline SiGe junctions for advanced devices
#4233Method for improving transistor performance through reducing the salicide interface resistance
#4234High speed lateral heterojunction MISFETS realized by 2-dimensional bandgap engineering and methods thereof
#4235Field-effect transistor, semiconductor device, and photo relay
#4236Semiconductor device with heterojunction
#4237Bulk non-planar transistor having strained enhanced mobility and methods of fabrication
#4238Strained-semiconductor-on-insulator device structures with elevated source/drain regions
#4239Bulk non-planar transistor having strained enhanced mobility and methods of fabrication
#4240Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes
#4241Strained germanium-on-insulator device structures
#4242Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain
#4243Method of forming stress-relaxed SiGe buffer layer
#4244Strained-semiconductor-on-insulator device structures
#4245Semiconductor transistor having a stressed channel
#4246Construction of thin strain-relaxed SiGe layers and method for fabricating the same
#4247Semiconductor device and manufacturing method of the same
#4248Strained channel transistor structure with lattice-mismatched zone and fabrication method thereof
#4249Power semiconductor devices and methods of manufacture
#4250Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions
#4251Output prediction logic circuits with ultra-thin vertical transistors and methods of formation
#4252Methods of forming reacted conductive gate electrodes
#4253Amorphous etch stop for the anisotropic etching of substrates
#4254Semiconductor device
#4255Method for improving transistor performance through reducing the salicide interface resistance
#4256Heterostructure resistor and method of forming the same
#4257Trench type mosgated device with strained layer on trench sidewall
#4258Semiconductor substrate and method for fabricating the same
#4259Semiconductor device having high drive current and method of manufacturing thereof
#4260Methods for fabricating final substrates
#4261Methods to fabricate MOSFET devices using selective deposition process
#4262Method of making a semiconductor transistor
#4263MISFET
#4264Semiconductor device and manufacturing method thereof
#4265Silicide/semiconductor structure and method of fabrication
#4266Heterojunction diode with reduced leakage current
#4267Reacted conductive gate electrodes
#4268Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions
#4269Semiconductor device and method for fabricating the same
#4270Method of fabricating a field effect transistor structure with abrupt source/drain junctions
#4271Semiconductor device and method of manufacturing the same
#4272Semiconductor device and method of manufacturing the same
#4273Field-effect type semiconductor device for power amplifier
#4274Heterojunction bipolar transistors with terminals having a non-planar arrangement
#4275Method for induced quantum dots for material characterization, qubits, and quantum computers
#4276Nanosheet electrostatic discharge structure
#4277High performance super-beta NPN (SBNPN)
#4278Semiconductor devices with depleted heterojunction current blocking regions
#4279IC including standard cells and SRAM cells
#4280Bipolar junction transistor (BJT) with 3D wrap around emitter
#4281Removal of epitaxy defects in transistors
#4282Self-aligned base contacts for vertical fin-type bipolar junction transistors
#4283Transistor structure
#4284Method for making a semiconductor device having reduced contact resistance
#4285Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance
#4286Asymmetric threshold voltage VTFET with intrinsic dual channel epitaxy
#4287Heterojunction bipolar transistors with multiple emitter fingers and undercut extrinsic base regions
#4288Field effect transistor contact with reduced contact resistance using implantation process
#4289Integrated assemblies, and methods of forming integrated assemblies
#4290Method for forming source/drain contacts
#4291Vertical field effect transistor formation with critical dimension control
#4292Semiconductor devices with same conductive type but different threshold voltages and method of fabricating the same
#4293Surface treatment of substrates using passivation layers
#4294Method for fabricating metal replacement gate semiconductor device using dummy gate and composite spacer structure
#4295Method of forming a semiconductor component having multiple bipolar transistors with different characteristics
#4296Vertical fin bipolar junction transistor with high germanium content silicon germanium base
#4297Method for forming fin field effect transistor (FinFET) device structure
#4298Selective film growth for bottom-up gap filling
#4299Fin-type field effect transistor structure and manufacturing method thereof
#4300Nanosheet transistors on bulk material
#4301Method of fabricating semiconductor device
#4302Germanium condensation for replacement metal gate devices with silicon germanium channel
#4303Methods of forming a bulk field effect transistor (FET) with sub-source/drain isolation layers and the resulting structures
#4304FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation
#4305Selective etching of amorphous silicon over epitaxial silicon
#4306Two dimension material fin sidewall
#4307Fin-type field effect transistors with single-diffusion breaks and method
#4308Stacked nanosheet field-effect transistor with diode isolation
#4309Forming horizontal bipolar junction transistor compatible with nanosheets
#4310Forming bottom isolation layer for nanosheet technology
#4311Self-aligned sacrificial epitaxial capping for trench silicide
#4312Co-integration of elastic and plastic relaxation on the same wafer
#4313Semiconductor device and method for fabricating the same
#4314Methods of forming uniform and pitch independent fin recess
#4315Structure and formation method of semiconductor device structure
#4316Structure and formation method of semiconductor device with channel layer
#4317Method for manufacturing semiconductor device with epitaxial structure
#4318Monolithic integration of GaN and InP components
#4319Self aligned top extension formation for vertical transistors
#4320Forming a contact for a semiconductor device
#4321Semiconductor device and method for fabricating the same
#4322Forming a fin cut in a hardmask
#4323Vertical floating gate memory with variable channel doping profile
#4324Gate all around device architecture with local oxide
#4325Vertical FET with strained channel
#4326Contact formation for stacked FinFETs
#4327Semiconductor device structure and method for forming the same
#4328Integration of bipolar transistor into complimentary metal-oxide-semiconductor process
#4329Backside semiconductor growth
#4330Antifuse one-time programmable memory
#4331Methods of forming FinFET devices with substantially undoped channel regions
#4332High acceptor level doping in silicon germanium
#4333Fabrication of silicon-germanium Fin structure having silicon-rich outer surface
#4334Heterojunction bipolar transistor with stress component
#4335Field-effect transistor and method of making the same
#4336Method for semiconductor device fabrication with improved source drain epitaxy
#4337Junction formation with reduced Cfor 22NM FDSOI devices
#4338Semiconductor device and manufacturing method thereof
#4339Anti-fuse with reduced programming voltage
#4340Forming semiconductor fins with self-aligned patterning
#4341Semiconductor device and manufacturing method thereof
#4342Vertical field effect transistor including extension and stressors
#4343Semiconductor device and manufacturing method thereof
#4344Bottom-up epitaxy growth on air-gap buffer
#4345Vertical field effect transistors with metallic source/drain regions
#4346Semiconductor device and method for fabricating the same
#4347FinFET device with channel strain
#4348Thin strain relaxed buffers with multilayer film stacks
#4349Self aligned epitaxial based punch through control
#4350Lateral bipolar junction transistor with abrupt junction and compound buried oxide
#4351Contact process flow
#4352Pass-through contact using silicide
#4353Method of forming a III-V compound semiconductor channel post replacement gate
#4354Vertical single electron transistor formed by condensation
#4355Air gap spacer between contact and gate region
#4356Fin-type resistor
#4357Semiconductor device and method of manufacturing the same
#4358Transistor with SiCN/SiOCN mulitlayer spacer
#4359Airgap spacers
#4360Single spacer for complementary metal oxide semiconductor process flow
#4361Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance
#4362Methods of forming strained channel regions on FinFET devices by performing a heating process on a heat-expandable material
#4363Methods of forming strained channel regions on FinFET devices
#4364Method of making a dual strained channel semiconductor device
#4365Method of removing a hard mask layer on a gate structure while forming a protective layer on the surface of a substrate
#4366Multi-gate device and method of fabrication thereof
#4367FinFET device and method of forming the same
#4368Stacked nanowires with multi-threshold voltage solution for pFETs
#4369Semiconductor device with epitaxial structure and manufacturing method thereof
#4370Capacitor in strain relaxed buffer
#4371Confined N-well for SiGe strain relaxed buffer structures
#4372Semiconductor device with trench epitaxy and contact
#4373Integration of heterojunction bipolar transistors with different base profiles
#4374Semiconductor structure
#4375Stacked nanowire semiconductor device
#4376Semiconductor structures with stacked non-planar field effect transistors and methods of forming the structures
#4377Semiconductor device and method for fabricating the same
#4378Integration of a baritt diode
#4379Method and structure for forming dually strained silicon
#4380Semiconductor device and manufacturing method thereof
#4381Semiconductor devices and methods of forming the same
#4382Method for fabricating nanowires for horizontal gate all around devices for semiconductor applications
#4383Semiconductor device and method for fabricating the same
#4384Dual-semiconductor complementary metal-oxide-semiconductor device
#4385Highly scaled tunnel FET with tight pitch and method to fabricate same
#4386Methods of forming reduced thickness spacers in CMOS based integrated circuit products
#4387Structure and method for compressively strained silicon germanium fins for pFET devices and tensily strained silicon fins for nFET devices
#4388Manufacturing method of a fin-shaped field effect transistor and a device thereof
#4389Integrated circuit having strained fins on bulk substrate
#4390Semiconductor device having a fin
#4391Structure and method to form localized strain relaxed SiGe buffer layer
#4392High germanium content FinFET devices having the same contact material for nFET and pFET devices
#4393Silicon-on-insulator substrates having selectively formed strained and relaxed device regions
#4394Virtual relaxed substrate on edge-relaxed composite semiconductor pillars
#4395Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown
#4396Defect reduction with rotated double aspect ratio trapping
#4397Low leakage FinFET
#4398Asymmetric FET
#4399Method for forming nanowire and semiconductor device formed with the nanowire
#4400Field plate in heterojunction bipolar transistor with improved break-down voltage
#4401Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures
#4402Integrated circuit and a method to optimize strain inducing composites
#4403Methods of forming alternative material fins with reduced defect density for a FinFET semiconductor device