Method for manufacturing a semiconductor device having a silicide region comprised of a silicide of a nickel alloy

Strain Enhancement in Transistors Comprising an Embedded Strain-Inducing Semiconductor Material by Alloy Species Condensation

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Transistors with high concentration of boron doped germanium

PERFORMANCE ENHANCEMENT IN TRANSISTORS COMPRISING HIGH-K METAL GATE STACKS AND AN EMBEDDED STRESSOR BY PERFORMING A SECOND EPITAXY STEP

SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME

HYDROGEN PASSIVATION OF INTEGRATED CIRCUITS

Formation of gate dielectrics with uniform nitrogen distribution

Semiconductor device including asymmetric lightly doped drain (LDD) region, related method and design structure

Self-protected electrostatic discharge field effect transistor (SPESDFET), an integrated circuit incorporating the SPESDFET as an input/output (I/O) pad driver and associated methods of forming the SPESDFET and the integrated circuit

Semiconductor device comprising an N-type transistor with an N-type semiconductor containing nitrogen as a gate

Method for forming metal gate and MOS transistor

Self-aligned contact combined with a replacement metal gate/high-K gate dielectric

Self-aligned contact for replacement gate devices

SEMICONDUCTOR DEVICE

Device having adjustable channel stress and method thereof

Source/drain extension control for advanced transistors

Semiconductor device having metal gate and manufacturing method thereof

Methods of forming integrated circuits

Replacement metal gate structures providing independent control on work function and gate leakage current

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

III-V compound semiconductor material passivation with crystalline interlayer

Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material

Self aligned silicided contacts

CMOS devices with reduced short channel effects

Integrated circuits and fabrication methods thereof

Borderless contact for replacement gate employing selective deposition

Method of manufacturing junction barrier schottky diode with dual silicides

Localized compressive strained semiconductor

Semiconductor device with trench isolation having a diffusion preventing film and manufacturing method thereof

Gate etch optimization through silicon dopant profile change

Replacement gate having work function at valence band edge

INTERMIXED SILICIDE FOR REDUCTION OF EXTERNAL RESISTANCE IN INTEGRATED CIRCUIT DEVICES

Semiconductor structure with multi-layer contact etch stop layer structure

Germanium field effect transistors and fabrication thereof

Patterning methodology for uniformity control

Method of manufacturing a semiconductor device

CMOSFET device with controlled threshold voltage characteristics and method of fabricating the same

Replacement gate MOSFET with a high performance gate electrode

METHOD OF FABRICATING SEMICONDUCTOR DEVICE

Quantum electro-optical device using CMOS transistor with reverse polarity drain implant

Integrated circuit having a contact etch stop layer and method of forming the same

SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF

Methods of forming gate dielectric material

Method of fabricating semiconductor device isolation structure

METHOD OF FORMING SILICIDE FOR CONTACT PLUGS

FET structures with trench implantation to improve back channel leakage and body resistance

Device with aluminum surface protection

Superior integrity of a high-K gate stack by forming a controlled undercut on the basis of a wet chemistry

SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING THE SAME

SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME

Transistor level routing

Method for manufacturing semiconductor structure

Fabricating method of metal silicide layer, fabricating method of semiconductor device using the same and semiconductor device fabricated using the method

Method of manufacturing semiconductor device

Method of manufacturing semiconductor device

Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same

Semiconductor device and method of manufacturing semiconductor device

Semiconductor device including high-k/metal gate electrode

Semiconductor device and method of manufacturing semiconductor device

High voltage metal-oxide-semiconductor transistor with stable threshold voltage and related manufacturing method

Semiconductor device and method of manufacturing the same

Field effect transistor

Semiconductor device manufacturing method

Method of manufacturing a semiconductor device

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Integrated circuits and methods of design and manufacture thereof

Field effect transistors having improved breakdown voltages and methods of forming the same

Method and apparatus for protection of an anti-fuse element in a high-voltage integrated circuit

Stressed barrier plug slot contact structure for transistor performance enhancement

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE DEVICE

TRANSISTOR STRUCTURE AND METHOD OF FABRICATING THE SAME

Nonvolatile Memory Device and Method of Manufacturing the Same

Semiconductor device and manufacturing method thereof

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES

Method for Manufacturing Contacts for a Semiconductor Device, and Semiconductor Device Having Such Contacts

High performance low power bulk FET device and method of manufacture

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Semiconductor device production method

Semiconductor device and manufacturing method thereof

Gate electrodes of a semiconductor device formed by a hard mask and double exposure in combination with a shrink spacer

Semiconductor Integrated Circuit Device Including an Epitaxial Layer

Transistors having a control gate and one or more conductive structures

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

Metal gate transistor and method for fabricating the same

Methods of forming CMOS transistors using tensile stress layers and hydrogen plasma treatment

Semiconductor device and method of forming low voltage MOSFET for portable electronic devices and data processing centers

Programmable FETs using Vt-shift effect and methods of manufacture

Semiconductor device and method of manufacturing the same

Circuit and system of aggregated area anti-fuse in CMOS processes

Field Effect Transistor Device With Self-Aligned Junction

Semiconductor device and related method of fabrication

APPARATUS WITH CAPACITIVE COUPLING AND ASSOCIATED METHODS

Semiconductor structure having a contact-level air gap within the interlayer dielectrics above a semiconductor device and a method of forming the semiconductor structure using a self-assembly approach

METHOD FOR MANUFACTURING A STRAINED SEMICONDUCTOR DEVICE

Method for fabricating semiconductor device

Methods of fabricating MOS transistors having recesses with elevated source/drain regions

SEMICONDUCTOR DEVICE

N-well/P-well strap structures

Semiconductor device, semiconductor integrated circuit, SRAM, and method for producing Dt-MOS transistor

ESD protection device and method for fabricating the same

Method for introducing channel stress and field effect transistor fabricated by the same

Contact etch stop layers of a field effect transistor

MOS transistor structure with in-situ doped source and drain and method for forming the same

Method for manufacturing a semiconductor device using a nitrogen containing oxide layer

METHOD AND STRUCTURE TO IMPROVE FORMATION OF SILICIDE

Spacer shape engineering for void-free gap-filling process

SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME

Transistor with Embedded Strain-Inducing Material and Dummy Gate Electrodes Positioned Adjacent to the Active Region

Methods for manufacturing dielectric films

Method for fabricating a gate structure

Semiconductor device with reduced contact resistance and method of manufacturing thereof

Semiconductor device with a depletion channel and method of manufacturing the same

Method for forming a nickelsilicide FUSI gate

BODY CONTACT DEVICE STRUCTURE AND METHOD OF MANUFACTURE

Method of forming semiconductor structure

Silicon wafer and method of manufacturing same

Interconnection structure for N/P metal gates

Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE GRADED JUNCTIONS AND METHOD FOR FORMING THE SAME

Method for making a disilicide

Strained semiconductor-on-insulator by addition and removal of atoms in a semiconductor-on-insulator

Method for manufacturing semiconductor device

Semiconductor device and method of manufacturing the same

Method for fabricating field-effect transistor

Semiconductor device and method for manufacturing the same in which variations are reduced and characteristics are improved

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Semiconductor device and method for manufacturing the same

Asymmetric channel MOSFET

METHOD FOR FORMING SILICON OXIDE FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Method of fabricating integrated circuit device, including removing at least a portion of a spacer

Local charge and work function engineering on MOSFET

Gate electrode and gate contact plug layouts for integrated circuit field effect transistors

Replacement Gate Approach for High-K Metal Gate Stacks Based on a Non-Conformal Interlayer Dielectric

Semiconductor device including a guard ring surrounding an inductor

Semiconductor devices with asymmetric halo implantation and method of manufacture

Short channel semiconductor devices with reduced halo diffusion

Shallow junction formation and high dopant activation rate of MOS devices

Electronic device including a tunnel structure

Formation of shallow junctions by diffusion from a dielectronic doped by cluster or molecular ion beams

NOVEL METHOD TO ENHANCE CHANNEL STRESS IN CMOS PROCESSES

Manufacturing method of semiconductor device and semiconductor device

Transistor with threshold voltage set notch and method of fabrication thereof

Method for reshaping silicon surfaces with shallow trench isolation

STRUCTURE AND METHOD TO REDUCE FRINGE CAPACITANCE IN SEMICONDUCTOR DEVICES

Semiconductor devices fabricated by doped material layer as dopant source

Ion implantation distribution generating method and simulator

METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Method to form a semiconductor device having gate dielectric layers of varying thickness

System and method for the manufacture of semiconductor devices by the implantation of carbon clusters

Transistor performance improving method with metal gate

Semiconductor devices having stressor regions and related fabrication methods

Formation of a super steep retrograde channel

Method to enhance channel stress in CMOS processes

Semiconductor device and manufacturing method for the same

Semiconductor device

Replacement gate MOSFET with self-aligned diffusion contact

Method of forming metal gate structure and method of forming metal gate transistor

Semiconductor device production method

Method of manufacturing semiconductor device

Integrated circuit device and electrostatic discharge protecting circuit thereof

High-k gate dielectric and method of manufacture

Multi-strained source/drain structures

Integrated circuits and manufacturing methods thereof

Double diffused drain metal-oxide-simiconductor devices with floating poly thereon and methods of manufacturing the same

Modifying work function in PMOS devices by counter-doping

Lateral MOS power transistor having backside terminal electrode

Semiconductor structures using replacement gate and methods of manufacture

MOSFET gate and source/drain contact metallization

Method of forming an insulator layer in a semiconductor structure and structures resulting therefrom

Planarization of a material system in a semiconductor device by using a non-selective in situ prepared slurry

Reduced STI loss for superior surface planarity of embedded stressors in densely packed semiconductor devices

Stress memorization with reduced fringing capacitance based on silicon nitride in MOS semiconductor devices

Semiconductor Device Comprising Contact Elements and Metal Silicide Regions Formed in a Common Process Sequence

Precise resistor on a semiconductor device

MOS device

Native devices having improved device characteristics and methods for fabrication

Semiconductor device comprising metal gates and semiconductor resistors formed on the basis of a replacement gate approach

Semiconductor device and method for manufacturing the same

Poly profile engineering to modulate spacer induced stress for device enhancement

Field effect transistor

Single gate semiconductor device

Semiconductor device and method of making the same

METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE

CMOS devices having dual high-mobility channels

RECESSED CHANNEL ARRAY TRANSISTOR (RCAT) IN REPLACEMENT METAL GATE (RMG) LOGIC FLOW

Semiconductor device and fabrication thereof

Semiconductor structure for reducing band-to-band tunneling (BTBT) leakage

MOS devices with improved source/drain regions with SiGe

Self-aligned process for nanotube/nanowire FETs

SEMICONDUCTOR DEVICE WITH CARBON ATOMS IMPLANTED UNDER GATE STRUCTURE

Method of manufacturing semiconductor device

Semiconductor memory device

Semiconductor device having metal gate and manufacturing method thereof

METHODS OF FORMING STRAINED SEMICONDUCTOR CHANNELS

Low power semiconductor transistor structure and method of fabrication thereof

Multi-threshold voltage device and method of making same

Oxide-nitride-oxide stack having multiple oxynitride layers

Replacement gate approach for high-k metal gate stacks by avoiding a polishing process for exposing the placeholder material

Method of manufacturing flash memory cell

Image sensing device and camera

METAL GATE FILL BY OPTIMIZING ETCH IN SACRIFICIAL GATE PROFILE

Semiconductor device and manufacturing method thereof

Method of manufacturing semiconductor device, and semiconductor device

Dual sidewall spacer for seam protection of a patterned structure

Semiconductor device with a buried stressor

Structure and method of creating entirely self-aligned metallic contacts

SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND PROCESS FOR PRODUCING SEMICONDUCTOR SUBSTRATE

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device

Strain preserving ion implantation methods

Spacer protection and electrical connection for array device

Work function adjustment with the implant of lanthanides

Integration scheme for dual work function metal gates

Method for fabricating a gate structure

Implant damage control by in-situ C doping during sige epitaxy for device applications

Method of sensing magnitude of current through semiconductor power device

Semiconductor devices with buried bit lines and methods of manufacturing semiconductor devices

Method of forming a semiconductor device featuring a gate stressor and semiconductor device

Semiconductor device and manufacturing method thereof

Penetrating implant for forming a semiconductor device

Technique for enhancing transistor performance by transistor specific contact design

High voltage metal oxide semiconductor device and method for making same

SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND DOPANT DIFFUSION RETARDING IMPLANTS AND RELATED METHODS

Integrated circuitry

Transistors comprising high-k metal gate electrode structures and adapted channel semiconductor materials

Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budget

Scavanging metal stack for a high-k gate dielectric

METAL ELECTRODE AND SEMICONDUCTOR ELEMENT USING THE SAME

Semiconductor device and manufacturing method thereof

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Thermal treatment equipment and method for heat-treating

Method for forming a transistor with recessed drain and source areas and non-conformal metal silicide regions

Contact formation method, semiconductor device manufacturing method, and semiconductor device

Top gate thin-film transistor, display device, and electronic apparatus

Power MOSFET with a gate structure of different material

METHOD OF FABRICATING SEMICONDUCTOR DEVICE

Gate stack for high-K/metal gate last process

Lightly doped source/drain last method for dual-epi integration

Self-aligned two-step STI formation through dummy poly removal

ADJUSTMENT OF TRANSISTOR CHARACTERISTICS BASED ON A LATE WELL IMPLANTATION

Semiconductor device formed by a replacement gate approach based on an early work function metal

Replacement gate approach based on a reverse offset spacer applied prior to work function metal deposition

Substrate processing method, and method of manufacturing semiconductor device

Semiconductor device and semiconductor device manufacturing method

Dual metal and dual dielectric integration for metal high-K FETs

Method of manufacturing a junction barrier Schottky diode with dual silicides

THERMAL PROCESS

MANUFACTURING A SEMICONDUCTOR DEVICE

NMOS TRANSISTOR WITH ENHANCED STRESS GATE

Advanced forming method and structure of local mechanical strained transistor

Methods and apparatus of fluorine passivation

CMOSFET device with controlled threshold voltage and method of fabricating the same

Semiconductor contact structure and method of fabricating the same

High-voltage MOS devices having gates extending into recesses of substrates

Method for fabricating semiconductor devices using stress engineering

Method to form a semiconductor device having gate dielectric layers of varying thicknesses

Enhanced integrity of a high-K metal gate electrode structure by using a sacrificial spacer for cap removal

Enhanced confinement of high-K metal gate electrode structures by reducing material erosion of a dielectric cap layer upon forming a strain-inducing semiconductor alloy

SILICON-BASED SEMICONDUCTOR DEVICE COMPRISING eFUSES FORMED BY AN EMBEDDED SEMICONDUCTOR ALLOY

High temperature anneal for aluminum surface protection

Semiconductor resistors formed at a lower height level in a semiconductor device comprising metal gates

High-K metal gate electrode structures formed at different process stages of a semiconductor device

Dielectric film manufacturing method

Field Effect Transistors Having Gate Electrode Silicide Layers with Reduced Surface Damage

Enhanced confinement of sensitive materials of a high-K metal gate electrode structure

Method of fabricating a semiconductor device including high voltage and low voltage MOS devices

Method for Improving the Thermal Stability of Silicide

High temperature gate replacement process

Semiconductor device

Indium, carbon and halogen doping for PMOS transistors

Low noise and high performance LSI device

Carbon and nitrogen doping for selected PMOS transistor on an integrated circuit

Method of fabricating a semiconductor device having gate finger elements extended over a plurality of isolation regions formed in the source and drain regions

FORMING A CARBON CONTAINING LAYER TO FACILITATE SILICIDE STABILITY IN A SILICON GERMANIUM MATERIAL

Method for dual energy implantation for ultra-shallow junction formation of MOS devices

Metal gate structure

Semiconductor device

Transistors with an extension region having strips of differing conductivity type and methods of forming the same

Methods of forming CMOS transistors with high conductivity gate electrodes

SEMICONDUCTOR DEVICE HAVING A LOCALLY BURIED INSULATION LAYER AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

Transistor of semiconductor device and method of fabricating the same

Lateral double-diffused MOSFET

Stressed barrier plug slot contact structure for transistor performance enhancement

NMOS architecture involving epitaxially-grown in-situ N-type-doped embedded eSiGe:C source/drain targeting

Method for fabricating a dual-orientation group-IV semiconductor substrate

Method of manufacturing a semiconductor device having improved transistor performance

Plasma doping method and manufacturing method of semiconductor device

Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus

Semiconductor structure having a metal gate with side wall spacers

Enhancing MOSFET performance by optimizing stress properties

Semiconductor contact barrier

Advanced transistors with punch through suppression

Complementary metal oxide semiconductor device having metal gate stack structure and method of manufacturing the same

Semiconductor device with high K dielectric control terminal spacer structure

High-k/metal gate transistor with L-shaped gate encapsulation layer

Inducing strain in the channels of metal gate transistors

Method for obtaining quality ultra-shallow doped regions and device having same