208482 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched; Unipolar devices, e.g. field effect transistors; Field effect transistors with field effect produced by an insulated gate without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs
HEMT TRANSISTOR WITH ADJUSTED GATE-SOURCE DISTANCE, AND MANUFACTURING METHOD THEREOF
#2LATERAL GALLIUM OXIDE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
#3Field Effect Transistor Device with Blocking Region
#4High Voltage Switching Device
#5WRAPAROUND GATE STRUCTURE
#6SEMICONDUCTOR DEVICE INCLUDING FIELD EFFECT TRANSISTOR FORMED ON SOI SUBSTRATE
#7SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME
#8DEPFET TRANSISTOR
#9Low Leakage Replacement Metal Gate FET
#10Semiconductor device with multichannel heterostructure and manufacturing method thereof
#11SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#12STRUCTURE WITH ISOLATED WELL
#13STRAINED SEMICONDUCTOR USING ELASTIC EDGE RELAXATION OF A STRESSOR COMBINED WITH BURIED INSULATING LAYER
#14DEVICE WITH ISOLATION STRUCTURES IN ACTIVE REGIONS
#15GALLIUM NITRIDE (GAN) LAYER ON SUBSTRATE CARBURIZATION FOR INTEGRATED CIRCUIT TECHNOLOGY
#16STRUCTURE WITH BACK-GATE HAVING OPPOSITELY DOPED SEMICONDUCTOR REGIONS
#17NITRIDE SEMICONDUCTOR DEVICE
#18MOSFET TRANSISTOR
#19SEMICONDUCTOR STRUCTURES INCLUDING CONDUCTING STRUCTURE AND METHODS FOR MAKING THE SAME
#20Integrated circuit devices and fabrication techniques
#21SEMICONDUCTOR DEVICE AND MANUFACTURING PROCESS FOR THE SAME
#22TRANSISTORS DESIGNED WITH REDUCED LEAKAGE
#23MOS TRANSISTOR ON SOI STRUCTURE
#24CHANNEL STOP AND WELL DOPANT MIGRATION CONTROL IMPLANT FOR REDUCED MOS THRESHOLD VOLTAGE MISMATCH
#25Method for Forming SiGe Channel
#26STRUCTURE INCLUDING TRANSISTOR USING BURIED INSULATOR LAYER AS GATE DIELECTRIC AND TRENCH ISOLATIONS IN SOURCE AND DRAIN
#27MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS HAVING A COMMON ELECTRODE
#28MICROELECTRONIC DEVICE WITH TWO FIELD-EFFECT TRANSISTORS
#29Formation of single crystal semiconductors using planar vapor liquid solid epitaxy
#30GALLIUM NITRIDE (GAN) TRANSISTORS WITH LATERAL DRAIN DEPLETION
#31METHOD FOR MANUFACTURING HIGH-VOLTAGE TRANSISTORS ON A SILICON-ON-INSULATOR TYPE BULK
#32MULTI-CHANNEL REPLACEMENT METAL GATE DEVICE
#33Deep nwell contact structures
#34Structure including transistor using buried insulator layer as gate dielectric and trench isolations in source and drain
#35Single-gate field effect transistor and method for modulating the drive current thereof
#36Channel stop and well dopant migration control implant for reduced MOS threshold voltage mismatch
#37Integrated circuit with continuous active region and raised source/drain region
#38Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#39Semiconductor device and method of fabricating the same
#40SEMICONDUCTOR DEVICE
#41Device architectures with tensile and compressive strained substrates
#42SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#43Semiconductor device
#44Semiconductor integrated circuit
#45DEPFET transistor and method of manufacturing a DEPFET transistor
#46FRONT END INTEGRATED CIRCUITS INCORPORATING DIFFERING SILICON-ON-INSULATOR TECHNOLOGIES
#47HEMT transistor with adjusted gate-source distance, and manufacturing method thereof
#48Drain-extended transistor
#49Formation of single crystal semiconductors using planar vapor liquid solid epitaxy
#50Semiconductor device with multichannel heterostructure and manufacturing method thereof
#51Power devices having tunable saturation current clamps therein that support improved short-circuit capability
#52Method for fabricating semiconductor device with programmable element
#53Method for improving size of contact holes of FDSOI device
#54Semiconductor device with programmable element and method for fabricating the same
#55SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#56FET device insensitive to noise from drive path
#57Buried channel metal-oxide-semiconductor field-effect transistor (MOSFET) and forming method thereof
#58Integrated circuit devices and fabrication techniques
#59Semiconductor device
#60Radio frequency (RF) amplifier device on silicon-on-insulator (SOI) and method for fabricating thereof
#61Electronic devices and systems, and methods for making and using the same
#62High voltage switching device
#63Field effect transistors with back gate contact and buried high resistivity layer
#64Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#65Self-biased or biasing transistor(s) for an electronic voltage divider circuit, using insulating thin-film or FDSOI (fully depleted silicon on insulator) technology
#663D MEMORY DEVICE COMPRISING SRAM TYPE MEMORY CELLS WITH ADJUSTABLE BACK-BIAS
#67Method for fabricating transistor with thinned channel
#68Formation of single crystal semiconductors using planar vapor liquid solid epitaxy
#69Semiconductor device and method of fabricating the same
#70Epitaxial structure of Ga-face group III nitride, active device, and gate protection device thereof
#71Half-bridge circuit including integrated level shifter transistor
#72Method for forming spacers of a transistor
#73Field effect transistor
#74Semiconductor structure for fully depleted silicon-on-insulator (FDSOI) transistor
#75SEMICONDUCTOR DEVICE
#76Semiconductor device including a field effect transistor
#77Configurations of composite devices comprising of a normally-on FET and a normally-off FET
#78Diamond MIS transistor
#79Radio frequency transistor for improving radio frequency switch performance, chip and mobile terminal
#80Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#81Self-biasing and self-sequencing of depletion mode transistors
#82High voltage lateral junction diode device
#83HEMT transistor with adjusted gate-source distance, and manufacturing method thereof
#84Fin structures on a fully depleted semiconductor layer including a channel region
#85Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI
#86Display system and method for forming an output buffer of a source driver
#87Depletion mode gate in ultrathin FINFET based architecture
#88Devices with channel extension regions
#89Semiconductor device and method of manufacturing the same
#90SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR SAME
#91Method for fabricating transistor with thinned channel
#92Transistor with gate extension to limit second gate effect
#93Methods, apparatus, and system for frequency doubler using a passive mixer for millimeter wave devices
#94High voltage switching device
#95Integrated circuit devices and fabrication techniques
#96Self-biasing and self-sequencing of depletion-mode transistors
#97Reference voltage generation device
#98Fully depleted semiconductor on insulator transistor with enhanced back biasing tunability
#99High voltage switching device
#100Source follower device for enhanced image sensor performance
#101Electronic devices and systems, and methods for making and using the same
#102Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines
#103Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#104Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#105Programmable non-volatile memory with low off current
#106High voltage depletion mode MOS device with adjustable threshold voltage and manufacturing method thereof
#107Circuit tuning scheme for FDSOI
#108MTP memory for SOI process
#109FDSOI with on-chip physically unclonable function
#110Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions
#111SEMICONDUCTOR STRUCTURE INCLUDING ONE OR MORE NONVOLATILE MEMORY CELLS AND METHOD FOR THE FORMATION THEREOF
#112Semiconductor structure
#113Method of forming bandgap reference integrated circuit
#114SINGLE STRUCTURE CASCODE DEVICE
#115Multi-threshold voltage field effect transistor and manufacturing method thereof
#116INTEGRATED CIRCUIT COMPRISING MOS TRANSISTORS AND METHOD OF MANUFACTURING THE SAME
#117Semiconductor circuits, devices and methods
#118METHOD FOR OPERATION OF A FIELD EFFECT TRANSISTOR ARRANGEMENT
#119Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#120Double balanced mixer
#121SELF-BIASING AND SELF-SEQUENCING OF DEPLETION-MODE TRANSISTORS
#122Transistor device with threshold voltage adjusted by body effect
#123Semiconductor device structure with self-aligned capacitor device
#124Semiconductor devices on two sides of an isolation layer
#125METHOD OF FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
#126Method for fabricating transistor with thinned channel
#127Semiconductor device comprising a floating gate flash memory device
#128Fully depleted silicon-on-insulator device formation
#129Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dial raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI
#130Method of forming spacers for a gate of a transistor
#131Method for producing on the same transistors substrate having different characteristics
#132Method of making a transistor having a source and a drain obtained by recrystallization of semiconductor
#133Method for the formation of transistors PDSO1 and FDSO1 on a same substrate
#134HIGH-VOLTAGE TRANSISTOR DEVICE
#135Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI
#136SOI WAFERS AND DEVICES WITH BURIED STRESSOR
#137Buried channel deeply depleted channel transistor
#138Integrated circuit devices and methods
#139Double balanced mixer
#140Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate
#141Semiconductor structure including a transistor including a gate electrode region provided in a substrate and method for the formation thereof
#142FDSOI with on-chip physically unclonable function
#143Integrated circuit devices and fabrication techniques
#144Method and structure for forming on-chip anti-fuse with reduced breakdown voltage
#145Epi facet height uniformity improvement for FDSOI technologies
#146Method of localized modification of the stresses in a substrate of the SOI type, in particular FD SOI type, and corresponding device
#147Method of manufacturing a transistor
#148Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#149Raised e-fuse
#150FET gate stabilizing circuit
#151Electronic devices and systems, and methods for making and using the same
#152Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit
#153Semiconductor device and method of manufacturing the same
#154Semiconductor Device With Self-Aligned Back Side Features
#155Method and structure for forming on-chip anti-fuse with reduced breakdown voltage
#156Approach for an area-efficient and scalable CMOS performance based on advanced Silicon-On-Insulator (SOI), Silicon-On-Sapphire (SOS) and Silicon-On-Nothing (SON) technologies
#157BULEX contacts in advanced FDSOI techniques
#158Buried channel deeply depleted channel transistor
#159UTBB FDSOI split gate devices
#160Undercut insulating regions for silicon-on-insulator device
#161Suppression of back-gate transistors in RF CMOS switches built on an SOI substrate
#162FDSOI voltage reference
#163Fully depleted silicon-on-insulator device formation
#164Fully depleted silicon-on-insulator device formation
#165Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
#166Method for forming spacers for a transistor gate
#167Electronic devices and systems, and methods for making and using the same
#168Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same
#169Lateral/vertical semiconductor device
#170Preventing unauthorized use of integrated circuits for radiation-hard applications
#171Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#172Integrated circuit product with bulk and SOI semiconductor devices
#173Methodology to avoid gate stress for low voltage devices in FDSOI technology
#174Complex semiconductor devices of the SOI type
#175Semiconductor device having a channel separation trench
#176Devices having multiple threshold voltages and method of fabricating such devices
#177METHOD OF FORMATION OF A SUBSTRATE OF THE SOI, IN PARTICULAR THE FDSOI, TYPE ADAPTED TO TRANSISTORS HAVING GATE DIELECTRICS OF DIFFERENT THICKNESSES, CORRESPONDING SUBSTRATE AND INTEGRATED CIRCUIT
#178Method and structure of making enhanced UTBB FDSOI devices
#179Method and structure of making enhanced UTBB FDSOI devices
#180Process for producing, from an SOI and in particular an FDSOI type substrate, transistors having gate oxides of different thicknesses, and corresponding integrated circuit
#181Fully depleted device with buried insulating layer in channel region
#182Method and structure to reduce parasitic capacitance in raised source/drain silicon-on-insulator devices
#183LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
#184Semiconductor device and related method of adjusting threshold voltage in semiconductor device during manufacture via counter doping in diffusion region
#185SEMICONDUCTOR STRUCTURE HAVING FINFET ULTRA THIN BODY
#186FIELD EFFECT TRANSISTOR ARRANGEMENT
#187Method to form localized relaxed substrate by using condensation
#188Epitaxial Channel Transistors and Die With Diffusion Doped Channels
#189Method for fabricating transistor with thinned channel
#190Method and structure of making enhanced UTBB FDSOI devices
#191Method and structure of making enhanced UTBB FDSOI devices
#192Semiconductor device
#193RF SOI switch with backside cavity and the method to form it
#194Semiconductor device
#195Process for integrated circuit fabrication including a liner silicide with low contact resistance
#196Electronic component
#197Bandgap reference circuit
#198Semiconductor device with self-aligned back side features
#199Lateral/vertical semiconductor device
#200Semiconductor device
#201Process for producing FET transistors
#202Non-volatile semiconductor memory device and manufacturing method of p-channel MOS transistor
#203Electronic devices and systems, and methods for making and using same
#204Multi-layer strained channel FinFET
#205Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
#206ISOLATION METHODS FOR LEAKAGE, LOSS AND NON-LINEARITY MITIGATION IN RADIO-FREQUENCY INTEGRATED CIRCUITS ON HIGH-RESISTIVITY SILICON-ON-INSULATOR SUBSTRATES
#207Transistor having tungsten-based buried gate structure, method for fabricating the same
#208Method of forming Ga2O3-based crystal film and crystal multilayer structure
#209Half-bridge circuit with a low-side transistor and a level shifter transistor integrated in a common semiconductor body
#210Semiconductor device and integrated circuit
#2113 dimensional semiconductor device having a lateral channel
#212Semiconductor device including a separation region formed around a first circuit region
#213Semiconductor device
#214Half-bridge circuit including a low-side transistor and a level shifter transistor integrated in a common semiconductor body
#215Semiconductor-on-insulator device including stand-alone well implant to provide junction butting
#216Semiconductor-on-insulator device including stand-alone well implant to provide junction butting
#217Semiconductor device having buried channel array and method of manufacturing the same
#218Modular approach for reducing flicker noise of MOSFETs
#219Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
#220Multi-gate transistor
#221Semiconductor device and manufacturing method of semiconductor device
#222Lateral devices containing permanent charge
#223Insulated gate field effect transistor and method of manufacturing the same
#224Transistor device and fabrication method
#225Memory device
#226Electronic devices and systems, and methods for making and using the same
#227Lateral/vertical semiconductor device
#228Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
#229Split-gate lateral diffused metal oxide semiconductor device
#230Transistors, methods of manufacture thereof, and image sensor circuits
#231Semiconductor device
#232Undercut insulating regions for silicon-on-insulator device
#233Semiconductor arrangement with a power transistor and a high voltage device integrated in a common semiconductor body
#234Semiconductor arrangement with a superjunction transistor and a further device integrated in a common semiconductor body
#235Electronic devices and systems, and methods for making and using the same
#236Electronic devices and systems, and methods for making and using the same
#237High-voltage semiconductor device with electrostatic discharge protection
#238Electronic devices and systems, and methods for making and using the same
#239METHODS OF FABRICATING FIELD EFFECT TRANSISTORS INCLUDING TITANIUM NITRIDE GATES OVER PARTIALLY NITRIDED OXIDE AND DEVICES SO FABRICATED
#240Method and structure for compound semiconductor contact
#241SiC semiconductor power device
#242Split-gate lateral diffused metal oxide semiconductor device
#243SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
#244Method for forming accumulation-mode field effect transistor with improved current capability
#245Semiconductor device and method for driving same
#246Single structure cascode device
#247Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
#248Transistor arrangement with a first transistor and with a plurality of second transistors
#249Semiconductor element, semiconductor device, and electric power converter
#250Electrical switch using gated resistor structures and three-dimensional integrated circuits using the same
#251Normally-Off Field Effect Transistor, a Manufacturing Method Therefor and a Method for Programming a Power Field Effect Transistor
#252NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND DEPLETION-TYPE MOS TRANSISTOR
#253Semiconductor device having depletion type MOS transistor
#254Techniques for providing a semiconductor memory device
#255Insulated gate field effect transistor
#256Silicon carbide switching devices including P-type channels
#257Double gate depletion mode MOSFET
#258Electronic devices and systems, and methods for making and using the same
#259Method for fabricating transistor with thinned channel
#260SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#261Depletion MOS transistor and enhancement MOS transistor
#262METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE, AND A SEMICONDUCTOR DEVICE
#263Semiconductor device
#264METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING AN ARRAY STRUCTURE COMPRISING THE SAME DEVICES
#265Semiconductor device used as high-speed switching device and power device
#266Semiconductor device and manufacturing method thereof
#267METHODS OF FABRICATING FIELD EFFECT TRANSISTORS INCLUDING TITANIUM NITRIDE GATES OVER PARTIALLY NITRIDED OXIDE AND DEVICES SO FABRICATED
#268Semiconductor device
#269High voltage device with constant current source and manufacturing method thereof
#270Non-volatile semiconductor memory device and depletion-type MOS transistor
#271Semiconductor device method of manfacturing a quantum well structure and a semiconductor device comprising such a quantum well structure
#272Double gate depletion mode MOSFET
#273Normally-off electronic switching device for on-off control of electric circuit
#274LOW TEMPERATURE COEFFICIENT FIELD EFFECT TRANSISTORS AND DESIGN AND FABRICATION METHODS
#275Method for manufacturing a constant current source device
#276SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#277Semiconductor device and method for fabricating the same
#278SEMICONDUCTOR DEVICE AND ELECTRIC POWER CONVERTER, DRIVE INVERTER, GENERAL-PURPOSE INVERTER AND SUPER-POWER HIGH-FREQUENCY COMMUNICATION EQUIPMENT USING THE SEMICONDUCTOR DEVICE
#279SELF-BIASING TRANSISTOR STRUCTURE AND AN SRAM CELL HAVING LESS THAN SIX TRANSISTORS
#280Method of high voltage operation of field effect transistor
#281Metal gated ultra short MOSFET devices
#282Complementary Asymmetric High Voltage Devices and Method of Fabrication
#283Metal oxide semiconductor device and method for operating an array structure comprising the same devices
#284Silicon carbide semiconductor device having high channel mobility and method for manufacturing the same
#285N+ POLY ON HIGH-K DIELECTRIC FOR SEMICONDUCTOR DEVICES
#286Structure and method for forming accumulation-mode field effect transistor with improved current capability
#287Lateral field-effect transistor having an insulated trench gate electrode
#288SiC semiconductor device and method for manufacturing the same
#289Method for metal gated ultra short MOSFET devices
#290Transfer transistor of CMOS image sensor
#291Methods of forming silicon carbide switching devices including P-type channels
#292Transistor Structure and Method of Manufacturing Thereof
#293Metal gated ultra short MOSFET devices
#294Semiconductor device comprising buried channel region and method for manufacturing the same
#295High-breakdown-voltage insulated gate semiconductor device
#296Semiconductor device and method for manufacturing same
#297Multi-operational mode transistor with multiple-channel device structure
#298Gate technology for strained surface channel and strained buried channel MOSFET devices
#299Method for manufacturing silicon carbide semiconductor device having high channel mobility
#300Semiconductor device used as high-speed switching device and power device