212684 ⎘
Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by; Details of package parts other than the semiconductor or other solid state devices to be connected; Cap; Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C Copper [Cu] as principal constituent
SEMICONDUCTOR PACKAGE STRUCTURES AND METHODS OF FORMING THE SAME
#2REINFORCED STRUCTURE WITH CAPPING LAYER
#3DAM STRUCTURE ON LID TO CONSTRAIN A THERMAL INTERFACE MATERIAL IN A SEMICONDUCTOR DEVICE PACKAGE STRUCTURE AND METHODS FOR FORMING THE SAME
#4SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE
#5REINFORCED STRUCTURE WITH CAPPING LAYER AND METHODS OF FORMING THE SAME
#6SEMICONDUCTOR PACKAGE STRUCTURES AND METHODS OF FORMING THE SAME
#7DAM STRUCTURE ON LID TO CONSTRAIN A THERMAL INTERFACE MATERIAL IN A SEMICONDUCTOR DEVICE PACKAGE STRUCTURE AND METHODS FOR FORMING THE SAME
#8Hermetic package for high CTE mismatch
#9Hermetic package for high CTE mismatch
#10Stacked semiconductor die assemblies with partitioned logic and associated systems and methods
#11Semiconductor structure and manufacturing method thereof
#12Shielded package assemblies with integrated capacitor
#13Stacked semiconductor die assemblies with partitioned logic and associated systems and methods
#14Semiconductor structure and manufacturing method thereof
#15Thermally conductive sheet, production method for thermally conductive sheet, heat dissipation member, and semiconductor device
#16Shielded package assemblies with integrated capacitor
#17Limiting electronic package warpage
#18Electrical package including bimetal lid
#19Electrical package including bimetal lid
#20Semiconductor device and corresponding method
#21Electronic apparatus and method for fabricating the same
#22Electronic apparatus and method for fabricating the same
#23Limiting electronic package warpage with semiconductor chip lid and lid-ring
#24Semiconductor die assembly and methods of forming thermal paths
#25Packaged integrated circuit including a switch-mode regulator and method of forming the same
#26Electronic apparatus and method for fabricating the same
#27Semiconductor package with package-on-package stacking capability and method of manufacturing the same
#28Electronic component housing package and electronic apparatus
#29Printed circuit board
#30Semiconductor device having multiple bonded heat sinks
#31Chip packages and methods of manufacture thereof
#32Semiconductor device and manufacturing method of semiconductor device
#33Shielded package assemblies with integrated capacitor
#34Packages for three-dimensional die stacks
#35Electronic apparatus and method for fabricating the same
#36Semiconductor package with package-on-package stacking capability and method of manufacturing the same
#37Thinned integrated circuit device and manufacturing process for the same
#38Semiconductor device and manufacturing method thereof
#39Copper nanorod-based thermal interface material (TIM)
#40Method for manufacturing a semiconductor device having multiple heat sinks
#41Package and high frequency terminal structure for the same
#42Metallic thermal joint for high power density chips
#43Package and high frequency terminal structure for the same
#44Multi-chip module system with removable socketed modules
#45Semiconductor package with multiple chips and substrate in metal cap
#46Thermal hot spot cooling for semiconductor devices