Wolfgang Roesner

Semiconductor device including insulated gate bipolar transistor

Reverse-conducting igbt having a reduced forward recovery voltage

Semiconductor device including an anode contact region having a varied doping concentration

Insulated gate bipolar transistor having first and second field stop zone portions and manufacturing method

Method for manufacturing a power semiconductor device

Semiconductor switching device including charge storage structure

Electronic switching element and integrated sensor

Semiconductor device with a field ring edge termination structure and a separation trench arranged between different field rings

IGBT Having an Emitter Region with First and Second Doping Regions

Power semiconductor diode, IGBT, and method for manufacturing thereof

Interconnect structure for semiconductor devices

Integrated circuit including a vertical transistor and method

Integrated circuit having a Fin structure

Integrated circuit including a gate electrode

Fin Field-Effect Transistor and Method for Fabricating a Fin Field-Effect Transistor

Fin Field-effect transistor and method for producing a fin field effect-transistor

DRAM cell structure with tunnel barrier

Semiconductor memory with charge-trapping stack arrangement

Semiconductor memory component with body region of memory cell having a depression and a graded dopant concentration

Integrated circuit arrangement with low-resistance contacts and method for production thereof

Charge-trapping memory cell and method for production

Layer arrangement and process for producing a layer arrangement

Process for producing a layer arrangement, and layer arrangement for use as a dual gate field-effect transistor

Planar dual-gate transistor and method for fabricating a planar dual-gate transistor

Memory cell, memory cell arrangement, patterning arrangement, and method for fabricating a memory cell

Integrated circuit array

High-density NROM-FINFET

Method for producing a substrate

Vertical impedance sensor arrangement and method for producing a vertical impedance sensor arrangement