Phoenix, Arizona
United States
69
2026-05-14
The entities that hold a legal rights for patent applications filed by inventor Olson Timothy L.:
Timothy L. Olson from Phoenix, US has applied for patents for these inventions. The list has both pending applications and granted patents:
FULLY MOLDED BRIDGE INTERPOSER AND METHOD OF MAKING THE SAME
#2 | 2026-04-23METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIER
#3 | 2026-04-09MOLDED LAYERED BRIDGE AND METHOD OF MAKING THE SAME
#4 | 2026-03-053D BLOCK ATTACHED TO A SUBSTRATE IN A SEMICONDUCTOR PACKAGE
#5 | 2026-02-05FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTS
#6 | 2026-01-08INTERCONNECT SUBSTRATE AND METHOD OF MAKING
#7 | 2025-12-25METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIER
#8 | 2025-12-04EMBEDDED COMPONENT INTERPOSER OR SUBSTRATE COMPRISING DISPLACEMENT COMPENSATION TRACES (DCTs) AND METHOD OF MAKING THE SAME
#9 | 2025-11-20FULLY MOLDED BRIDGE INTERPOSER AND METHOD OF MAKING THE SAME
#10 | 2025-10-30METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIER
#11 | 2025-10-02UNIT SPECIFIC VARIABLE OR ADAPTIVE METAL FILL AND SYSTEM AND METHOD FOR THE SAME
#12 | 2025-09-04QUAD FLAT NO-LEAD (QFN) PACKAGE WITH TIE BARS AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAME
#13 | 2025-08-28FULLY MOLDED STRUCTURE WITH MULTI-HEIGHT COMPONENTS COMPRISING BACKSIDE CONDUCTIVE MATERIAL AND METHOD FOR MAKING THE SAME
#14 | 2025-05-29SEMICONDUCTOR ASSEMBLY COMPRISING A 3D BLOCK AND METHOD OF MAKING THE SAME
#15 | 2025-05-22EMBEDDED COMPONENT INTERPOSER OR SUBSTRATE COMPRISING DISPLACEMENT COMPENSATION TRACES (DCTs) AND METHOD OF MAKING THE SAME
#16 | 2025-04-03QUAD FLAT NO-LEAD (QFN) PACKAGE WITHOUT LEADFRAME AND WITH LAYER OF DIELECTRIC
#17 | 2025-02-13METHOD OF SELECTIVE RELEASE OF COMPONENTS USING THERMAL RELEASE LAYER
#18 | 2024-12-26METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIER
#19 | 2024-12-19MULTI-CHIP OR MULTI-CHIPLET FAN-OUT DEVICE FOR LAMINATE AND LEADFRAME PACKAGES
#20 | 2024-12-19MULTI-CHIP OR MULTI-CHIPLET FAN-OUT DEVICE FOR LAMINATE AND LEADFRAME PACKAGES
#21 | 2024-12-19Fully molded structure with multi-height components comprising backside conductive material and method for making the same
#22 | 2024-12-05MOLDED DIRECT CONTACT INTERCONNECT SUBSTRATE AND METHODS OF MAKING SAME
#23 | 2024-11-28STACKABLE FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH VERTICAL INTERCONNECTS
#24 | 2024-07-18LAYERED MOLDED DIRECT CONTACT AND DIELECTRIC STRUCTURE AND METHOD FOR MAKING THE SAME
#25 | 2024-07-04UNIT SPECIFIC VARIABLE OR ADAPTIVE METAL FILL AND SYSTEM AND METHOD FOR THE SAME
#26 | 2024-06-27Semiconductor assembly comprising a 3D block and method of making the same
#27 | 2024-05-23METHOD FOR REDISTRIBUTION LAYER (RDL) REPAIR BY MITIGATING AT LEAST ONE DEFECT WITH A CUSTOM RDL
#28 | 2024-01-25QUAD FLAT NO-LEAD (QFN) PACKAGE WITH BACKSIDE CONDUCTIVE MATERIAL AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAME
#29 | 2024-01-25QUAD FLAT NO-LEAD (QFN) PACKAGE WITHOUT LEADFRAME AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE
#30 | 2023-12-21Molded direct contact interconnect structure without capture pads and method for the same
#31 | 2023-11-30Molded direct contact interconnect structure without capture pads and method for the same
#32 | 2023-11-30Molded direct contact interconnect substrate and methods of making same
#33 | 2023-11-23FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTS
#34 | 2023-09-05Quad flat no-lead (QFN) package without leadframe and direct contact interconnect build-up structure and method for making the same
#35 | 2023-07-27Stackable fully molded semiconductor structure with through silicon via (TSV) vertical interconnects and method of making the same
#36 | 2023-05-11FULLY MOLDED BRIDGE INTERPOSER AND METHOD OF MAKING THE SAME
#37 | 2023-03-16Method for redistribution layer (RDL) repair by mitigating at least one defect with a custom RDL
#38 | 2023-02-16Unit specific variable or adaptive metal fill and system and method for the same
#39 | 2023-01-05Fully molded semiconductor structure with through silicon via (TSV) vertical interconnects
#40 | 2023-01-05Stackable fully molded semiconductor structure with through silicon via (TSV) vertical interconnects
#41 | 2022-11-03FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH FACE MOUNTED PASSIVES AND METHOD OF MAKING THE SAME
#42 | 2022-08-04Multi-step high aspect ratio vertical interconnect and method of making the same
#43 | 2022-07-28Fully molded bridge interposer and method of making the same
#44 | 2022-06-02Fully molded semiconductor structure with face mounted passives and method of making the same
#45 | 2021-10-28Stackable fully molded semiconductor structure with vertical interconnects
#46 | 2020-12-24Stackable fully molded semiconductor structure with vertical interconnects
#47 | 2019-10-24Fully molded semiconductor package for power devices and method of making the same
#48 | 2018-09-06Semiconductor device and method of packaging
#49 | 2018-04-19Fully molded miniaturized semiconductor module
#50 | 2017-09-07Automated optical inspection of unit specific patterning
#51 | 2017-08-03Semiconductor device processing method for material removal
#52 | 2017-03-16Fully molded miniaturized semiconductor module
#53 | 2017-01-12Semiconductor device processing method for material removal
#54 | 2016-11-17AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNING
#55 | 2016-05-19Automated optical inspection of unit specific patterning
#56 | 2016-03-24Semiconductor device and method of adaptive patterning for panelized packaging
#57 | 2014-11-13Semiconductor device and method of land grid array packaging with bussing lines
#58 | 2014-03-25Leadframe structure for concentrated photovoltaic receiver package
#59 | 2013-10-24Semiconductor device and method of adaptive patterning for panelized packaging
#60 | 2013-09-26Adaptive patterning for panelized packaging
#61 | 2013-09-19Adaptive patterning for panelized packaging
#62 | 2013-06-27Adaptive patterning for panelized packaging
#63 | 2012-08-07Substrate carrier for wet chemical processing
#64 | 2011-12-06Semiconductor device with increased I/O leadframe including passive device
#65 | 2011-11-29Flat semiconductor package with half package molding
#66 | 2011-08-18Adaptive patterning for panelized packaging
#67 | 2011-03-22Biometric deadbolt lock assembly
#68 | 2011-03-01Semiconductor device having EMI shielding and method therefor
#69 | 2010-06-29Semiconductor device having RF shielding and method therefor
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