Moos
Germany
84
2011-02-10
The entities that hold a legal rights for patent applications filed by inventor Ruckerbauer Hermann:
Hermann Ruckerbauer from Moos, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Stacking Technique for Circuit Devices
#2 | 2010-04-01Distributed command and address bus architecture for a memory module having portions of bus lines separately disposed
#3 | 2010-03-25Method and system including plural memory controllers and a memory access control bus for accessing a memory device
#4 | 2010-03-25Multi-port DRAM architecture for accessing different memory partitions
#5 | 2010-03-25Memory dies for flexible use and method for configuring memory dies
#6 | 2010-03-11Horizontal dual in-line memory modules
#7 | 2010-02-25High speed memory architecture
#8 | 2010-02-25Electronic device having a chip stack
#9 | 2010-02-11Stacked Memory Module
#10 | 2010-02-04Bus termination system and method
#11 | 2009-11-19METHOD FOR CONTROLLING A MEMORY MODULE AND MEMORY CONTROL UNIT
#12 | 2009-10-29Chip, multi-chip system in a method for performing a refresh of a memory array
#13 | 2009-10-29Integrated Circuit with Improved Data Rate
#14 | 2009-10-29Integrated circuit with wireless connection
#15 | 2009-09-03Methods and articles of manufacture for operating electronic devices on a plurality of clock signals
#16 | 2009-07-30DRAM with Page Access
#17 | 2009-07-09MEMORY DEVICE, METHOD FOR ACCESSING A MEMORY DEVICE AND METHOD FOR ITS MANUFACTURING
#18 | 2009-07-09Method and apparatus for storage device with a logic unit and method for manufacturing same
#19 | 2009-06-25Multi-die memory, apparatus and multi-die memory stack
#20 | 2009-06-11Memory system with extended memory density capability
#21 | 2009-06-04Memory circuit
#22 | 2009-06-04Method and apparatus for determining a skew
#23 | 2009-06-04Method of refreshing data in a storage location based on heat dissipation level and system thereof
#24 | 2009-05-21METHOD AND APPARATUS FOR MONITORING A MEMORY DEVICE
#25 | 2009-02-19Method of operating a memory apparatus, memory device and memory apparatus
#26 | 2009-02-12Method of operating a memory apparatus, memory device and memory apparatus
#27 | 2009-02-12Integrated circuit, chip stack and data processing system
#28 | 2009-01-13Input receiver circuit
#29 | 2008-12-04Memory Module
#30 | 2008-11-04Buffer chip and method for controlling one or more memory arrangements
#31 | 2008-10-02Semiconductor device
#32 | 2008-01-24Memory system and method for transferring data therein
#33 | 2007-11-15MEMORY ARRANGEMENT
#34 | 2007-10-25Memory circuit having memory chips parallel connected to ports and corresponding production method
#35 | 2007-10-04Arrangement of semiconductor memory devices and semiconductor memory module comprising an arrangement of semiconductor memory devices
#36 | 2007-09-25Memory module and method for operating a memory module in a data memory system
#37 | 2007-08-23Memory module device
#38 | 2007-08-23Semiconductor component comprising an integrated semiconductor chip and a chip housing, and electronic device
#39 | 2007-08-23Memory module comprising an electronic printed circuit board and a plurality of semiconductor components and method
#40 | 2007-06-28Memory module comprising a plurality of memory devices
#41 | 2007-05-22Method for repairing hardware faults in memory chips
#42 | 2007-05-03Optimal stacked die organization
#43 | 2007-04-05Apparatus for storing memory words
#44 | 2007-04-05Semiconductor memory system and memory module
#45 | 2007-03-29High-speed interface circuit for semiconductor memory chips and memory system including the same
#46 | 2007-03-15Semiconductor memory arrangement with branched control and address bus
#47 | 2007-03-15Semiconductor memory array with serial control/address bus
#48 | 2007-03-15Semiconductor memory chip with re-drive unit for electrical signals
#49 | 2007-02-08Semiconductor Memory Device and Method of Operating the Same
#50 | 2007-02-08Semiconductor memory device including a signal control device and method of operating the same
#51 | 2007-02-08Semiconductor memory module unit for point-to-point data interchange
#52 | 2007-02-01Semiconductor memory device system, and method for operating a semiconductor memory device system
#53 | 2007-02-01Re-driving CAwD and rD signal lines
#54 | 2007-01-11Memory device with error correction code module
#55 | 2006-12-28Memory system and method of accessing memory chips of a memory system
#56 | 2006-11-23Method for setting a second rank address from a first rank address in a memory module
#57 | 2006-11-02Circuit system
#58 | 2006-09-14Memory module and memory configuration with stub-free signal lines and distributed capacitive loads
#59 | 2006-07-13Semiconductor memory system and method for data transmission
#60 | 2006-06-15Memory device, memory controller and method for operating the same
#61 | 2006-06-08Memory module with a clock signal regeneration circuit and a register circuit for temporarily storing the incoming command and address signals
#62 | 2006-05-25Memory device for use in a memory module
#63 | 2006-05-25Integrated memory device and memory module
#64 | 2006-05-18Semiconductor memory system and method for the transfer of write and read data signals in a semiconductor memory system
#65 | 2006-05-09Integrated circuit and method for operating the integrated circuit
#66 | 2006-05-09Method and apparatus for synchronous signal transmission between at least two logic or memory components
#67 | 2006-05-04Semiconductor memory chip, semiconductor memory module and method for transmitting write data to semiconductor memory chips
#68 | 2006-05-04Memory device and method for receiving instruction data
#69 | 2006-05-04System for determining a reference level and evaluating a signal on the basis of the reference level
#70 | 2006-03-30Memory system with two clock lines and a memory device
#71 | 2006-03-30Memory device, memory controller and memory system having bidirectional clock lines
#72 | 2006-03-23DQS signaling in DDR-III memory systems without preamble
#73 | 2006-03-07Method, adapter card and configuration for an installation of memory modules
#74 | 2005-10-25Method for calibrating semiconductor devices using a common calibration reference and a calibration circuit
#75 | 2005-07-19Configuration, plug-in mount and contact element for fixing and contacting switching assemblies on a substrate
#76 | 2005-05-24Zero insertion force mount for fixing and making contact with circuit subassemblies on a substrate
#77 | 2005-04-14Semiconductor memory module
#78 | 2005-03-03Semiconductor memory module
#79 | 2005-02-24Semiconductor memory module
#80 | 2005-02-24Memory system and method for transferring data therein
#81 | 2005-02-17Memory arrangement
#82 | 2005-02-17Semiconductor memory module
#83 | 2005-02-03Semiconductor memory module
#84 | 2005-01-11Connector for a plurality of switching assemblies with compatible interfaces
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