Inventor profile of:

Yider WU

City:

Campbell, California

Country:

United States

Published Applications:

17

Last publication date:

2012-01-10

Top Assignees for applications by Yider WU

The entities that hold a legal rights for patent applications filed by inventor WU Yider:

Recent patent applications by WU Yider

Yider WU from Campbell, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2012-01-10
US11432495
-

Flash memory device and method of forming the same with improved gate breakdown and endurance

#2 | 2011-02-17
US20110037115A1
Electricity

System and method for improving mesa width in a semiconductor device

#3 | 2009-12-15
US10823970
-

Semiconductor device having a pad metal layer and a lower metal layer that are electrically coupled, whereas apertures are formed in the lower metal layer below a center area of the pad metal layer

#4 | 2007-11-15
US20070262412A1
Electricity

Avoiding Field Oxide Gouging In Shallow Trench Isolation (STI) Regions

#5 | 2007-09-04
US10799413
-

Avoiding field oxide gouging in shallow trench isolation (STI) regions

#6 | 2007-02-01
US20070026675A1
Electricity

System and method for improving mesa width in a semiconductor device

#7 | 2006-12-19
US10859369
-

Method and device for reducing interface area of a memory device

#8 | 2006-07-18
US10618156
-

Memory structure having tunable interlayer dielectric and method for fabricating same

#9 | 2006-06-27
US10819162
-

Flash memory device and method of forming the same with improved gate breakdown and endurance

#10 | 2006-03-28
US10758173
-

Electrostatic discharge performance of a silicon structure and efficient use of area with electrostatic discharge protective device under the pad approach and adjustment of via configuration thereto to control drain junction resistance

#11 | 2005-11-08
US10459576
-

Non-volatile memory device

#12 | 2005-10-25
US10770010
-

Non-volatile memory device

#13 | 2005-07-19
US10655936
-

Method of fabricating a floating gate

#14 | 2005-07-14
US20050151265A1
Electricity

Efficient use of wafer area with device under the pad approach

#15 | 2005-06-09
US20050121716A1
Electricity

Flash memory device

#16 | 2005-05-24
US10247641
-

Multi-bit silicon nitride charge-trapping non-volatile memory cell

#17 | 2005-03-22
US10701780
-

Method and structure for protecting NROM devices from induced charge damage during device fabrication

InventorID:

3517154 ⎘